30#define DEBUG_TYPE "tti"
34 cl::desc(
"Recognize reduction patterns."));
38 cl::desc(
"Use this to override the target cache line size when "
39 "specified by the user."));
43 cl::desc(
"Use this to override the target's minimum page size."));
48 "Use this to override the target's predictable branch threshold (%)."));
62 std::unique_ptr<const TargetTransformInfoImplBase> Impl)
79 ScalarizationCost(ScalarizationCost) {
82 FMF = FPMO->getFastMathFlags();
87 ParamTys.push_back(Arg->getType());
95 : II(
I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
96 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
101 : RetTy(Ty), IID(Id) {
103 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
104 ParamTys.reserve(Arguments.size());
113 : II(
I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost),
115 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
116 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
132 L->getExitingBlocks(ExitingBlocks);
137 if (!
L->isLoopLatch(BB)) {
146 if (ConstEC->getValue()->isZero())
167 bool NotAlways =
false;
169 if (!
L->contains(Pred))
204 : TTIImpl(
std::make_unique<NoTTIImpl>(
DL)) {}
209 : TTIImpl(
std::
move(Arg.TTIImpl)) {}
212 TTIImpl = std::move(RHS.TTIImpl);
217 return TTIImpl->getInliningThresholdMultiplier();
222 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
228 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
232 return TTIImpl->getInliningLastCallToStaticBonus();
237 return TTIImpl->adjustInliningThreshold(CB);
242 return TTIImpl->getCallerAllocaCost(CB, AI);
246 return TTIImpl->getInlinerVectorBonusPercent();
252 return TTIImpl->getGEPCost(PointeeType, Ptr,
Operands,
CostKind, AccessType);
260 "If pointers have same base address it has to be provided.");
261 return TTIImpl->getPointersChainCost(Ptrs,
Base, Info, AccessTy,
CostKind);
267 return TTIImpl->getEstimatedNumberOfCaseClusters(
SI, JTSize, PSI, BFI);
276 "TTI should not produce negative costs!");
283 : TTIImpl->getPredictableBranchThreshold();
287 return TTIImpl->getBranchMispredictPenalty();
291 return TTIImpl->hasBranchDivergence(
F);
299 Call->hasFnAttr(Attribute::NoDivergenceSource))
306 unsigned ToAS)
const {
307 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
311 unsigned ToAS)
const {
312 return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
316 return TTIImpl->getFlatAddressSpace();
321 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
325 unsigned ToAS)
const {
326 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
329std::pair<KnownBits, KnownBits>
331 const Value &PtrOp)
const {
332 return TTIImpl->computeKnownBitsAddrSpaceCast(ToAS, PtrOp);
336 unsigned FromAS,
unsigned ToAS,
const KnownBits &FromPtrBits)
const {
337 return TTIImpl->computeKnownBitsAddrSpaceCast(FromAS, ToAS, FromPtrBits);
341 unsigned SrcAS,
unsigned DstAS)
const {
342 return TTIImpl->getAddrSpaceCastPreservedPtrMask(SrcAS, DstAS);
347 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
351 return TTIImpl->getAssumedAddrSpace(V);
354std::pair<const Value *, unsigned>
356 return TTIImpl->getPredicatedAddrSpace(V);
361 return TTIImpl->rewriteIntrinsicWithAddressSpace(
II, OldV, NewV);
365 return TTIImpl->isLoweredToCall(
F);
371 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
375 return TTIImpl->getEpilogueVectorizationMinVF();
380 return TTIImpl->preferTailFoldingOverEpilogue(TFI);
384 return TTIImpl->getPreferredTailFoldingStyle();
387std::optional<Instruction *>
390 return TTIImpl->instCombineIntrinsic(IC,
II);
395 bool &KnownBitsComputed)
const {
396 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC,
II, DemandedMask,
Known,
404 SimplifyAndSetOp)
const {
405 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
406 IC,
II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
413 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
418 return TTIImpl->getPeelingPreferences(L, SE, PP);
422 return TTIImpl->isLegalAddImmediate(
Imm);
426 return TTIImpl->isLegalAddScalableImmediate(
Imm);
430 return TTIImpl->isLegalICmpImmediate(
Imm);
435 bool HasBaseReg, int64_t Scale,
438 int64_t ScalableOffset)
const {
439 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
440 Scale, AddrSpace,
I, ScalableOffset);
445 return TTIImpl->isLSRCostLess(C1, C2);
449 return TTIImpl->isNumRegsMajorCostOfLSR();
453 return TTIImpl->shouldDropLSRSolutionIfLessProfitable();
457 return TTIImpl->isProfitableLSRChainElement(
I);
461 return TTIImpl->canMacroFuseCmp();
468 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
474 return TTIImpl->getPreferredAddressingMode(L, SE);
480 return TTIImpl->isLegalMaskedStore(DataType, Alignment,
AddressSpace,
487 return TTIImpl->isLegalMaskedLoad(DataType, Alignment,
AddressSpace,
492 Align Alignment)
const {
493 return TTIImpl->isLegalNTStore(DataType, Alignment);
497 return TTIImpl->isLegalNTLoad(DataType, Alignment);
502 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
506 Align Alignment)
const {
507 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
511 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
513 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
517 Align Alignment)
const {
518 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
522 Align Alignment)
const {
523 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
527 Align Alignment)
const {
528 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
532 Align Alignment)
const {
533 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
537 Align Alignment)
const {
538 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
542 Align Alignment)
const {
543 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
548 unsigned AddrSpace)
const {
549 return TTIImpl->isLegalInterleavedAccessType(VTy, Factor, Alignment,
554 Type *DataType)
const {
555 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);
559 return TTIImpl->enableOrderedReductions();
563 return TTIImpl->hasDivRemOp(DataType, IsSigned);
567 unsigned AddrSpace)
const {
568 return TTIImpl->hasVolatileVariant(
I, AddrSpace);
572 return TTIImpl->prefersVectorizedAddressing();
577 int64_t Scale,
unsigned AddrSpace)
const {
579 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
580 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
585 return TTIImpl->LSRWithInstrQueries();
589 return TTIImpl->isTruncateFree(Ty1, Ty2);
593 return TTIImpl->isProfitableToHoist(
I);
599 return TTIImpl->isTypeLegal(Ty);
603 return TTIImpl->getRegUsageForType(Ty);
607 return TTIImpl->shouldBuildLookupTables();
612 return TTIImpl->shouldBuildLookupTablesForConstant(
C);
616 return TTIImpl->getMinimumLookupTableEntryBitWidth();
620 return TTIImpl->shouldBuildRelLookupTables();
624 return TTIImpl->useColdCCForColdCall(
F);
628 return TTIImpl->useFastCCForInternalCall(
F);
633 return TTIImpl->isTargetIntrinsicWithScalarOpAtArg(ID, ScalarOpdIdx);
638 return TTIImpl->isTargetIntrinsicWithOverloadTypeAtArg(ID, OpdIdx);
643 return TTIImpl->isTargetIntrinsicWithStructReturnOverloadAtField(ID, RetIdx);
654 I->getOperand(1)->hasOneUse())
669 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
676 return TTIImpl->getOperandsScalarizationOverhead(Tys,
CostKind, VIC);
680 return TTIImpl->supportsEfficientVectorElementLoadStore();
684 return TTIImpl->supportsTailCalls();
688 return TTIImpl->supportsTailCallFor(CB);
692 bool LoopHasReductions)
const {
693 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
698 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
702 return TTIImpl->enableSelectOptimize();
707 return TTIImpl->shouldTreatInstructionLikeSelect(
I);
711 return TTIImpl->enableInterleavedAccessVectorization();
715 return TTIImpl->enableMaskedInterleavedAccessVectorization();
719 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
727 unsigned *
Fast)
const {
728 return TTIImpl->allowsMisalignedMemoryAccesses(Context,
BitWidth,
734 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
738 return TTIImpl->haveFastSqrt(Ty);
742 return TTIImpl->haveFastClmul(Ty);
747 return TTIImpl->isExpensiveToSpeculativelyExecute(
I);
751 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
756 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
765 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
773 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
778 unsigned Opcode,
unsigned Idx,
const APInt &
Imm,
Type *Ty,
781 TTIImpl->getIntImmCostInst(Opcode, Idx,
Imm, Ty,
CostKind, Inst);
782 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
791 TTIImpl->getIntImmCostIntrin(IID, Idx,
Imm, Ty,
CostKind);
792 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
798 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
802 return TTIImpl->getNumberOfRegisters(ClassID);
806 bool IsStore)
const {
807 return TTIImpl->hasConditionalLoadStoreForType(Ty, IsStore);
812 return TTIImpl->getRegisterClassForType(
Vector, Ty);
816 return TTIImpl->getRegisterClassName(ClassID);
821 return TTIImpl->getRegisterClassSpillCost(ClassID,
CostKind);
826 return TTIImpl->getRegisterClassReloadCost(ClassID,
CostKind);
831 return TTIImpl->getRegisterBitWidth(
K);
835 return TTIImpl->getMinVectorRegisterBitWidth();
839 return TTIImpl->getVScaleForTuning();
844 return TTIImpl->shouldMaximizeVectorBandwidth(
K);
848 bool IsScalable)
const {
849 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
853 unsigned Opcode)
const {
854 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
860 unsigned AddrSpace)
const {
861 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy, Alignment,
866 const Instruction &
I,
bool &AllowPromotionWithoutCommonHeader)
const {
867 return TTIImpl->shouldConsiderAddressTypePromotion(
868 I, AllowPromotionWithoutCommonHeader);
873 : TTIImpl->getCacheLineSize();
876std::optional<unsigned>
878 return TTIImpl->getCacheSize(Level);
881std::optional<unsigned>
883 return TTIImpl->getCacheAssociativity(Level);
888 : TTIImpl->getMinPageSize();
892 return TTIImpl->getPrefetchDistance();
896 unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
897 unsigned NumPrefetches,
bool HasCall)
const {
898 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
899 NumPrefetches, HasCall);
903 return TTIImpl->getMaxPrefetchIterationsAhead();
907 return TTIImpl->enableWritePrefetching();
911 return TTIImpl->shouldPrefetchAddressSpace(AS);
915 unsigned Opcode,
Type *InputTypeA,
Type *InputTypeB,
Type *AccumType,
919 return TTIImpl->getPartialReductionCost(Opcode, InputTypeA, InputTypeB,
920 AccumType, VF, OpAExtend, OpBExtend,
926 bool HasUnorderedReductions)
const {
927 return TTIImpl->getMaxInterleaveFactor(VF, HasUnorderedReductions);
941 if (CI->getValue().isPowerOf2())
943 else if (CI->getValue().isNegatedPowerOf2())
953 if (ShuffleInst->isZeroEltSplat())
968 if (CI->getValue().isPowerOf2())
970 else if (CI->getValue().isNegatedPowerOf2())
976 bool AllPow2 =
true, AllNegPow2 =
true;
977 for (uint64_t
I = 0, E = CDS->getNumElements();
I != E; ++
I) {
979 AllPow2 &= CI->getValue().isPowerOf2();
980 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
981 if (AllPow2 || AllNegPow2)
984 AllPow2 = AllNegPow2 =
false;
993 return {OpInfo, OpProps};
1013 if (TLibInfo && Opcode == Instruction::FRem) {
1015 LibFunc Func = TLibInfo->
getLibFunc(Instruction::FRem, Ty->getScalarType());
1016 if (VecTy && Func != NotLibFunc &&
1023 Opcode, Ty,
CostKind, Op1Info, Op2Info, Args, CxtI);
1024 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1029 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
1032 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask,
CostKind);
1033 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1044 "Expected the Mask to match the return size if given");
1046 "Expected the same scalar types");
1048 Kind, DstTy, SrcTy,
CostKind, Mask, Index, SubTp, Args, CxtI);
1049 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1065 return Instruction::CastOps::ZExt;
1067 return Instruction::CastOps::SExt;
1069 return Instruction::CastOps::FPExt;
1080 case Instruction::CastOps::ZExt:
1082 case Instruction::CastOps::SExt:
1084 case Instruction::CastOps::FPExt:
1097 auto getLoadStoreKind = [](
const Value *V,
unsigned LdStOp,
unsigned MaskedOp,
1098 unsigned GatScatOp) {
1103 if (
I->getOpcode() == LdStOp)
1107 if (
II->getIntrinsicID() == MaskedOp)
1109 if (
II->getIntrinsicID() == GatScatOp)
1116 switch (
I->getOpcode()) {
1117 case Instruction::ZExt:
1118 case Instruction::SExt:
1119 case Instruction::FPExt:
1120 return getLoadStoreKind(
I->getOperand(0), Instruction::Load,
1121 Intrinsic::masked_load, Intrinsic::masked_gather);
1122 case Instruction::Trunc:
1123 case Instruction::FPTrunc:
1125 return getLoadStoreKind(*
I->user_begin(), Instruction::Store,
1126 Intrinsic::masked_store,
1127 Intrinsic::masked_scatter);
1139 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1140 "Opcode should reflect passed instruction.");
1142 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH,
CostKind,
I);
1143 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1151 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index,
CostKind);
1152 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1158 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1159 "Opcode should reflect passed instruction.");
1161 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1169 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1170 "Opcode should reflect passed instruction.");
1172 Opcode, ValTy, CondTy, VecPred,
CostKind, Op1Info, Op2Info,
I);
1173 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1180 assert((Opcode == Instruction::InsertElement ||
1181 Opcode == Instruction::ExtractElement) &&
1182 "Expecting Opcode to be insertelement/extractelement.");
1184 TTIImpl->getVectorInstrCost(Opcode, Val,
CostKind, Index, Op0, Op1, VIC);
1185 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1191 Value *Scalar,
ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1193 assert((Opcode == Instruction::InsertElement ||
1194 Opcode == Instruction::ExtractElement) &&
1195 "Expecting Opcode to be insertelement/extractelement.");
1197 Opcode, Val,
CostKind, Index, Scalar, ScalarUserAndIdx, VIC);
1198 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1209 TTIImpl->getVectorInstrCost(
I, Val,
CostKind, Index, VIC);
1210 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1216 unsigned Index)
const {
1218 TTIImpl->getIndexedVectorInstrCostFromEnd(Opcode, Val,
CostKind, Index);
1219 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1225 assert((Opcode == Instruction::InsertValue ||
1226 Opcode == Instruction::ExtractValue) &&
1227 "Expecting Opcode to be insertvalue/extractvalue.");
1229 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1234 Type *EltTy,
int ReplicationFactor,
int VF,
const APInt &DemandedDstElts,
1237 EltTy, ReplicationFactor, VF, DemandedDstElts,
CostKind);
1238 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1246 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1247 "Opcode should reflect passed instruction.");
1250 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1257 bool UseMaskForCond,
bool UseMaskForGaps)
const {
1260 UseMaskForCond, UseMaskForGaps);
1261 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1269 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1277 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1286 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1291 return TTIImpl->getNumberOfParts(Tp);
1298 TTIImpl->getAddressComputationCost(PtrTy, SE, Ptr,
CostKind);
1299 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1305 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1310 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1314 unsigned Opcode,
VectorType *Ty, std::optional<FastMathFlags> FMF,
1317 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF,
CostKind);
1318 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1326 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF,
CostKind);
1327 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1334 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1339 bool IsUnsigned,
unsigned RedOpcode,
Type *ResTy,
VectorType *Ty,
1341 return TTIImpl->getMulAccReductionCost(IsUnsigned, RedOpcode, ResTy, Ty,
1347 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1352 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1356 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1361 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType,
1367 unsigned DestAddrSpace,
Align SrcAlign,
Align DestAlign,
1368 std::optional<uint32_t> AtomicElementSize)
const {
1369 return TTIImpl->getMemcpyLoopLoweringType(Context,
Length, SrcAddrSpace,
1370 DestAddrSpace, SrcAlign, DestAlign,
1376 unsigned RemainingBytes,
unsigned SrcAddrSpace,
unsigned DestAddrSpace,
1378 std::optional<uint32_t> AtomicCpySize)
const {
1379 TTIImpl->getMemcpyLoopResidualLoweringType(
1380 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1381 DestAlign, AtomicCpySize);
1386 return TTIImpl->areInlineCompatible(Caller, Callee);
1392 unsigned DefaultCallPenalty)
const {
1393 return TTIImpl->getInlineCallPenalty(
F,
Call, DefaultCallPenalty);
1398 return TTIImpl->shouldCopyAttributeWhenOutliningFrom(Caller, Attr);
1403 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1408 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1413 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1417 return TTIImpl->getLoadStoreVecRegBitWidth(AS);
1421 return TTIImpl->isLegalToVectorizeLoad(LI);
1425 return TTIImpl->isLegalToVectorizeStore(
SI);
1429 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1430 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1435 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1436 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1442 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1446 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1451 unsigned ChainSizeInBytes,
1453 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1458 unsigned ChainSizeInBytes,
1460 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1464 return TTIImpl->preferFixedOverScalableIfEqualCost();
1469 return TTIImpl->preferInLoopReduction(Kind, Ty);
1473 return TTIImpl->preferAlternateOpcodeVectorization();
1477 return TTIImpl->preferSLPInstCountCheck();
1481 return TTIImpl->preferPredicatedReductionSelect();
1486 return TTIImpl->preferEpilogueVectorization(Iters);
1490 return TTIImpl->shouldConsiderVectorizationRegPressure();
1495 return TTIImpl->getVPLegalizationStrategy(VPI);
1499 return TTIImpl->hasArmWideBranch(Thumb);
1503 return TTIImpl->getFeatureMask(
F);
1507 return TTIImpl->getPriorityMask(
F);
1511 return TTIImpl->isMultiversionedFunction(
F);
1515 return TTIImpl->getMaxNumArgs();
1519 return TTIImpl->shouldExpandReduction(
II);
1525 return TTIImpl->getPreferredExpandedReductionShuffle(
II);
1529 return TTIImpl->getGISelRematGlobalCost();
1533 return TTIImpl->getMinTripCountTailFoldingThreshold();
1537 return TTIImpl->supportsScalableVectors();
1541 return TTIImpl->enableScalableVectorization();
1545 return TTIImpl->hasActiveVectorLength();
1550 return TTIImpl->isProfitableToSinkOperands(
I, OpsToSink);
1554 return TTIImpl->isVectorShiftByScalarCheap(Ty);
1560 return TTIImpl->getNumBytesToPadGlobalArray(
Size,
ArrayType);
1566 return TTIImpl->collectKernelLaunchBounds(
F, LB);
1570 return TTIImpl->allowVectorElementIndexingUsingGEP();
1575 return TTIImpl->isUniform(
I, UniformArgs);
1584 : TTICallback(
std::
move(TTICallback)) {}
1588 assert(!
F.isIntrinsic() &&
"Should not request TTI for intrinsics");
1589 return TTICallback(
F);
1595 return Result(
F.getDataLayout());
1600 "Target Transform Information",
false,
true)
1614 TTI = TIRA.run(
F, DummyFAM);
for(const MachineOperand &MO :llvm::drop_begin(OldMI.operands(), Desc.getNumOperands()))
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< ShadowStackGC > C("shadow-stack", "Very portable GC for uncooperative code generators")
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))
static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))
This file provides various utilities for inspecting and working with the control flow graph in LLVM I...
Module.h This file contains the declarations for the Module class.
uint64_t IntrinsicInst * II
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
This file defines the SmallVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static SymbolRef::Type getType(const Symbol *Sym)
Class for arbitrary precision integers.
an instruction to allocate memory on the stack
This class represents an incoming formal argument to a Function.
Represent a constant reference to an array (0 or more elements consecutively in memory),...
Class to represent array types.
A cache of @llvm.assume calls within a function.
Functions, function parameters, and return types can have attributes to indicate how they should be t...
LLVM Basic Block Representation.
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
User::op_iterator arg_begin()
Return the iterator pointing to the beginning of the argument list.
User::op_iterator arg_end()
Return the iterator pointing to the end of the argument list.
iterator_range< User::op_iterator > args()
Iteration adapter for range-for loops.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Conditional Branch instruction.
This is an important base class in LLVM.
A parsed version of the target data layout string in and methods for querying it.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
LLVM_ABI bool dominates(const BasicBlock *BB, const Use &U) const
Return true if the (end of the) basic block BB dominates the use U.
Convenience struct for specifying and reasoning about fast-math flags.
ImmutablePass class - This class is used to provide information that does not need to be run.
The core instruction combiner logic.
Class to represent integer types.
LLVM_ABI IntrinsicCostAttributes(Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarCost=InstructionCost::getInvalid(), bool TypeBasedOnly=false)
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
An instruction for reading from memory.
Wrapper class to LoopBlocksDFS that provides a standard begin()/end() interface for the DFS reverse p...
void perform(const LoopInfo *LI)
Traverse the loop blocks and store the DFS result.
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
Represents a single loop in the control flow graph.
Information for memory intrinsic cost model.
Analysis providing profile information.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
This class represents a constant integer value.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
LLVM_ABI uint64_t getTypeSizeInBits(Type *Ty) const
Return the size in bits of the specified type, for which isSCEVable must return true.
LLVM_ABI bool isLoopInvariant(const SCEV *S, const Loop *L)
Return true if the value of the given SCEV is unchanging in the specified loop.
LLVM_ABI const SCEV * getExitCount(const Loop *L, const BasicBlock *ExitingBlock, ExitCountKind Kind=Exact)
Return the number of times the backedge executes before the given exit would be taken; if not exactly...
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
An instruction for storing to memory.
Analysis pass providing the TargetTransformInfo.
LLVM_ABI Result run(const Function &F, FunctionAnalysisManager &)
TargetTransformInfo Result
LLVM_ABI TargetIRAnalysis()
Default construct a target IR analysis.
Provides information about what library functions are available for the current target.
StringRef getName(LibFunc F) const
bool isFunctionVectorizable(StringRef F, const ElementCount &VF) const
LibFunc getLibFunc(StringRef funcName) const
Searches for a particular function name.
The instances of the Type class are immutable: once they are created, they are never changed.
static LLVM_ABI IntegerType * getInt32Ty(LLVMContext &C)
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
LLVM_ABI bool isScalableTy() const
Return true if this is a type whose size is a known multiple of vscale.
This is the common base class for vector predication intrinsics.
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
Base class of all SIMD vector types.
ElementCount getElementCount() const
Return an ElementCount instance to represent the (possibly scalable) number of elements in the vector...
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
@ Known
Known to have no common set bits.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
VectorInstrContext
Represents a hint about the context in which a vector instruction or intrinsic is used.
@ None
The instruction is not folded.
@ Load
The value being inserted comes from a load (InsertElement only).
@ Store
The extracted value is stored (ExtractElement only).
LLVM_ABI Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
bool containsIrreducibleCFG(RPOTraversalT &RPOTraversal, const LoopInfoT &LI)
Return true if the control flow in RPOTraversal is irreducible.
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
LLVM_ABI ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)
Create an analysis pass wrapper around a TTI object.
RecurKind
These are the kinds of recurrences that we support.
@ Fast
Assign the register banks as fast as possible (default).
constexpr unsigned BitWidth
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
auto predecessors(const MachineBasicBlock *BB)
AnalysisManager< Function > FunctionAnalysisManager
Convenience typedef for the Function analysis manager.
ValueUniformity
Enum describing how values behave with respect to uniformity and divergence, to answer the question: ...
@ NeverUniform
The result value can never be assumed to be uniform.
@ Default
The result value is uniform if and only if all operands are uniform.
Implement std::hash so that hash_code can be used in STL containers.
This struct is a compact representation of a valid (non-zero power of two) alignment.
A special type used by analysis passes to provide an address that identifies that particular analysis...
Attributes of a target dependent hardware loop.
LLVM_ABI bool canAnalyze(LoopInfo &LI)
HardwareLoopInfo()=delete
LLVM_ABI bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)
Information about a load/store intrinsic defined by the target.