LLVM  14.0.0git
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X86DisassemblerDecoder.h File Reference
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Support/X86DisassemblerDecoderCommon.h"
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Classes

struct  llvm::X86Disassembler::InstructionSpecifier
 The specification for how to extract and interpret a full instruction and its operands. More...
 
struct  llvm::X86Disassembler::InternalInstruction
 The x86 internal instruction, which is produced by the decoder. More...
 

Namespaces

 llvm
 ---------------------— PointerInfo ------------------------------------—
 
 llvm::X86Disassembler
 

Macros

#define modFromModRM(modRM)   (((modRM) & 0xc0) >> 6)
 
#define regFromModRM(modRM)   (((modRM) & 0x38) >> 3)
 
#define rmFromModRM(modRM)   ((modRM) & 0x7)
 
#define scaleFromSIB(sib)   (((sib) & 0xc0) >> 6)
 
#define indexFromSIB(sib)   (((sib) & 0x38) >> 3)
 
#define baseFromSIB(sib)   ((sib) & 0x7)
 
#define wFromREX(rex)   (((rex) & 0x8) >> 3)
 
#define rFromREX(rex)   (((rex) & 0x4) >> 2)
 
#define xFromREX(rex)   (((rex) & 0x2) >> 1)
 
#define bFromREX(rex)   ((rex) & 0x1)
 
#define rFromEVEX2of4(evex)   (((~(evex)) & 0x80) >> 7)
 
#define xFromEVEX2of4(evex)   (((~(evex)) & 0x40) >> 6)
 
#define bFromEVEX2of4(evex)   (((~(evex)) & 0x20) >> 5)
 
#define r2FromEVEX2of4(evex)   (((~(evex)) & 0x10) >> 4)
 
#define mmFromEVEX2of4(evex)   ((evex) & 0x3)
 
#define wFromEVEX3of4(evex)   (((evex) & 0x80) >> 7)
 
#define vvvvFromEVEX3of4(evex)   (((~(evex)) & 0x78) >> 3)
 
#define ppFromEVEX3of4(evex)   ((evex) & 0x3)
 
#define zFromEVEX4of4(evex)   (((evex) & 0x80) >> 7)
 
#define l2FromEVEX4of4(evex)   (((evex) & 0x40) >> 6)
 
#define lFromEVEX4of4(evex)   (((evex) & 0x20) >> 5)
 
#define bFromEVEX4of4(evex)   (((evex) & 0x10) >> 4)
 
#define v2FromEVEX4of4(evex)   (((~evex) & 0x8) >> 3)
 
#define aaaFromEVEX4of4(evex)   ((evex) & 0x7)
 
#define rFromVEX2of3(vex)   (((~(vex)) & 0x80) >> 7)
 
#define xFromVEX2of3(vex)   (((~(vex)) & 0x40) >> 6)
 
#define bFromVEX2of3(vex)   (((~(vex)) & 0x20) >> 5)
 
#define mmmmmFromVEX2of3(vex)   ((vex) & 0x1f)
 
#define wFromVEX3of3(vex)   (((vex) & 0x80) >> 7)
 
#define vvvvFromVEX3of3(vex)   (((~(vex)) & 0x78) >> 3)
 
#define lFromVEX3of3(vex)   (((vex) & 0x4) >> 2)
 
#define ppFromVEX3of3(vex)   ((vex) & 0x3)
 
#define rFromVEX2of2(vex)   (((~(vex)) & 0x80) >> 7)
 
#define vvvvFromVEX2of2(vex)   (((~(vex)) & 0x78) >> 3)
 
#define lFromVEX2of2(vex)   (((vex) & 0x4) >> 2)
 
#define ppFromVEX2of2(vex)   ((vex) & 0x3)
 
#define rFromXOP2of3(xop)   (((~(xop)) & 0x80) >> 7)
 
#define xFromXOP2of3(xop)   (((~(xop)) & 0x40) >> 6)
 
#define bFromXOP2of3(xop)   (((~(xop)) & 0x20) >> 5)
 
#define mmmmmFromXOP2of3(xop)   ((xop) & 0x1f)
 
#define wFromXOP3of3(xop)   (((xop) & 0x80) >> 7)
 
#define vvvvFromXOP3of3(vex)   (((~(vex)) & 0x78) >> 3)
 
#define lFromXOP3of3(xop)   (((xop) & 0x4) >> 2)
 
#define ppFromXOP3of3(xop)   ((xop) & 0x3)
 
#define REGS_8BIT
 
#define EA_BASES_16BIT
 
#define REGS_16BIT
 
#define EA_BASES_32BIT
 
#define REGS_32BIT
 
#define EA_BASES_64BIT
 
#define REGS_64BIT
 
#define REGS_MMX
 
#define REGS_XMM
 
#define REGS_YMM
 
#define REGS_ZMM
 
#define REGS_MASKS
 
#define REGS_MASK_PAIRS
 
#define REGS_SEGMENT
 
#define REGS_DEBUG
 
#define REGS_CONTROL
 
#define REGS_BOUND
 
#define REGS_TMM
 
#define ALL_EA_BASES
 
#define ALL_SIB_BASES
 
#define ALL_REGS
 
#define ENTRY(x)   EA_BASE_##x,
 
#define ENTRY(x)   EA_REG_##x,
 
#define ENTRY(x)   SIB_INDEX_##x,
 
#define ENTRY(x)   SIB_BASE_##x,
 
#define ENTRY(x)   MODRM_REG_##x,
 

Enumerations

enum  llvm::X86Disassembler::EABase { llvm::X86Disassembler::EA_BASE_NONE, llvm::X86Disassembler::EA_max }
 All possible values of the base field for effective-address computations, a.k.a. More...
 
enum  llvm::X86Disassembler::SIBIndex { llvm::X86Disassembler::SIB_INDEX_NONE, llvm::X86Disassembler::SIB_INDEX_max }
 All possible values of the SIB index field. More...
 
enum  llvm::X86Disassembler::SIBBase { llvm::X86Disassembler::SIB_BASE_NONE, llvm::X86Disassembler::SIB_BASE_max }
 All possible values of the SIB base field. More...
 
enum  llvm::X86Disassembler::EADisplacement { llvm::X86Disassembler::EA_DISP_NONE, llvm::X86Disassembler::EA_DISP_8, llvm::X86Disassembler::EA_DISP_16, llvm::X86Disassembler::EA_DISP_32 }
 Possible displacement types for effective-address computations. More...
 
enum  llvm::X86Disassembler::Reg { llvm::X86Disassembler::MODRM_REG_max }
 All possible values of the reg field in the ModR/M byte. More...
 
enum  llvm::X86Disassembler::SegmentOverride {
  llvm::X86Disassembler::SEG_OVERRIDE_NONE, llvm::X86Disassembler::SEG_OVERRIDE_CS, llvm::X86Disassembler::SEG_OVERRIDE_SS, llvm::X86Disassembler::SEG_OVERRIDE_DS,
  llvm::X86Disassembler::SEG_OVERRIDE_ES, llvm::X86Disassembler::SEG_OVERRIDE_FS, llvm::X86Disassembler::SEG_OVERRIDE_GS, llvm::X86Disassembler::SEG_OVERRIDE_max
}
 All possible segment overrides. More...
 
enum  llvm::X86Disassembler::VEXLeadingOpcodeByte { llvm::X86Disassembler::VEX_LOB_0F = 0x1, llvm::X86Disassembler::VEX_LOB_0F38 = 0x2, llvm::X86Disassembler::VEX_LOB_0F3A = 0x3 }
 Possible values for the VEX.m-mmmm field. More...
 
enum  llvm::X86Disassembler::XOPMapSelect { llvm::X86Disassembler::XOP_MAP_SELECT_8 = 0x8, llvm::X86Disassembler::XOP_MAP_SELECT_9 = 0x9, llvm::X86Disassembler::XOP_MAP_SELECT_A = 0xA }
 
enum  llvm::X86Disassembler::VEXPrefixCode { llvm::X86Disassembler::VEX_PREFIX_NONE = 0x0, llvm::X86Disassembler::VEX_PREFIX_66 = 0x1, llvm::X86Disassembler::VEX_PREFIX_F3 = 0x2, llvm::X86Disassembler::VEX_PREFIX_F2 = 0x3 }
 Possible values for the VEX.pp/EVEX.pp field. More...
 
enum  llvm::X86Disassembler::VectorExtensionType {
  llvm::X86Disassembler::TYPE_NO_VEX_XOP = 0x0, llvm::X86Disassembler::TYPE_VEX_2B = 0x1, llvm::X86Disassembler::TYPE_VEX_3B = 0x2, llvm::X86Disassembler::TYPE_EVEX = 0x3,
  llvm::X86Disassembler::TYPE_XOP = 0x4
}
 

Macro Definition Documentation

◆ aaaFromEVEX4of4

#define aaaFromEVEX4of4 (   evex)    ((evex) & 0x7)

Definition at line 49 of file X86DisassemblerDecoder.h.

◆ ALL_EA_BASES

#define ALL_EA_BASES
Value:
EA_BASES_16BIT \
EA_BASES_32BIT \
EA_BASES_64BIT

Definition at line 394 of file X86DisassemblerDecoder.h.

◆ ALL_REGS

#define ALL_REGS

◆ ALL_SIB_BASES

#define ALL_SIB_BASES
Value:
REGS_32BIT \
REGS_64BIT

Definition at line 399 of file X86DisassemblerDecoder.h.

◆ baseFromSIB

#define baseFromSIB (   sib)    ((sib) & 0x7)

Definition at line 30 of file X86DisassemblerDecoder.h.

◆ bFromEVEX2of4

#define bFromEVEX2of4 (   evex)    (((~(evex)) & 0x20) >> 5)

Definition at line 38 of file X86DisassemblerDecoder.h.

◆ bFromEVEX4of4

#define bFromEVEX4of4 (   evex)    (((evex) & 0x10) >> 4)

Definition at line 47 of file X86DisassemblerDecoder.h.

◆ bFromREX

#define bFromREX (   rex)    ((rex) & 0x1)

Definition at line 34 of file X86DisassemblerDecoder.h.

◆ bFromVEX2of3

#define bFromVEX2of3 (   vex)    (((~(vex)) & 0x20) >> 5)

Definition at line 53 of file X86DisassemblerDecoder.h.

◆ bFromXOP2of3

#define bFromXOP2of3 (   xop)    (((~(xop)) & 0x20) >> 5)

Definition at line 67 of file X86DisassemblerDecoder.h.

◆ EA_BASES_16BIT

#define EA_BASES_16BIT
Value:
ENTRY(BX_DI) \
ENTRY(BP_SI) \
ENTRY(BP_DI) \
ENTRY(SI) \
ENTRY(DI) \
ENTRY(BP) \
ENTRY(BX) \
ENTRY(R8W) \
ENTRY(R9W) \
ENTRY(R10W) \
ENTRY(R11W) \
ENTRY(R12W) \
ENTRY(R13W) \
ENTRY(R14W) \
ENTRY(R15W)

Definition at line 97 of file X86DisassemblerDecoder.h.

◆ EA_BASES_32BIT

#define EA_BASES_32BIT
Value:
ENTRY(ECX) \
ENTRY(EDX) \
ENTRY(EBX) \
ENTRY(sib) \
ENTRY(EBP) \
ENTRY(ESI) \
ENTRY(EDI) \
ENTRY(R8D) \
ENTRY(R9D) \
ENTRY(R10D) \
ENTRY(R11D) \
ENTRY(R12D) \
ENTRY(R13D) \
ENTRY(R14D) \
ENTRY(R15D)

Definition at line 133 of file X86DisassemblerDecoder.h.

◆ EA_BASES_64BIT

#define EA_BASES_64BIT
Value:
ENTRY(RAX) \
ENTRY(RCX) \
ENTRY(RDX) \
ENTRY(RBX) \
ENTRY(sib64) \
ENTRY(RBP) \
ENTRY(RSI) \
ENTRY(RDI) \
ENTRY(R8) \
ENTRY(R9) \
ENTRY(R10) \
ENTRY(R11) \
ENTRY(R12) \
ENTRY(R13) \
ENTRY(R14) \
ENTRY(R15)

Definition at line 169 of file X86DisassemblerDecoder.h.

◆ ENTRY [1/5]

#define ENTRY (   x)    EA_BASE_##x,

Definition at line 470 of file X86DisassemblerDecoder.h.

◆ ENTRY [2/5]

#define ENTRY (   x)    EA_REG_##x,

Definition at line 470 of file X86DisassemblerDecoder.h.

◆ ENTRY [3/5]

#define ENTRY (   x)    SIB_INDEX_##x,

Definition at line 470 of file X86DisassemblerDecoder.h.

◆ ENTRY [4/5]

#define ENTRY (   x)    SIB_BASE_##x,

Definition at line 470 of file X86DisassemblerDecoder.h.

◆ ENTRY [5/5]

#define ENTRY (   x)    MODRM_REG_##x,

Definition at line 470 of file X86DisassemblerDecoder.h.

◆ indexFromSIB

#define indexFromSIB (   sib)    (((sib) & 0x38) >> 3)

Definition at line 29 of file X86DisassemblerDecoder.h.

◆ l2FromEVEX4of4

#define l2FromEVEX4of4 (   evex)    (((evex) & 0x40) >> 6)

Definition at line 45 of file X86DisassemblerDecoder.h.

◆ lFromEVEX4of4

#define lFromEVEX4of4 (   evex)    (((evex) & 0x20) >> 5)

Definition at line 46 of file X86DisassemblerDecoder.h.

◆ lFromVEX2of2

#define lFromVEX2of2 (   vex)    (((vex) & 0x4) >> 2)

Definition at line 62 of file X86DisassemblerDecoder.h.

◆ lFromVEX3of3

#define lFromVEX3of3 (   vex)    (((vex) & 0x4) >> 2)

Definition at line 57 of file X86DisassemblerDecoder.h.

◆ lFromXOP3of3

#define lFromXOP3of3 (   xop)    (((xop) & 0x4) >> 2)

Definition at line 71 of file X86DisassemblerDecoder.h.

◆ mmFromEVEX2of4

#define mmFromEVEX2of4 (   evex)    ((evex) & 0x3)

Definition at line 40 of file X86DisassemblerDecoder.h.

◆ mmmmmFromVEX2of3

#define mmmmmFromVEX2of3 (   vex)    ((vex) & 0x1f)

Definition at line 54 of file X86DisassemblerDecoder.h.

◆ mmmmmFromXOP2of3

#define mmmmmFromXOP2of3 (   xop)    ((xop) & 0x1f)

Definition at line 68 of file X86DisassemblerDecoder.h.

◆ modFromModRM

#define modFromModRM (   modRM)    (((modRM) & 0xc0) >> 6)

Definition at line 25 of file X86DisassemblerDecoder.h.

◆ ppFromEVEX3of4

#define ppFromEVEX3of4 (   evex)    ((evex) & 0x3)

Definition at line 43 of file X86DisassemblerDecoder.h.

◆ ppFromVEX2of2

#define ppFromVEX2of2 (   vex)    ((vex) & 0x3)

Definition at line 63 of file X86DisassemblerDecoder.h.

◆ ppFromVEX3of3

#define ppFromVEX3of3 (   vex)    ((vex) & 0x3)

Definition at line 58 of file X86DisassemblerDecoder.h.

◆ ppFromXOP3of3

#define ppFromXOP3of3 (   xop)    ((xop) & 0x3)

Definition at line 72 of file X86DisassemblerDecoder.h.

◆ r2FromEVEX2of4

#define r2FromEVEX2of4 (   evex)    (((~(evex)) & 0x10) >> 4)

Definition at line 39 of file X86DisassemblerDecoder.h.

◆ regFromModRM

#define regFromModRM (   modRM)    (((modRM) & 0x38) >> 3)

Definition at line 26 of file X86DisassemblerDecoder.h.

◆ REGS_16BIT

#define REGS_16BIT
Value:
ENTRY(AX) \
ENTRY(CX) \
ENTRY(DX) \
ENTRY(BX) \
ENTRY(SP) \
ENTRY(BP) \
ENTRY(SI) \
ENTRY(DI) \
ENTRY(R8W) \
ENTRY(R9W) \
ENTRY(R10W) \
ENTRY(R11W) \
ENTRY(R12W) \
ENTRY(R13W) \
ENTRY(R14W) \
ENTRY(R15W)

Definition at line 115 of file X86DisassemblerDecoder.h.

◆ REGS_32BIT

#define REGS_32BIT
Value:
ENTRY(ECX) \
ENTRY(EDX) \
ENTRY(EBX) \
ENTRY(ESP) \
ENTRY(EBP) \
ENTRY(ESI) \
ENTRY(EDI) \
ENTRY(R8D) \
ENTRY(R9D) \
ENTRY(R10D) \
ENTRY(R11D) \
ENTRY(R12D) \
ENTRY(R13D) \
ENTRY(R14D) \
ENTRY(R15D)

Definition at line 151 of file X86DisassemblerDecoder.h.

◆ REGS_64BIT

#define REGS_64BIT
Value:
ENTRY(RAX) \
ENTRY(RCX) \
ENTRY(RDX) \
ENTRY(RBX) \
ENTRY(RSP) \
ENTRY(RBP) \
ENTRY(RSI) \
ENTRY(RDI) \
ENTRY(R8) \
ENTRY(R9) \
ENTRY(R10) \
ENTRY(R11) \
ENTRY(R12) \
ENTRY(R13) \
ENTRY(R14) \
ENTRY(R15)

Definition at line 187 of file X86DisassemblerDecoder.h.

◆ REGS_8BIT

#define REGS_8BIT
Value:
ENTRY(AL) \
ENTRY(CL) \
ENTRY(DL) \
ENTRY(BL) \
ENTRY(AH) \
ENTRY(CH) \
ENTRY(DH) \
ENTRY(BH) \
ENTRY(R8B) \
ENTRY(R9B) \
ENTRY(R10B) \
ENTRY(R11B) \
ENTRY(R12B) \
ENTRY(R13B) \
ENTRY(R14B) \
ENTRY(R15B) \
ENTRY(SPL) \
ENTRY(BPL) \
ENTRY(SIL) \
ENTRY(DIL)

Definition at line 75 of file X86DisassemblerDecoder.h.

◆ REGS_BOUND

#define REGS_BOUND
Value:
ENTRY(BND0) \
ENTRY(BND1) \
ENTRY(BND2) \
ENTRY(BND3)

Definition at line 377 of file X86DisassemblerDecoder.h.

◆ REGS_CONTROL

#define REGS_CONTROL
Value:
ENTRY(CR0) \
ENTRY(CR1) \
ENTRY(CR2) \
ENTRY(CR3) \
ENTRY(CR4) \
ENTRY(CR5) \
ENTRY(CR6) \
ENTRY(CR7) \
ENTRY(CR8) \
ENTRY(CR9) \
ENTRY(CR10) \
ENTRY(CR11) \
ENTRY(CR12) \
ENTRY(CR13) \
ENTRY(CR14) \
ENTRY(CR15)

Definition at line 359 of file X86DisassemblerDecoder.h.

◆ REGS_DEBUG

#define REGS_DEBUG
Value:
ENTRY(DR0) \
ENTRY(DR1) \
ENTRY(DR2) \
ENTRY(DR3) \
ENTRY(DR4) \
ENTRY(DR5) \
ENTRY(DR6) \
ENTRY(DR7) \
ENTRY(DR8) \
ENTRY(DR9) \
ENTRY(DR10) \
ENTRY(DR11) \
ENTRY(DR12) \
ENTRY(DR13) \
ENTRY(DR14) \
ENTRY(DR15)

Definition at line 341 of file X86DisassemblerDecoder.h.

◆ REGS_MASK_PAIRS

#define REGS_MASK_PAIRS
Value:
ENTRY(K0_K1) \
ENTRY(K2_K3) \
ENTRY(K4_K5) \
ENTRY(K6_K7)

Definition at line 327 of file X86DisassemblerDecoder.h.

◆ REGS_MASKS

#define REGS_MASKS
Value:
ENTRY(K0) \
ENTRY(K1) \
ENTRY(K2) \
ENTRY(K3) \
ENTRY(K4) \
ENTRY(K5) \
ENTRY(K6) \
ENTRY(K7)

Definition at line 317 of file X86DisassemblerDecoder.h.

◆ REGS_MMX

#define REGS_MMX
Value:
ENTRY(MM0) \
ENTRY(MM1) \
ENTRY(MM2) \
ENTRY(MM3) \
ENTRY(MM4) \
ENTRY(MM5) \
ENTRY(MM6) \
ENTRY(MM7)

Definition at line 205 of file X86DisassemblerDecoder.h.

◆ REGS_SEGMENT

#define REGS_SEGMENT
Value:
ENTRY(ES) \
ENTRY(CS) \
ENTRY(SS) \
ENTRY(DS) \
ENTRY(FS) \
ENTRY(GS)

Definition at line 333 of file X86DisassemblerDecoder.h.

◆ REGS_TMM

#define REGS_TMM
Value:
ENTRY(TMM0) \
ENTRY(TMM1) \
ENTRY(TMM2) \
ENTRY(TMM3) \
ENTRY(TMM4) \
ENTRY(TMM5) \
ENTRY(TMM6) \
ENTRY(TMM7)

Definition at line 384 of file X86DisassemblerDecoder.h.

◆ REGS_XMM

#define REGS_XMM

Definition at line 215 of file X86DisassemblerDecoder.h.

◆ REGS_YMM

#define REGS_YMM

Definition at line 249 of file X86DisassemblerDecoder.h.

◆ REGS_ZMM

#define REGS_ZMM

Definition at line 283 of file X86DisassemblerDecoder.h.

◆ rFromEVEX2of4

#define rFromEVEX2of4 (   evex)    (((~(evex)) & 0x80) >> 7)

Definition at line 36 of file X86DisassemblerDecoder.h.

◆ rFromREX

#define rFromREX (   rex)    (((rex) & 0x4) >> 2)

Definition at line 32 of file X86DisassemblerDecoder.h.

◆ rFromVEX2of2

#define rFromVEX2of2 (   vex)    (((~(vex)) & 0x80) >> 7)

Definition at line 60 of file X86DisassemblerDecoder.h.

◆ rFromVEX2of3

#define rFromVEX2of3 (   vex)    (((~(vex)) & 0x80) >> 7)

Definition at line 51 of file X86DisassemblerDecoder.h.

◆ rFromXOP2of3

#define rFromXOP2of3 (   xop)    (((~(xop)) & 0x80) >> 7)

Definition at line 65 of file X86DisassemblerDecoder.h.

◆ rmFromModRM

#define rmFromModRM (   modRM)    ((modRM) & 0x7)

Definition at line 27 of file X86DisassemblerDecoder.h.

◆ scaleFromSIB

#define scaleFromSIB (   sib)    (((sib) & 0xc0) >> 6)

Definition at line 28 of file X86DisassemblerDecoder.h.

◆ v2FromEVEX4of4

#define v2FromEVEX4of4 (   evex)    (((~evex) & 0x8) >> 3)

Definition at line 48 of file X86DisassemblerDecoder.h.

◆ vvvvFromEVEX3of4

#define vvvvFromEVEX3of4 (   evex)    (((~(evex)) & 0x78) >> 3)

Definition at line 42 of file X86DisassemblerDecoder.h.

◆ vvvvFromVEX2of2

#define vvvvFromVEX2of2 (   vex)    (((~(vex)) & 0x78) >> 3)

Definition at line 61 of file X86DisassemblerDecoder.h.

◆ vvvvFromVEX3of3

#define vvvvFromVEX3of3 (   vex)    (((~(vex)) & 0x78) >> 3)

Definition at line 56 of file X86DisassemblerDecoder.h.

◆ vvvvFromXOP3of3

#define vvvvFromXOP3of3 (   vex)    (((~(vex)) & 0x78) >> 3)

Definition at line 70 of file X86DisassemblerDecoder.h.

◆ wFromEVEX3of4

#define wFromEVEX3of4 (   evex)    (((evex) & 0x80) >> 7)

Definition at line 41 of file X86DisassemblerDecoder.h.

◆ wFromREX

#define wFromREX (   rex)    (((rex) & 0x8) >> 3)

Definition at line 31 of file X86DisassemblerDecoder.h.

◆ wFromVEX3of3

#define wFromVEX3of3 (   vex)    (((vex) & 0x80) >> 7)

Definition at line 55 of file X86DisassemblerDecoder.h.

◆ wFromXOP3of3

#define wFromXOP3of3 (   xop)    (((xop) & 0x80) >> 7)

Definition at line 69 of file X86DisassemblerDecoder.h.

◆ xFromEVEX2of4

#define xFromEVEX2of4 (   evex)    (((~(evex)) & 0x40) >> 6)

Definition at line 37 of file X86DisassemblerDecoder.h.

◆ xFromREX

#define xFromREX (   rex)    (((rex) & 0x2) >> 1)

Definition at line 33 of file X86DisassemblerDecoder.h.

◆ xFromVEX2of3

#define xFromVEX2of3 (   vex)    (((~(vex)) & 0x40) >> 6)

Definition at line 52 of file X86DisassemblerDecoder.h.

◆ xFromXOP2of3

#define xFromXOP2of3 (   xop)    (((~(xop)) & 0x40) >> 6)

Definition at line 66 of file X86DisassemblerDecoder.h.

◆ zFromEVEX4of4

#define zFromEVEX4of4 (   evex)    (((evex) & 0x80) >> 7)

Definition at line 44 of file X86DisassemblerDecoder.h.

llvm::X86::BP_SI
@ BP_SI
Definition: X86Disassembler.cpp:1665
llvm::X86::BP_DI
@ BP_DI
Definition: X86Disassembler.cpp:1666
llvm::N86::EBP
@ EBP
Definition: X86MCTargetDesc.h:51
llvm::N86::EBX
@ EBX
Definition: X86MCTargetDesc.h:51
llvm::AArch64CC::AL
@ AL
Definition: AArch64BaseInfo.h:269
CH
AMD64 Optimization Manual has some nice information about optimizing integer multiplication by a constant How much of it applies to Intel s X86 implementation There are definite trade offs to xmm0 cvttss2siq rdx jb L3 subss xmm0 rax cvttss2siq rdx xorq rdx rax ret instead of xmm1 cvttss2siq rcx movaps xmm2 subss xmm2 cvttss2siq rax rdx xorq rax ucomiss xmm0 cmovb rax ret Seems like the jb branch has high likelihood of being taken It would have saved a few instructions It s not possible to reference CH
Definition: README-X86-64.txt:44
llvm::X86::BX_SI
@ BX_SI
Definition: X86Disassembler.cpp:1663
llvm::N86::ESP
@ ESP
Definition: X86MCTargetDesc.h:51
llvm::ARCISD::BL
@ BL
Definition: ARCISelLowering.h:34
llvm::X86AS::GS
@ GS
Definition: X86.h:187
llvm::N86::EAX
@ EAX
Definition: X86MCTargetDesc.h:51
llvm::X86::sib64
@ sib64
Definition: X86Disassembler.cpp:1668
llvm::X86::sib
@ sib
Definition: X86Disassembler.cpp:1667
llvm::X86::BX_DI
@ BX_DI
Definition: X86Disassembler.cpp:1664
AH
AMD64 Optimization Manual has some nice information about optimizing integer multiplication by a constant How much of it applies to Intel s X86 implementation There are definite trade offs to xmm0 cvttss2siq rdx jb L3 subss xmm0 rax cvttss2siq rdx xorq rdx rax ret instead of xmm1 cvttss2siq rcx movaps xmm2 subss xmm2 cvttss2siq rax rdx xorq rax ucomiss xmm0 cmovb rax ret Seems like the jb branch has high likelihood of being taken It would have saved a few instructions It s not possible to reference AH
Definition: README-X86-64.txt:44
llvm::X86AS::FS
@ FS
Definition: X86.h:188
SI
StandardInstrumentations SI(Debug, VerifyEach)
llvm::N86::EDX
@ EDX
Definition: X86MCTargetDesc.h:51
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::N86::EDI
@ EDI
Definition: X86MCTargetDesc.h:51
ENTRY
#define ENTRY(x)
Definition: X86DisassemblerDecoder.h:470
llvm::SIInstrFlags::DS
@ DS
Definition: SIDefines.h:52
BH
AMD64 Optimization Manual has some nice information about optimizing integer multiplication by a constant How much of it applies to Intel s X86 implementation There are definite trade offs to xmm0 cvttss2siq rdx jb L3 subss xmm0 rax cvttss2siq rdx xorq rdx rax ret instead of xmm1 cvttss2siq rcx movaps xmm2 subss xmm2 cvttss2siq rax rdx xorq rax ucomiss xmm0 cmovb rax ret Seems like the jb branch has high likelihood of being taken It would have saved a few instructions It s not possible to reference BH
Definition: README-X86-64.txt:44
llvm::N86::ECX
@ ECX
Definition: X86MCTargetDesc.h:51
llvm::N86::ESI
@ ESI
Definition: X86MCTargetDesc.h:51
llvm::X86AS::SS
@ SS
Definition: X86.h:189