Go to the documentation of this file.
17 #ifndef LLVM_C_BLAKE3_H
18 #define LLVM_C_BLAKE3_H
27 #define LLVM_BLAKE3_VERSION_STRING "1.3.1"
28 #define LLVM_BLAKE3_KEY_LEN 32
29 #define LLVM_BLAKE3_OUT_LEN 32
30 #define LLVM_BLAKE3_BLOCK_LEN 64
31 #define LLVM_BLAKE3_CHUNK_LEN 1024
32 #define LLVM_BLAKE3_MAX_DEPTH 54
void llvm_blake3_hasher_init_keyed(llvm_blake3_hasher *self, const uint8_t key[LLVM_BLAKE3_KEY_LEN])
#define LLVM_BLAKE3_BLOCK_LEN
#define LLVM_BLAKE3_MAX_DEPTH
void llvm_blake3_hasher_finalize_seek(const llvm_blake3_hasher *self, uint64_t seek, uint8_t *out, size_t out_len)
void llvm_blake3_hasher_init_derive_key(llvm_blake3_hasher *self, const char *context)
void llvm_blake3_hasher_finalize(const llvm_blake3_hasher *self, uint8_t *out, size_t out_len)
uint8_t blocks_compressed
The initial backend is deliberately restricted to z10 We should add support for later architectures at some point If an asm ties an i32 r result to an i64 input
void llvm_blake3_hasher_init_derive_key_raw(llvm_blake3_hasher *self, const void *context, size_t context_len)
#define LLVM_BLAKE3_KEY_LEN
void llvm_blake3_hasher_update(llvm_blake3_hasher *self, const void *input, size_t input_len)
const char * llvm_blake3_version(void)
void llvm_blake3_hasher_reset(llvm_blake3_hasher *self)
#define LLVM_BLAKE3_OUT_LEN
void llvm_blake3_hasher_init(llvm_blake3_hasher *self)
llvm_blake3_chunk_state chunk