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47 return (
X << R) | (
X >> (64 - R));
71 size_t Len =
Data.size();
73 const unsigned char *
P =
Data.bytes_begin();
74 const unsigned char *
const BEnd =
Data.bytes_end();
78 const unsigned char *
const Limit = BEnd - 32;
107 while (
P + 8 <= BEnd) {
This is an optimization pass for GlobalISel generic memory operations.
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
static const uint64_t PRIME64_2
static uint64_t round(uint64_t Acc, uint64_t Input)
static uint64_t mergeRound(uint64_t Acc, uint64_t Val)
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
static ManagedStatic< cl::opt< uint64_t >, CreateSeed > Seed
static uint64_t rotl64(uint64_t X, size_t R)
static const uint64_t PRIME64_3
StringRef - Represent a constant reference to a string, i.e.
static const uint64_t PRIME64_4
static const uint64_t PRIME64_5
static const uint64_t PRIME64_1
uint64_t read64le(const void *P)
uint32_t read32le(const void *P)
Reimplement select in terms of SEL *We would really like to support but we need to prove that the add doesn t need to overflow between the two bit chunks *Implement pre post increment support(e.g. PR935) *Implement smarter const ant generation for binops with large immediates. A few ARMv6T2 ops should be pattern matched
uint64_t xxHash64(llvm::StringRef Data)