LLVM  14.0.0git
M68kBaseInfo.h
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1 //===-- M68kBaseInfo.h - Top level definitions for M68k MC --*- C++ -*-----===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file contains small standalone helper functions and enum definitions
11 /// for the M68k target useful for the compiler back-end and the MC
12 /// libraries. As such, it deliberately does not include references to LLVM
13 /// core code gen types, passes, etc..
14 ///
15 //===----------------------------------------------------------------------===//
16 
17 #ifndef LLVM_LIB_TARGET_M68K_MCTARGETDESC_M68KBASEINFO_H
18 #define LLVM_LIB_TARGET_M68K_MCTARGETDESC_M68KBASEINFO_H
19 
20 #include "M68kMCTargetDesc.h"
21 
22 #include "llvm/MC/MCExpr.h"
23 #include "llvm/Support/DataTypes.h"
25 
26 #define GET_INSTRINFO_MI_OPS_INFO
27 #define GET_INSTRINFO_OPERAND_TYPES_ENUM
28 #define GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP
29 #include "M68kGenInstrInfo.inc"
30 
31 namespace llvm {
32 
33 namespace M68k {
34 
35 /// Enums for memory operand decoding. Supports these forms:
36 /// (d,An)
37 /// (d,An,Xn)
38 /// ([bd,An],Xn,od)
39 /// ([bd,An,Xn],od)
40 /// TODO Implement scaling other than 1
41 enum { MemDisp = 0, MemBase = 1, MemIndex = 2, MemOuter = 3 };
42 
43 /// Enums for pc-relative memory operand decoding. Supports these forms:
44 /// (d,PC)
45 /// (d,PC,Xn)
46 /// ([bd,PC],Xn,od)
47 /// ([bd,PC,Xn],od)
48 enum { PCRelDisp = 0, PCRelIndex = 1, PCRelOuter = 2 };
49 } // namespace M68k
50 
51 namespace M68kBeads {
52 enum {
53  Ctrl = 0x0,
54  Bits1 = 0x1,
55  Bits2 = 0x2,
56  Bits3 = 0x3,
57  Bits4 = 0x4,
58  DAReg = 0x5,
59  DA = 0x6,
60  Reg = 0x7,
61  DReg = 0x8,
62  Disp8 = 0x9,
63  Imm8 = 0xA,
64  Imm16 = 0xB,
65  Imm32 = 0xC,
66  Imm3 = 0xD,
67 };
68 
69 // Ctrl payload
70 enum {
71  Term = 0x0,
72  Ignore = 0x1,
73 };
74 } // namespace M68kBeads
75 
76 /// This namespace holds all of the target specific flags that instruction info
77 /// tracks.
78 namespace M68kII {
79 /// Target Operand Flag enum.
80 enum TOF {
81 
83 
84  /// On a symbol operand this indicates that the immediate is the absolute
85  /// address of the symbol.
87 
88  /// On a symbol operand this indicates that the immediate is the pc-relative
89  /// address of the symbol.
91 
92  /// On a symbol operand this indicates that the immediate is the offset to
93  /// the GOT entry for the symbol name from the base of the GOT.
94  ///
95  /// name@GOT
97 
98  /// On a symbol operand this indicates that the immediate is the offset to
99  /// the location of the symbol name from the base of the GOT.
100  ///
101  /// name@GOTOFF
103 
104  /// On a symbol operand this indicates that the immediate is offset to the
105  /// GOT entry for the symbol name from the current code location.
106  ///
107  /// name@GOTPCREL
109 
110  /// On a symbol operand this indicates that the immediate is offset to the
111  /// PLT entry of symbol name from the current code location.
112  ///
113  /// name@PLT
115 }; // enum TOF
116 
117 /// Return true if the specified TargetFlag operand is a reference to a stub
118 /// for a global, not the global itself.
119 inline static bool isGlobalStubReference(unsigned char TargetFlag) {
120  switch (TargetFlag) {
121  default:
122  return false;
123  case M68kII::MO_GOTPCREL: // pc-relative GOT reference.
124  case M68kII::MO_GOT: // normal GOT reference.
125  return true;
126  }
127 }
128 
129 /// Return True if the specified GlobalValue is a direct reference for a
130 /// symbol.
131 inline static bool isDirectGlobalReference(unsigned char Flag) {
132  switch (Flag) {
133  default:
134  return false;
135  case M68kII::MO_NO_FLAG:
138  return true;
139  }
140 }
141 
142 /// Return true if the specified global value reference is relative to a 32-bit
143 /// PIC base (M68kISD::GLOBAL_BASE_REG). If this is true, the addressing mode
144 /// has the PIC base register added in.
145 inline static bool isGlobalRelativeToPICBase(unsigned char TargetFlag) {
146  switch (TargetFlag) {
147  default:
148  return false;
149  case M68kII::MO_GOTOFF: // isPICStyleGOT: local global.
150  case M68kII::MO_GOT: // isPICStyleGOT: other global.
151  return true;
152  }
153 }
154 
155 /// Return True if the specified GlobalValue requires PC addressing mode.
156 inline static bool isPCRelGlobalReference(unsigned char Flag) {
157  switch (Flag) {
158  default:
159  return false;
160  case M68kII::MO_GOTPCREL:
162  return true;
163  }
164 }
165 
166 /// Return True if the Block is referenced using PC
167 inline static bool isPCRelBlockReference(unsigned char Flag) {
168  switch (Flag) {
169  default:
170  return false;
172  return true;
173  }
174 }
175 
176 static inline bool isAddressRegister(unsigned RegNo) {
177  switch (RegNo) {
178  case M68k::WA0:
179  case M68k::WA1:
180  case M68k::WA2:
181  case M68k::WA3:
182  case M68k::WA4:
183  case M68k::WA5:
184  case M68k::WA6:
185  case M68k::WSP:
186  case M68k::A0:
187  case M68k::A1:
188  case M68k::A2:
189  case M68k::A3:
190  case M68k::A4:
191  case M68k::A5:
192  case M68k::A6:
193  case M68k::SP:
194  return true;
195  default:
196  return false;
197  }
198 }
199 
200 static inline bool hasMultiMIOperands(unsigned Op, unsigned LogicalOpIdx) {
201  return M68k::getLogicalOperandSize(Op, LogicalOpIdx) > 1;
202 }
203 
204 static inline unsigned getMaskedSpillRegister(unsigned order) {
205  switch (order) {
206  default:
207  return 0;
208  case 0:
209  return M68k::D0;
210  case 1:
211  return M68k::D1;
212  case 2:
213  return M68k::D2;
214  case 3:
215  return M68k::D3;
216  case 4:
217  return M68k::D4;
218  case 5:
219  return M68k::D5;
220  case 6:
221  return M68k::D6;
222  case 7:
223  return M68k::D7;
224  case 8:
225  return M68k::A0;
226  case 9:
227  return M68k::A1;
228  case 10:
229  return M68k::A2;
230  case 11:
231  return M68k::A3;
232  case 12:
233  return M68k::A4;
234  case 13:
235  return M68k::A5;
236  case 14:
237  return M68k::A6;
238  case 15:
239  return M68k::SP;
240  }
241 }
242 
243 } // namespace M68kII
244 
245 } // namespace llvm
246 
247 #endif
llvm
This file implements support for optimizing divisions by a constant.
Definition: AllocatorList.h:23
llvm::M68kBeads::Imm3
@ Imm3
Definition: M68kBaseInfo.h:66
llvm::M68k::MemBase
@ MemBase
Definition: M68kBaseInfo.h:41
ErrorHandling.h
llvm::M68kII::isPCRelBlockReference
static bool isPCRelBlockReference(unsigned char Flag)
Return True if the Block is referenced using PC.
Definition: M68kBaseInfo.h:167
llvm::M68kBeads::DAReg
@ DAReg
Definition: M68kBaseInfo.h:58
llvm::M68kII::MO_PLT
@ MO_PLT
On a symbol operand this indicates that the immediate is offset to the PLT entry of symbol name from ...
Definition: M68kBaseInfo.h:114
llvm::M68kII::TOF
TOF
Target Operand Flag enum.
Definition: M68kBaseInfo.h:80
llvm::M68kII::isDirectGlobalReference
static bool isDirectGlobalReference(unsigned char Flag)
Return True if the specified GlobalValue is a direct reference for a symbol.
Definition: M68kBaseInfo.h:131
llvm::M68k::PCRelIndex
@ PCRelIndex
Definition: M68kBaseInfo.h:48
llvm::M68kII::MO_GOT
@ MO_GOT
On a symbol operand this indicates that the immediate is the offset to the GOT entry for the symbol n...
Definition: M68kBaseInfo.h:96
llvm::M68kII::MO_PC_RELATIVE_ADDRESS
@ MO_PC_RELATIVE_ADDRESS
On a symbol operand this indicates that the immediate is the pc-relative address of the symbol.
Definition: M68kBaseInfo.h:90
llvm::M68kBeads::Imm32
@ Imm32
Definition: M68kBaseInfo.h:65
llvm::M68kBeads::Bits2
@ Bits2
Definition: M68kBaseInfo.h:55
llvm::M68kII::isGlobalStubReference
static bool isGlobalStubReference(unsigned char TargetFlag)
Return true if the specified TargetFlag operand is a reference to a stub for a global,...
Definition: M68kBaseInfo.h:119
llvm::M68kII::MO_GOTOFF
@ MO_GOTOFF
On a symbol operand this indicates that the immediate is the offset to the location of the symbol nam...
Definition: M68kBaseInfo.h:102
llvm::M68kBeads::Imm8
@ Imm8
Definition: M68kBaseInfo.h:63
llvm::M68k::MemIndex
@ MemIndex
Definition: M68kBaseInfo.h:41
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:146
llvm::M68kBeads::DA
@ DA
Definition: M68kBaseInfo.h:59
llvm::M68kBeads::Ignore
@ Ignore
Definition: M68kBaseInfo.h:72
llvm::M68kBeads::Bits3
@ Bits3
Definition: M68kBaseInfo.h:56
llvm::M68kBeads::Term
@ Term
Definition: M68kBaseInfo.h:71
llvm::M68kBeads::DReg
@ DReg
Definition: M68kBaseInfo.h:61
llvm::M68kBeads::Disp8
@ Disp8
Definition: M68kBaseInfo.h:62
M68kMCTargetDesc.h
llvm::M68kII::hasMultiMIOperands
static bool hasMultiMIOperands(unsigned Op, unsigned LogicalOpIdx)
Definition: M68kBaseInfo.h:200
llvm::M68kII::isGlobalRelativeToPICBase
static bool isGlobalRelativeToPICBase(unsigned char TargetFlag)
Return true if the specified global value reference is relative to a 32-bit PIC base (M68kISD::GLOBAL...
Definition: M68kBaseInfo.h:145
llvm::M68kBeads::Bits1
@ Bits1
Definition: M68kBaseInfo.h:54
llvm::M68kII::isPCRelGlobalReference
static bool isPCRelGlobalReference(unsigned char Flag)
Return True if the specified GlobalValue requires PC addressing mode.
Definition: M68kBaseInfo.h:156
llvm::M68k::PCRelDisp
@ PCRelDisp
Definition: M68kBaseInfo.h:48
llvm::M68kBeads::Imm16
@ Imm16
Definition: M68kBaseInfo.h:64
llvm::M68k::MemOuter
@ MemOuter
Definition: M68kBaseInfo.h:41
llvm::M68kII::MO_ABSOLUTE_ADDRESS
@ MO_ABSOLUTE_ADDRESS
On a symbol operand this indicates that the immediate is the absolute address of the symbol.
Definition: M68kBaseInfo.h:86
llvm::M68k::PCRelOuter
@ PCRelOuter
Definition: M68kBaseInfo.h:48
llvm::M68k::MemDisp
@ MemDisp
Definition: M68kBaseInfo.h:41
llvm::M68kII::getMaskedSpillRegister
static unsigned getMaskedSpillRegister(unsigned order)
Definition: M68kBaseInfo.h:204
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:324
llvm::M68kBeads::Ctrl
@ Ctrl
Definition: M68kBaseInfo.h:53
llvm::M68kII::MO_GOTPCREL
@ MO_GOTPCREL
On a symbol operand this indicates that the immediate is offset to the GOT entry for the symbol name ...
Definition: M68kBaseInfo.h:108
llvm::M68kII::isAddressRegister
static bool isAddressRegister(unsigned RegNo)
Definition: M68kBaseInfo.h:176
llvm::M68kII::MO_NO_FLAG
@ MO_NO_FLAG
Definition: M68kBaseInfo.h:82
DataTypes.h
llvm::M68kBeads::Reg
@ Reg
Definition: M68kBaseInfo.h:60
llvm::M68kBeads::Bits4
@ Bits4
Definition: M68kBaseInfo.h:57
MCExpr.h