LLVM
17.0.0git
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Enumerations | |
enum | EdgeKind_riscv : Edge::Kind { R_RISCV_32 = Edge::FirstRelocation, R_RISCV_64, R_RISCV_BRANCH, R_RISCV_JAL, R_RISCV_CALL, R_RISCV_CALL_PLT, R_RISCV_GOT_HI20, R_RISCV_PCREL_HI20, R_RISCV_PCREL_LO12_I, R_RISCV_PCREL_LO12_S, R_RISCV_HI20, R_RISCV_LO12_I, R_RISCV_LO12_S, R_RISCV_ADD8, R_RISCV_ADD16, R_RISCV_ADD32, R_RISCV_ADD64, R_RISCV_SUB8, R_RISCV_SUB16, R_RISCV_SUB32, R_RISCV_SUB64, R_RISCV_RVC_BRANCH, R_RISCV_RVC_JUMP, R_RISCV_SUB6, R_RISCV_SET6, R_RISCV_SET8, R_RISCV_SET16, R_RISCV_SET32, R_RISCV_32_PCREL } |
Represents riscv fixups. More... | |
Functions | |
const char * | getEdgeKindName (Edge::Kind K) |
Returns a string name for the given riscv edge. More... | |
Represents riscv fixups.
Ordered in the same way as the relocations in include/llvm/BinaryFormat/ELFRelocs/RISCV.def.
Enumerator | |
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R_RISCV_32 | A plain 32-bit pointer value relocation. Fixup expression: Fixup <= Target + Addend : uint32 |
R_RISCV_64 | A plain 64-bit pointer value relocation. Fixup expression: Fixup <- Target + Addend : uint32 |
R_RISCV_BRANCH | PC-relative branch pointer value relocation. Fixup expression: Fixup <- (Target - Fixup + Addend) |
R_RISCV_JAL | High 20 bits of PC-relative jump pointer value relocation. Fixup expression: Fixup <- Target - Fixup + Addend |
R_RISCV_CALL | PC relative call. Fixup expression: Fixup <- (Target - Fixup + Addend) |
R_RISCV_CALL_PLT | PC relative call by PLT. Fixup expression: Fixup <- (Target - Fixup + Addend) |
R_RISCV_GOT_HI20 | PC relative GOT offset. Fixup expression: Fixup <- (GOT - Fixup + Addend) >> 12 |
R_RISCV_PCREL_HI20 | High 20 bits of PC relative relocation. Fixup expression: Fixup <- (Target - Fixup + Addend + 0x800) >> 12 |
R_RISCV_PCREL_LO12_I | Low 12 bits of PC relative relocation, used by I type instruction format. Fixup expression: Fixup <- (Target - Fixup + Addend) & 0xFFF |
R_RISCV_PCREL_LO12_S | Low 12 bits of PC relative relocation, used by S type instruction format. Fixup expression: Fixup <- (Target - Fixup + Addend) & 0xFFF |
R_RISCV_HI20 | High 20 bits of 32-bit pointer value relocation. Fixup expression Fixup <- (Target + Addend + 0x800) >> 12 |
R_RISCV_LO12_I | Low 12 bits of 32-bit pointer value relocation. Fixup expression Fixup <- (Target + Addend) & 0xFFF |
R_RISCV_LO12_S | Low 12 bits of 32-bit pointer value relocation, used by S type instruction format. Fixup expression Fixup <- (Target + Addend) & 0xFFF |
R_RISCV_ADD8 | 8 bits label addition Fixup expression Fixup <- (Target - *{1}Fixup + Addend) |
R_RISCV_ADD16 | 16 bits label addition Fixup expression Fixup <- (Target - *{2}Fixup + Addend) |
R_RISCV_ADD32 | 32 bits label addition Fixup expression: Fixup <- (Target - *{4}Fixup + Addend) |
R_RISCV_ADD64 | 64 bits label addition Fixup expression: Fixup <- (Target - *{8}Fixup + Addend) |
R_RISCV_SUB8 | 8 bits label subtraction Fixup expression Fixup <- (Target - *{1}Fixup - Addend) |
R_RISCV_SUB16 | 16 bits label subtraction Fixup expression Fixup <- (Target - *{2}Fixup - Addend) |
R_RISCV_SUB32 | 32 bits label subtraction Fixup expression Fixup <- (Target - *{4}Fixup - Addend) |
R_RISCV_SUB64 | 64 bits label subtraction Fixup expression Fixup <- (Target - *{8}Fixup - Addend) |
R_RISCV_RVC_BRANCH | 8-bit PC-relative branch offset Fixup expression: Fixup <- (Target - Fixup + Addend) |
R_RISCV_RVC_JUMP | 11-bit PC-relative jump offset Fixup expression: Fixup <- (Target - Fixup + Addend) |
R_RISCV_SUB6 | 6 bits label subtraction Fixup expression Fixup <- (Target - *{1}Fixup - Addend) |
R_RISCV_SET6 | Local label assignment. Fixup expression: Fixup <- (Target + Addend) |
R_RISCV_SET8 | Local label assignment. Fixup expression: Fixup <- (Target + Addend) |
R_RISCV_SET16 | Local label assignment. Fixup expression: Fixup <- (Target + Addend) |
R_RISCV_SET32 | Local label assignment. Fixup expression: Fixup <- (Target + Addend) |
R_RISCV_32_PCREL | 32 bits PC relative relocation Fixup expression: Fixup <- (Target - Fixup + Addend) |
const char * llvm::jitlink::riscv::getEdgeKindName | ( | Edge::Kind | K | ) |
Returns a string name for the given riscv edge.
For debugging purposes only
Definition at line 21 of file riscv.cpp.
References llvm::jitlink::getGenericEdgeKindName(), R_RISCV_32, R_RISCV_32_PCREL, R_RISCV_64, R_RISCV_ADD16, R_RISCV_ADD32, R_RISCV_ADD64, R_RISCV_ADD8, R_RISCV_BRANCH, R_RISCV_CALL, R_RISCV_CALL_PLT, R_RISCV_GOT_HI20, R_RISCV_HI20, R_RISCV_JAL, R_RISCV_LO12_I, R_RISCV_LO12_S, R_RISCV_PCREL_HI20, R_RISCV_PCREL_LO12_I, R_RISCV_PCREL_LO12_S, R_RISCV_RVC_BRANCH, R_RISCV_RVC_JUMP, R_RISCV_SET16, R_RISCV_SET32, R_RISCV_SET6, R_RISCV_SET8, R_RISCV_SUB16, R_RISCV_SUB32, R_RISCV_SUB6, R_RISCV_SUB64, and R_RISCV_SUB8.