LLVM 17.0.0git
riscv.cpp
Go to the documentation of this file.
1//===------ riscv.cpp - Generic JITLink riscv edge kinds, utilities -------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Generic utilities for graphs representing riscv objects.
10//
11//===----------------------------------------------------------------------===//
12
14
15#define DEBUG_TYPE "jitlink"
16
17namespace llvm {
18namespace jitlink {
19namespace riscv {
20
22 switch (K) {
23 case R_RISCV_32:
24 return "R_RISCV_32";
25 case R_RISCV_64:
26 return "R_RISCV_64";
27 case R_RISCV_BRANCH:
28 return "R_RISCV_BRANCH";
29 case R_RISCV_JAL:
30 return "R_RISCV_JAL";
31 case R_RISCV_CALL:
32 return "R_RISCV_CALL";
34 return "R_RISCV_CALL_PLT";
36 return "R_RISCV_GOT_HI20";
38 return "R_RISCV_PCREL_HI20";
40 return "R_RISCV_PCREL_LO12_I";
42 return "R_RISCV_PCREL_LO12_S";
43 case R_RISCV_HI20:
44 return "R_RISCV_HI20";
45 case R_RISCV_LO12_I:
46 return "R_RISCV_LO12_I";
47 case R_RISCV_LO12_S:
48 return "R_RISCV_LO12_S";
49 case R_RISCV_ADD8:
50 return "R_RISCV_ADD8";
51 case R_RISCV_ADD16:
52 return "R_RISCV_ADD16";
53 case R_RISCV_ADD32:
54 return "R_RISCV_ADD32";
55 case R_RISCV_ADD64:
56 return "R_RISCV_ADD64";
57 case R_RISCV_SUB8:
58 return "R_RISCV_SUB8";
59 case R_RISCV_SUB16:
60 return "R_RISCV_SUB16";
61 case R_RISCV_SUB32:
62 return "R_RISCV_SUB32";
63 case R_RISCV_SUB64:
64 return "R_RISCV_SUB64";
66 return "R_RISCV_RVC_BRANCH";
68 return "R_RISCV_RVC_JUMP";
69 case R_RISCV_SUB6:
70 return "R_RISCV_SUB6";
71 case R_RISCV_SET6:
72 return "R_RISCV_SET6";
73 case R_RISCV_SET8:
74 return "R_RISCV_SET8";
75 case R_RISCV_SET16:
76 return "R_RISCV_SET16";
77 case R_RISCV_SET32:
78 return "R_RISCV_SET32";
80 return "R_RISCV_32_PCREL";
81 }
82 return getGenericEdgeKindName(K);
83}
84} // namespace riscv
85} // namespace jitlink
86} // namespace llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18