LLVM  15.0.0git
riscv.h
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1 //===-- riscv.h - Generic JITLink riscv edge kinds, utilities -*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Generic utilities for graphs representing riscv objects.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_EXECUTIONENGINE_JITLINK_RISCV_H
14 #define LLVM_EXECUTIONENGINE_JITLINK_RISCV_H
15 
17 
18 namespace llvm {
19 namespace jitlink {
20 namespace riscv {
21 
22 /// Represets riscv fixups
24 
25  // TODO: Capture and replace to generic fixups
26  /// A plain 32-bit pointer value relocation
27  ///
28  /// Fixup expression:
29  /// Fixup <= Target + Addend : uint32
30  ///
32 
33  /// A plain 64-bit pointer value relocation
34  ///
35  /// Fixup expression:
36  /// Fixup <- Target + Addend : uint32
37  ///
39 
40  /// PC-relative branch pointer value relocation
41  ///
42  /// Fixup expression:
43  /// Fixup <- (Target - Fixup + Addend)
44  ///
46 
47  /// High 20 bits of PC-relative jump pointer value relocation
48  ///
49  /// Fixup expression:
50  /// Fixup <- Target - Fixup + Addend
51  ///
53 
54  /// High 20 bits of 32-bit pointer value relocation
55  ///
56  /// Fixup expression
57  /// Fixup <- (Target + Addend + 0x800) >> 12
59 
60  /// Low 12 bits of 32-bit pointer value relocation
61  ///
62  /// Fixup expression
63  /// Fixup <- (Target + Addend) & 0xFFF
65  /// High 20 bits of PC relative relocation
66  ///
67  /// Fixup expression:
68  /// Fixup <- (Target - Fixup + Addend + 0x800) >> 12
70 
71  /// Low 12 bits of PC relative relocation, used by I type instruction format
72  ///
73  /// Fixup expression:
74  /// Fixup <- (Target - Fixup + Addend) & 0xFFF
76 
77  /// Low 12 bits of PC relative relocation, used by S type instruction format
78  ///
79  /// Fixup expression:
80  /// Fixup <- (Target - Fixup + Addend) & 0xFFF
82 
83  /// PC relative call
84  ///
85  /// Fixup expression:
86  /// Fixup <- (Target - Fixup + Addend)
88 
89  /// 32 bits PC relative relocation
90  ///
91  /// Fixup expression:
92  /// Fixup <- (Target - Fixup + Addend)
94 
95  /// PC relative GOT offset
96  ///
97  /// Fixup expression:
98  /// Fixup <- (GOT - Fixup + Addend) >> 12
100 
101  /// PC relative call by PLT
102  ///
103  /// Fixup expression:
104  /// Fixup <- (Target - Fixup + Addend)
106 
107  /// 64 bits label addition
108  ///
109  /// Fixup expression:
110  /// Fixup <- (Target - *{8}Fixup + Addend)
112 
113  /// 32 bits label addition
114  ///
115  /// Fixup expression:
116  /// Fixup <- (Target - *{4}Fixup + Addend)
118 
119  /// 16 bits label addition
120  ///
121  /// Fixup expression
122  /// Fixup <- (Target - *{2}Fixup + Addend)
124 
125  /// 8 bits label addition
126  ///
127  /// Fixup expression
128  /// Fixup <- (Target - *{1}Fixup + Addend)
130 
131  /// 64 bits label subtraction
132  ///
133  /// Fixup expression
134  /// Fixup <- (Target - *{8}Fixup - Addend)
136 
137  /// 32 bits label subtraction
138  ///
139  /// Fixup expression
140  /// Fixup <- (Target - *{4}Fixup - Addend)
142 
143  /// 16 bits label subtraction
144  ///
145  /// Fixup expression
146  /// Fixup <- (Target - *{2}Fixup - Addend)
148 
149  /// 8 bits label subtraction
150  ///
151  /// Fixup expression
152  /// Fixup <- (Target - *{1}Fixup - Addend)
154 
155  /// 6 bits label subtraction
156  ///
157  /// Fixup expression
158  /// Fixup <- (Target - *{1}Fixup - Addend)
160 
161  /// Local label assignment
162  ///
163  /// Fixup expression:
164  /// Fixup <- (Target + Addend)
166 
167  /// Local label assignment
168  ///
169  /// Fixup expression:
170  /// Fixup <- (Target + Addend)
172 
173  /// Local label assignment
174  ///
175  /// Fixup expression:
176  /// Fixup <- (Target + Addend)
178 
179  /// Local label assignment
180  ///
181  /// Fixup expression:
182  /// Fixup <- (Target + Addend)
184 };
185 
186 /// Returns a string name for the given riscv edge. For debugging purposes
187 /// only
188 const char *getEdgeKindName(Edge::Kind K);
189 } // namespace riscv
190 } // namespace jitlink
191 } // namespace llvm
192 
193 #endif
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17