llvm::yaml::MappingTraits< SIMachineFunctionInfo > Struct Reference

#include "Target/AMDGPU/SIMachineFunctionInfo.h"

Inheritance diagram for llvm::yaml::MappingTraits< SIMachineFunctionInfo >:

Static Public Member Functions
static void	mapping (IO &YamlIO, SIMachineFunctionInfo &MFI)

Detailed Description

Definition at line 317 of file SIMachineFunctionInfo.h.

Member Function Documentation

mapping()

void llvm::yaml::MappingTraits< SIMachineFunctionInfo >::mapping ( IO & YamlIO, SIMachineFunctionInfo & MFI )

inlinestatic

Definition at line 318 of file SIMachineFunctionInfo.h.

References llvm::yaml::SIMachineFunctionInfo::ArgInfo, llvm::yaml::SIMachineFunctionInfo::BytesInStackArgArea, llvm::DefaultMemoryClusterDWordsLimit, llvm::yaml::SIMachineFunctionInfo::DynamicVGPRBlockSize, llvm::yaml::SIMachineFunctionInfo::DynLDSAlign, llvm::yaml::SIMachineFunctionInfo::ExplicitKernArgSize, llvm::yaml::SIMachineFunctionInfo::FrameOffsetReg, llvm::yaml::SIMachineFunctionInfo::GDSSize, llvm::yaml::SIMachineFunctionInfo::HasInitWholeWave, llvm::yaml::SIMachineFunctionInfo::HasSpilledSGPRs, llvm::yaml::SIMachineFunctionInfo::HasSpilledVGPRs, llvm::yaml::SIMachineFunctionInfo::HighBitsOf32BitAddress, llvm::yaml::SIMachineFunctionInfo::IsChainFunction, llvm::yaml::SIMachineFunctionInfo::IsEntryFunction, llvm::yaml::SIMachineFunctionInfo::IsWholeWaveFunction, llvm::yaml::SIMachineFunctionInfo::LDSSize, llvm::yaml::SIMachineFunctionInfo::LongBranchReservedReg, llvm::yaml::IO::mapOptional(), llvm::yaml::SIMachineFunctionInfo::MaxKernArgAlign, llvm::yaml::SIMachineFunctionInfo::MaxMemoryClusterDWords, llvm::yaml::SIMachineFunctionInfo::MemoryBound, llvm::yaml::SIMachineFunctionInfo::Mode, llvm::yaml::SIMachineFunctionInfo::NoSignedZerosFPMath, llvm::yaml::SIMachineFunctionInfo::NumWaveDispatchSGPRs, llvm::yaml::SIMachineFunctionInfo::NumWaveDispatchVGPRs, llvm::yaml::SIMachineFunctionInfo::Occupancy, llvm::yaml::SIMachineFunctionInfo::PSInputAddr, llvm::yaml::SIMachineFunctionInfo::PSInputEnable, llvm::yaml::SIMachineFunctionInfo::ReturnsVoid, llvm::yaml::SIMachineFunctionInfo::ScavengeFI, llvm::yaml::SIMachineFunctionInfo::ScratchReservedForDynamicVGPRs, llvm::yaml::SIMachineFunctionInfo::ScratchRSrcReg, llvm::yaml::SIMachineFunctionInfo::SGPRForEXECCopy, llvm::yaml::SIMachineFunctionInfo::SpillPhysVGPRS, llvm::yaml::SIMachineFunctionInfo::StackPtrOffsetReg, llvm::yaml::SIMachineFunctionInfo::VGPRForAGPRCopy, llvm::yaml::SIMachineFunctionInfo::WaveLimiter, and llvm::yaml::SIMachineFunctionInfo::WWMReservedRegs.

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The documentation for this struct was generated from the following file:

• lib/Target/AMDGPU/SIMachineFunctionInfo.h