LLVM  12.0.0git
Public Member Functions | List of all members
llvm::RISCVAsmBackend Class Reference

#include "Target/RISCV/MCTargetDesc/RISCVAsmBackend.h"

Inheritance diagram for llvm::RISCVAsmBackend:
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Public Member Functions

 RISCVAsmBackend (const MCSubtargetInfo &STI, uint8_t OSABI, bool Is64Bit, const MCTargetOptions &Options)
 
 ~RISCVAsmBackend () override
 
void setForceRelocs ()
 
bool willForceRelocations () const
 
bool requiresDiffExpressionRelocations () const override
 Check whether the given target requires emitting differences of two symbols as a set of relocations. More...
 
bool shouldInsertExtraNopBytesForCodeAlign (const MCAlignFragment &AF, unsigned &Size) override
 Hook to check if extra nop bytes must be inserted for alignment directive. More...
 
bool shouldInsertFixupForCodeAlign (MCAssembler &Asm, const MCAsmLayout &Layout, MCAlignFragment &AF) override
 Hook which indicates if the target requires a fixup to be generated when handling an align directive in an executable section. More...
 
bool evaluateTargetFixup (const MCAssembler &Asm, const MCAsmLayout &Layout, const MCFixup &Fixup, const MCFragment *DF, const MCValue &Target, uint64_t &Value, bool &WasForced) override
 
void applyFixup (const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef< char > Data, uint64_t Value, bool IsResolved, const MCSubtargetInfo *STI) const override
 Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup and following the fixup kind as appropriate. More...
 
std::unique_ptr< MCObjectTargetWritercreateObjectTargetWriter () const override
 
bool shouldForceRelocation (const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target) override
 Hook to check if a relocation is needed for some target specific reason. More...
 
bool fixupNeedsRelaxation (const MCFixup &Fixup, uint64_t Value, const MCRelaxableFragment *DF, const MCAsmLayout &Layout) const override
 Simple predicate for targets where !Resolved implies requiring relaxation. More...
 
bool fixupNeedsRelaxationAdvanced (const MCFixup &Fixup, bool Resolved, uint64_t Value, const MCRelaxableFragment *DF, const MCAsmLayout &Layout, const bool WasForced) const override
 Target specific predicate for whether a given fixup requires the associated instruction to be relaxed. More...
 
unsigned getNumFixupKinds () const override
 Get the number of target specific fixup kinds. More...
 
Optional< MCFixupKindgetFixupKind (StringRef Name) const override
 Map a relocation name used in .reloc to a fixup kind. More...
 
const MCFixupKindInfogetFixupKindInfo (MCFixupKind Kind) const override
 Get information on a fixup kind. More...
 
bool mayNeedRelaxation (const MCInst &Inst, const MCSubtargetInfo &STI) const override
 Check whether the given instruction may need relaxation. More...
 
unsigned getRelaxedOpcode (unsigned Op) const
 
void relaxInstruction (MCInst &Inst, const MCSubtargetInfo &STI) const override
 Relax the instruction in the given fragment to the next wider instruction. More...
 
bool writeNopData (raw_ostream &OS, uint64_t Count) const override
 Write an (optimal) nop sequence of Count bytes to the given output. More...
 
const MCTargetOptionsgetTargetOptions () const
 
RISCVABI::ABI getTargetABI () const
 
- Public Member Functions inherited from llvm::MCAsmBackend
 MCAsmBackend (const MCAsmBackend &)=delete
 
MCAsmBackendoperator= (const MCAsmBackend &)=delete
 
virtual ~MCAsmBackend ()
 
virtual bool allowAutoPadding () const
 Return true if this target might automatically pad instructions and thus need to emit padding enable/disable directives around sensative code. More...
 
virtual bool allowEnhancedRelaxation () const
 Return true if this target allows an unrelaxable instruction to be emitted into RelaxableFragment and then we can increase its size in a tricky way for optimization. More...
 
virtual void emitInstructionBegin (MCObjectStreamer &OS, const MCInst &Inst)
 Give the target a chance to manipulate state related to instruction alignment (e.g. More...
 
virtual void emitInstructionEnd (MCObjectStreamer &OS, const MCInst &Inst)
 
virtual void reset ()
 lifetime management More...
 
std::unique_ptr< MCObjectWritercreateObjectWriter (raw_pwrite_stream &OS) const
 Create a new MCObjectWriter instance for use by the assembler backend to emit the final object file. More...
 
std::unique_ptr< MCObjectWritercreateDwoObjectWriter (raw_pwrite_stream &OS, raw_pwrite_stream &DwoOS) const
 Create an MCObjectWriter that writes two object files: a .o file which is linked into the final program and a .dwo file which is used by debuggers. More...
 
virtual unsigned getMinimumNopSize () const
 Returns the minimum size of a nop in bytes on this target. More...
 
virtual void finishLayout (MCAssembler const &Asm, MCAsmLayout &Layout) const
 Give backend an opportunity to finish layout after relaxation. More...
 
virtual void handleAssemblerFlag (MCAssemblerFlag Flag)
 Handle any target-specific assembler flags. By default, do nothing. More...
 
virtual uint32_t generateCompactUnwindEncoding (ArrayRef< MCCFIInstruction >) const
 Generate the compact unwind encoding for the CFI instructions. More...
 
virtual bool isMicroMips (const MCSymbol *Sym) const
 Check whether a given symbol has been flagged with MICROMIPS flag. More...
 

Additional Inherited Members

- Public Attributes inherited from llvm::MCAsmBackend
const support::endianness Endian
 
- Protected Member Functions inherited from llvm::MCAsmBackend
 MCAsmBackend (support::endianness Endian)
 

Detailed Description

Definition at line 24 of file RISCVAsmBackend.h.

Constructor & Destructor Documentation

◆ RISCVAsmBackend()

llvm::RISCVAsmBackend::RISCVAsmBackend ( const MCSubtargetInfo STI,
uint8_t  OSABI,
bool  Is64Bit,
const MCTargetOptions Options 
)
inline

◆ ~RISCVAsmBackend()

llvm::RISCVAsmBackend::~RISCVAsmBackend ( )
inlineoverride

Definition at line 41 of file RISCVAsmBackend.h.

Member Function Documentation

◆ applyFixup()

void RISCVAsmBackend::applyFixup ( const MCAssembler Asm,
const MCFixup Fixup,
const MCValue Target,
MutableArrayRef< char Data,
uint64_t  Value,
bool  IsResolved,
const MCSubtargetInfo STI 
) const
overridevirtual

Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup and following the fixup kind as appropriate.

Errors (such as an out of range fixup value) should be reported via Ctx. The STI is present only for fragments of type MCRelaxableFragment and MCDataFragment with hasInstructions() == true.

Implements llvm::MCAsmBackend.

Definition at line 380 of file RISCVAsmBackend.cpp.

References adjustFixupValue(), llvm::alignTo(), assert(), llvm::FirstLiteralRelocationKind, llvm::MCAssembler::getContext(), getFixupKindInfo(), llvm::MCFixup::getKind(), llvm::MCFixup::getOffset(), Info, llvm::ArrayRef< T >::size(), llvm::MCFixupKindInfo::TargetOffset, and llvm::MCFixupKindInfo::TargetSize.

Referenced by requiresDiffExpressionRelocations().

◆ createObjectTargetWriter()

std::unique_ptr< MCObjectTargetWriter > RISCVAsmBackend::createObjectTargetWriter ( ) const
overridevirtual

Implements llvm::MCAsmBackend.

Definition at line 465 of file RISCVAsmBackend.cpp.

References llvm::createRISCVELFObjectWriter().

Referenced by requiresDiffExpressionRelocations().

◆ evaluateTargetFixup()

bool RISCVAsmBackend::evaluateTargetFixup ( const MCAssembler Asm,
const MCAsmLayout Layout,
const MCFixup Fixup,
const MCFragment DF,
const MCValue Target,
uint64_t &  Value,
bool WasForced 
)
overridevirtual

◆ fixupNeedsRelaxation()

bool llvm::RISCVAsmBackend::fixupNeedsRelaxation ( const MCFixup Fixup,
uint64_t  Value,
const MCRelaxableFragment DF,
const MCAsmLayout Layout 
) const
inlineoverridevirtual

Simple predicate for targets where !Resolved implies requiring relaxation.

Implements llvm::MCAsmBackend.

Definition at line 84 of file RISCVAsmBackend.h.

References fixupNeedsRelaxationAdvanced(), and llvm_unreachable.

◆ fixupNeedsRelaxationAdvanced()

bool RISCVAsmBackend::fixupNeedsRelaxationAdvanced ( const MCFixup Fixup,
bool  Resolved,
uint64_t  Value,
const MCRelaxableFragment DF,
const MCAsmLayout Layout,
const bool  WasForced 
) const
overridevirtual

Target specific predicate for whether a given fixup requires the associated instruction to be relaxed.

Reimplemented from llvm::MCAsmBackend.

Definition at line 114 of file RISCVAsmBackend.cpp.

References llvm::RISCV::fixup_riscv_rvc_branch, llvm::RISCV::fixup_riscv_rvc_jump, and llvm::MCFixup::getTargetKind().

Referenced by fixupNeedsRelaxation().

◆ getFixupKind()

Optional< MCFixupKind > RISCVAsmBackend::getFixupKind ( StringRef  Name) const
overridevirtual

Map a relocation name used in .reloc to a fixup kind.

Reimplemented from llvm::MCAsmBackend.

Definition at line 26 of file RISCVAsmBackend.cpp.

References ELF_RELOC, llvm::FirstLiteralRelocationKind, llvm::MCSubtargetInfo::getTargetTriple(), llvm::Triple::isOSBinFormatELF(), Name, llvm::None, X, and Y.

Referenced by getNumFixupKinds().

◆ getFixupKindInfo()

const MCFixupKindInfo & RISCVAsmBackend::getFixupKindInfo ( MCFixupKind  Kind) const
overridevirtual

◆ getNumFixupKinds()

unsigned llvm::RISCVAsmBackend::getNumFixupKinds ( ) const
inlineoverridevirtual

Get the number of target specific fixup kinds.

Implements llvm::MCAsmBackend.

Definition at line 96 of file RISCVAsmBackend.h.

References getFixupKind(), getFixupKindInfo(), getRelaxedOpcode(), mayNeedRelaxation(), Name, llvm::RISCV::NumTargetFixupKinds, relaxInstruction(), and writeNopData().

Referenced by getFixupKindInfo().

◆ getRelaxedOpcode()

unsigned RISCVAsmBackend::getRelaxedOpcode ( unsigned  Op) const

Definition at line 181 of file RISCVAsmBackend.cpp.

Referenced by getNumFixupKinds(), and mayNeedRelaxation().

◆ getTargetABI()

RISCVABI::ABI llvm::RISCVAsmBackend::getTargetABI ( ) const
inline

Definition at line 114 of file RISCVAsmBackend.h.

◆ getTargetOptions()

const MCTargetOptions& llvm::RISCVAsmBackend::getTargetOptions ( ) const
inline

Definition at line 113 of file RISCVAsmBackend.h.

◆ mayNeedRelaxation()

bool RISCVAsmBackend::mayNeedRelaxation ( const MCInst Inst,
const MCSubtargetInfo STI 
) const
overridevirtual

Check whether the given instruction may need relaxation.

Parameters
Inst- The instruction to test.
STI- The MCSubtargetInfo in effect when the instruction was encoded.

Implements llvm::MCAsmBackend.

Definition at line 195 of file RISCVAsmBackend.cpp.

References llvm::MCInst::getOpcode(), and getRelaxedOpcode().

Referenced by getNumFixupKinds().

◆ relaxInstruction()

void RISCVAsmBackend::relaxInstruction ( MCInst Inst,
const MCSubtargetInfo STI 
) const
overridevirtual

Relax the instruction in the given fragment to the next wider instruction.

Parameters
[out]InstThe instruction to relax, which is also the relaxed instruction.
STIthe subtarget information for the associated instruction.

Reimplemented from llvm::MCAsmBackend.

Definition at line 142 of file RISCVAsmBackend.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), llvm_unreachable, and llvm::MCInst::setOpcode().

Referenced by getNumFixupKinds().

◆ requiresDiffExpressionRelocations()

bool llvm::RISCVAsmBackend::requiresDiffExpressionRelocations ( ) const
inlineoverridevirtual

Check whether the given target requires emitting differences of two symbols as a set of relocations.

Reimplemented from llvm::MCAsmBackend.

Definition at line 55 of file RISCVAsmBackend.h.

References applyFixup(), llvm::HexStyle::Asm, createObjectTargetWriter(), llvm::Data, DF, evaluateTargetFixup(), Fixup, shouldForceRelocation(), shouldInsertExtraNopBytesForCodeAlign(), shouldInsertFixupForCodeAlign(), Size, and willForceRelocations().

◆ setForceRelocs()

void llvm::RISCVAsmBackend::setForceRelocs ( )
inline

Definition at line 43 of file RISCVAsmBackend.h.

Referenced by matchRegisterNameHelper().

◆ shouldForceRelocation()

bool RISCVAsmBackend::shouldForceRelocation ( const MCAssembler Asm,
const MCFixup Fixup,
const MCValue Target 
)
overridevirtual

◆ shouldInsertExtraNopBytesForCodeAlign()

bool RISCVAsmBackend::shouldInsertExtraNopBytesForCodeAlign ( const MCAlignFragment AF,
unsigned Size 
)
overridevirtual

Hook to check if extra nop bytes must be inserted for alignment directive.

For some targets this may be necessary in order to support linker relaxation. The number of bytes to insert are returned in Size.

Reimplemented from llvm::MCAsmBackend.

Definition at line 414 of file RISCVAsmBackend.cpp.

References llvm::MCAlignFragment::getAlignment(), and llvm::MCSubtargetInfo::getFeatureBits().

Referenced by requiresDiffExpressionRelocations(), and shouldInsertFixupForCodeAlign().

◆ shouldInsertFixupForCodeAlign()

bool RISCVAsmBackend::shouldInsertFixupForCodeAlign ( MCAssembler Asm,
const MCAsmLayout Layout,
MCAlignFragment AF 
)
overridevirtual

◆ willForceRelocations()

bool llvm::RISCVAsmBackend::willForceRelocations ( ) const
inline

◆ writeNopData()

bool RISCVAsmBackend::writeNopData ( raw_ostream OS,
uint64_t  Count 
) const
overridevirtual

Write an (optimal) nop sequence of Count bytes to the given output.

If the target cannot generate such a sequence, it should return an error.

Returns
- True on success.

Implements llvm::MCAsmBackend.

Definition at line 200 of file RISCVAsmBackend.cpp.

References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::raw_ostream::write().

Referenced by getNumFixupKinds().


The documentation for this class was generated from the following files: