LVLGen.cpp File Reference

#include "VE.h"
#include "VEInstrInfo.h"
#include "VERegisterInfo.h"
#include "VESubtarget.h"
#include "llvm/CodeGen/MachineFunctionAnalysisManager.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/IR/Analysis.h"
#include "llvm/Pass.h"

Go to the source code of this file.

Macros
#define	DEBUG_TYPE   "lvl-gen"
#define	RegName(no)

Functions
static int	getVLIndex (unsigned Opcode, const VEInstrInfo *TII)
static unsigned	getVL (const MachineInstr &MI, const VEInstrInfo *TII)
static bool	runLVLGenOnMachineBasicBlock (MachineBasicBlock &MBB, const VEInstrInfo *TII, const VERegisterInfo *TRI)
static bool	runLVLGenOnMachineFunction (MachineFunction &F)

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "lvl-gen"

Definition at line 23 of file LVLGen.cpp.

RegName

#define RegName

(

no

)

Value:

  (MBB.getParent()->getSubtarget<VESubtarget>().getRegisterInfo()->getName(no))

Referenced by llvm::dumpMaxRegPressure(), llvm::mir2vec::MIRVocabulary::getCanonicalIndexForRegisterClass(), llvm::SparcTargetLowering::getRegForInlineAsmConstraint(), llvm::TargetLowering::getRegForInlineAsmConstraint(), llvm::AVRTargetLowering::getRegisterByName(), llvm::HexagonTargetLowering::getRegisterByName(), llvm::LanaiTargetLowering::getRegisterByName(), llvm::LoongArchTargetLowering::getRegisterByName(), llvm::MipsTargetLowering::getRegisterByName(), llvm::PerTargetMIParsingState::getRegisterByName(), llvm::PPCTargetLowering::getRegisterByName(), llvm::RISCVTargetLowering::getRegisterByName(), llvm::SITargetLowering::getRegisterByName(), llvm::SparcTargetLowering::getRegisterByName(), llvm::SystemZTargetLowering::getRegisterByName(), llvm::TargetLowering::getRegisterByName(), llvm::VETargetLowering::getRegisterByName(), llvm::X86TargetLowering::getRegisterByName(), llvm::logicalview::LVDWARFReader::getRegisterName(), getSpecialRegForName(), llvm::PerFunctionMIParsingState::getVRegInfoNamed(), llvm::GCNTTIImpl::isReadRegisterSourceOfDivergence(), isReadVLENB(), llvm::AArch64TargetLowering::matchRegisterName(), llvm::AMDGPU::parseAsmConstraintPhysReg(), llvm::AMDGPU::parseAsmPhysRegName(), llvm::GCNTargetMachine::parseMachineFunctionInfo(), prepareDAGLevelOperands(), llvm::detail::prettyPrintRegisterOp(), llvm::printCompactDWARFExpr(), printFormattedRegName(), llvm::AArch64InstPrinter::printMatrixTileVector(), llvm::PPCInstPrinter::printOperand(), printRegister(), printRegister(), llvm::PPCInstPrinter::printRegName(), runLVLGenOnMachineBasicBlock(), llvm::PPC::stripRegisterPrefix(), and llvm::AMDGPUPALMetadata::toString().

Function Documentation

getVL()

unsigned getVL ( const MachineInstr & MI, const VEInstrInfo * TII )

static

Definition at line 54 of file LVLGen.cpp.

References getVLIndex(), MI, and TII.

Referenced by runLVLGenOnMachineBasicBlock().

getVLIndex()

int getVLIndex ( unsigned Opcode, const VEInstrInfo * TII )

static

Definition at line 42 of file LVLGen.cpp.

References GET_VLINDEX, HAS_VLINDEX, and TII.

Referenced by getVL().

runLVLGenOnMachineBasicBlock()

bool runLVLGenOnMachineBasicBlock ( MachineBasicBlock & MBB, const VEInstrInfo * TII, const VERegisterInfo * TRI )

static

Definition at line 62 of file LVLGen.cpp.

References llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), Changed, llvm::dbgs(), getVL(), I, LLVM_DEBUG, MBB, MI, Reg, RegName, TII, and TRI.

Referenced by runLVLGenOnMachineFunction().

runLVLGenOnMachineFunction()

bool runLVLGenOnMachineFunction ( MachineFunction & F )

static

Definition at line 121 of file LVLGen.cpp.

References Changed, llvm::dbgs(), F, llvm::VESubtarget::getInstrInfo(), llvm::VESubtarget::getRegisterInfo(), LLVM_DEBUG, MBB, runLVLGenOnMachineBasicBlock(), TII, and TRI.

Referenced by llvm::VELVLGenPass::run().