LLVM  17.0.0git
ARMMachineFunctionInfo.cpp
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1 //===-- ARMMachineFunctionInfo.cpp - ARM machine function info ------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
10 #include "ARMSubtarget.h"
11 
12 using namespace llvm;
13 
14 void ARMFunctionInfo::anchor() {}
15 
17  const ARMSubtarget *Subtarget) {
18  if (!Subtarget->isMClass() || !Subtarget->hasV7Ops())
19  return false;
20 
21  if (!F.hasFnAttribute("branch-target-enforcement")) {
22  if (const auto *BTE = mdconst::extract_or_null<ConstantInt>(
23  F.getParent()->getModuleFlag("branch-target-enforcement")))
24  return BTE->getZExtValue();
25  return false;
26  }
27 
28  const StringRef BTIEnable =
29  F.getFnAttribute("branch-target-enforcement").getValueAsString();
30  assert(BTIEnable.equals_insensitive("true") ||
31  BTIEnable.equals_insensitive("false"));
32  return BTIEnable.equals_insensitive("true");
33 }
34 
35 // The pair returns values for the ARMFunctionInfo members
36 // SignReturnAddress and SignReturnAddressAll respectively.
37 static std::pair<bool, bool> GetSignReturnAddress(const Function &F) {
38  if (!F.hasFnAttribute("sign-return-address")) {
39  const Module &M = *F.getParent();
40  if (const auto *Sign = mdconst::extract_or_null<ConstantInt>(
41  M.getModuleFlag("sign-return-address"))) {
42  if (Sign->getZExtValue()) {
43  if (const auto *All = mdconst::extract_or_null<ConstantInt>(
44  M.getModuleFlag("sign-return-address-all")))
45  return {true, All->getZExtValue()};
46  return {true, false};
47  }
48  }
49  return {false, false};
50  }
51 
52  StringRef Scope = F.getFnAttribute("sign-return-address").getValueAsString();
53  if (Scope.equals("none"))
54  return {false, false};
55 
56  if (Scope.equals("all"))
57  return {true, true};
58 
59  assert(Scope.equals("non-leaf"));
60  return {true, false};
61 }
62 
64  const ARMSubtarget *Subtarget)
65  : isThumb(Subtarget->isThumb()), hasThumb2(Subtarget->hasThumb2()),
66  IsCmseNSEntry(F.hasFnAttribute("cmse_nonsecure_entry")),
67  IsCmseNSCall(F.hasFnAttribute("cmse_nonsecure_call")),
68  BranchTargetEnforcement(GetBranchTargetEnforcement(F, Subtarget)) {
69  if (Subtarget->isMClass() && Subtarget->hasV7Ops())
70  std::tie(SignReturnAddress, SignReturnAddressAll) = GetSignReturnAddress(F);
71 }
72 
76  &Src2DstMBB) const {
77  return DestMF.cloneInfo<ARMFunctionInfo>(*this);
78 }
ARMSubtarget.h
llvm::ARMFunctionInfo
ARMFunctionInfo - This class is derived from MachineFunctionInfo and contains private ARM-specific in...
Definition: ARMMachineFunctionInfo.h:29
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::ARMSubtarget
Definition: ARMSubtarget.h:47
GetSignReturnAddress
static std::pair< bool, bool > GetSignReturnAddress(const Function &F)
Definition: ARMMachineFunctionInfo.cpp:37
llvm::Function
Definition: Function.h:59
ARMMachineFunctionInfo.h
GetBranchTargetEnforcement
static bool GetBranchTargetEnforcement(const Function &F, const ARMSubtarget *Subtarget)
Definition: ARMMachineFunctionInfo.cpp:16
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::ARMFunctionInfo::ARMFunctionInfo
ARMFunctionInfo()=default
isThumb
static bool isThumb(const MCSubtargetInfo &STI)
Definition: ARMAsmPrinter.cpp:468
llvm::ARMSubtarget::isMClass
bool isMClass() const
Definition: ARMSubtarget.h:422
llvm::BumpPtrAllocatorImpl
Allocate memory in an ever growing pool, as if by bump-pointer.
Definition: Allocator.h:63
llvm::DenseMap
Definition: DenseMap.h:714
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
llvm::MachineFunction
Definition: MachineFunction.h:258
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
llvm::MachineFunction::cloneInfo
Ty * cloneInfo(const Ty &Old)
Definition: MachineFunction.h:779
llvm::StringRef::equals_insensitive
bool equals_insensitive(StringRef RHS) const
Check for string equality, ignoring case.
Definition: StringRef.h:170
Allocator
Basic Register Allocator
Definition: RegAllocBasic.cpp:143
llvm::ARMFunctionInfo::clone
MachineFunctionInfo * clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF, const DenseMap< MachineBasicBlock *, MachineBasicBlock * > &Src2DstMBB) const override
Make a functionally equivalent copy of this MachineFunctionInfo in MF.
Definition: ARMMachineFunctionInfo.cpp:74
llvm::MachineFunctionInfo
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
Definition: MachineFunction.h:95