LLVM 19.0.0git
Macros | Functions | Variables
AArch64MIPeepholeOpt.cpp File Reference
#include "AArch64ExpandImm.h"
#include "AArch64InstrInfo.h"
#include "MCTargetDesc/AArch64AddressingModes.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineLoopInfo.h"

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "aarch64-mi-peephole-opt"
 

Functions

 INITIALIZE_PASS (AArch64MIPeepholeOpt, "aarch64-mi-peephole-opt", "AArch64 MI Peephole Optimization", false, false) template< typename T > static bool splitBitmaskImm(T Imm
 
 if (AArch64_AM::isLogicalImmediate(UImm, RegSize)) return false
 
 if (Insn.size()==1) return false
 
 if (!AArch64_AM::isLogicalImmediate(NewImm2, RegSize)) return false
 
template<typename T >
static bool splitAddSubImm (T Imm, unsigned RegSize, T &Imm0, T &Imm1)
 
static bool is64bitDefwithZeroHigh64bit (MachineInstr *MI, MachineRegisterInfo *MRI)
 

Variables

unsigned RegSize
 
unsigned TImm1Enc = AArch64_AM::encodeLogicalImmediate(NewImm1, RegSize)
 
unsigned T TImm2Enc
 
SmallVector< AArch64_IMM::ImmInsnModel, 4 > Insn
 
unsigned LowestBitSet = llvm::countr_zero(UImm)
 
unsigned HighestBitSet = Log2_64(UImm)
 
T NewImm1
 
T NewImm2 = UImm | ~NewImm1
 
return true
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "aarch64-mi-peephole-opt"

Definition at line 74 of file AArch64MIPeepholeOpt.cpp.

Function Documentation

◆ if() [1/3]

if ( AArch64_AM::isLogicalImmediateNewImm2, RegSize)

◆ if() [2/3]

if ( AArch64_AM::isLogicalImmediate(UImm, RegSize )

◆ if() [3/3]

if ( Insn.  size() = =1)

◆ INITIALIZE_PASS()

INITIALIZE_PASS ( AArch64MIPeepholeOpt  ,
"aarch64-mi-peephole-opt"  ,
"AArch64 MI Peephole Optimization"  ,
false  ,
false   
)

◆ is64bitDefwithZeroHigh64bit()

static bool is64bitDefwithZeroHigh64bit ( MachineInstr MI,
MachineRegisterInfo MRI 
)
static

Definition at line 613 of file AArch64MIPeepholeOpt.cpp.

References MI, and MRI.

◆ splitAddSubImm()

template<typename T >
static bool splitAddSubImm ( T  Imm,
unsigned  RegSize,
T Imm0,
T Imm1 
)
static

Definition at line 330 of file AArch64MIPeepholeOpt.cpp.

References llvm::AArch64_IMM::expandMOVImm(), Insn, and RegSize.

Variable Documentation

◆ HighestBitSet

unsigned HighestBitSet = Log2_64(UImm)

Definition at line 168 of file AArch64MIPeepholeOpt.cpp.

◆ Imm1Enc

Imm1Enc = AArch64_AM::encodeLogicalImmediate(NewImm1, RegSize)

Definition at line 151 of file AArch64MIPeepholeOpt.cpp.

◆ Imm2Enc

Imm2Enc
Initial value:
{
T UImm = static_cast<T>(Imm)

Definition at line 151 of file AArch64MIPeepholeOpt.cpp.

◆ Insn

Definition at line 157 of file AArch64MIPeepholeOpt.cpp.

Referenced by checkDecodedInstruction(), collectPreserveStaticOffsetCalls(), Decode2OpInstruction(), Decode2OpInstructionFail(), Decode2RImmInstruction(), Decode2RInstruction(), Decode2RSrcDstInstruction(), Decode2RUSBitpInstruction(), Decode2RUSInstruction(), Decode3OpInstruction(), Decode3RImmInstruction(), Decode3RInstruction(), DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), decodeAField(), DecodeANDI16Imm(), DecodeArmMOVTWInstruction(), decodeBField(), decodeBranch(), DecodeBranchImmInstruction(), DecodeCacheeOp_CacheOpR6(), DecodeCacheOp(), DecodeCacheOpMM(), DecodeCCRU6Instruction(), decodeCField(), decodeCondBranch(), DecodeCopMemInstruction(), DecodeCPSInstruction(), DecodeCRC(), decodeCSSPushPopchk(), DecodeDEXT(), DecodeDINS(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeDstAddrMode(), decodeFBRk(), decodeFFMULRdRr(), decodeFIOARr(), decodeFIOBIT(), decodeFIORdA(), decodeFLPMX(), DecodeFMem(), DecodeFMem2(), DecodeFMem3(), DecodeFMemCop2MMR6(), DecodeFMemCop2R6(), DecodeFMemMMR2(), DecodeFMOVLaneInstruction(), decodeFMOVWRdRr(), decodeFMUL2RdRr(), decodeFRd(), decodeFWRdK(), DecodeHINTInstruction(), DecodeInsSize(), DecodeIT(), DecodeJumpTarget(), DecodeJumpTargetMM(), DecodeJumpTargetXMM(), DecodeL2OpInstructionFail(), DecodeL2RInstruction(), DecodeL2RUSBitpInstruction(), DecodeL2RUSInstruction(), DecodeL3RInstruction(), DecodeL3RSrcDstInstruction(), DecodeL4RSrcDstInstruction(), DecodeL4RSrcDstSrcDstInstruction(), DecodeL5RInstruction(), DecodeL5RInstructionFail(), DecodeL6RInstruction(), DecodeLdLImmInstruction(), DecodeLdRLImmInstruction(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeLoadByte15(), decodeLoadStore(), DecodeLOLoop(), DecodeLR2RInstruction(), DecodeMem(), DecodeMemEVA(), DecodeMemMMGPImm7Lsl2(), DecodeMemMMImm12(), DecodeMemMMImm16(), DecodeMemMMImm4(), DecodeMemMMImm9(), DecodeMemMMReglistImm4Lsl2(), DecodeMemMMSPImm5Lsl2(), DecodeMemMultipleWritebackInstruction(), decodeMemoryOpValue(), decodeMemri(), DecodeMEMrs9(), DecodeMoveHRegInstruction(), DecodeMovePOperands(), DecodeMSA128Mem(), DecodeMveAddrModeQ(), DecodeMveAddrModeRQ(), DecodeMVEModImmInstruction(), DecodeMVEOverlappingLongShift(), DecodeMVEVADCInstruction(), DecodeMVEVCMP(), DecodeMveVCTP(), DecodeMVEVCVTt1fp(), DecodeMVEVMOVDRegtoQ(), DecodeMVEVMOVQtoDReg(), DecodeNEONComplexLane64Instruction(), DecodePostIdxReg(), DecodePrefeOpMM(), DecodeQADDInstruction(), DecodeR2RInstruction(), DecodeRegListOperand(), DecodeRegListOperand16(), decodeRegReg(), DecodeRFEInstruction(), decodeRiMemoryValue(), decodeRrMemoryValue(), DecodeRUSBitpInstruction(), DecodeRUSInstruction(), DecodeRUSSrcDstBitpInstruction(), decodeRVCInstrRdRs1ImmZero(), decodeRVCInstrRdRs1Rs2(), decodeRVCInstrRdRs1UImm(), decodeRVCInstrRdRs2(), decodeRVCInstrRdSImm(), DecodeSETPANInstruction(), decodeShiftImm(), DecodeSimm18Lsl3(), DecodeSimm19Lsl2(), DecodeSimm23Lsl2(), DecodeSimm9SP(), DecodeSMLAInstruction(), DecodeSOPwithRS12(), DecodeSOPwithRU6(), DecodeSpecial3LlSc(), decodeSplsValue(), DecodeSrcAddrModeI(), DecodeSrcAddrModeII(), DecodeStLImmInstruction(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeSwap(), DecodeSyncI(), DecodeSyncI_MM(), DecodeSynciR6(), DecodeT2AddSubSPImm(), DecodeT2Adr(), DecodeT2BInstruction(), DecodeT2CPSInstruction(), DecodeT2HintSpaceInstruction(), DecodeT2LDRDPreInstruction(), DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadLabel(), DecodeT2LoadShift(), DecodeT2LoadT(), DecodeT2MOVTWInstruction(), DecodeT2STRDPreInstruction(), DecodeTBLInstruction(), DecodeThumb2BCCInstruction(), DecodeThumbAddSpecialReg(), DecodeThumbAddSPImm(), DecodeThumbAddSPReg(), DecodeThumbCPS(), DecodeThumbTableBranch(), DecodeTSTInstruction(), DecodeVCVTD(), DecodeVCVTQ(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVLDST1Instruction(), DecodeVLDST2Instruction(), DecodeVLDST3Instruction(), DecodeVLDST4Instruction(), DecodeVMOVModImmInstruction(), DecodeVMOVRRS(), DecodeVMOVSRR(), DecodeVSCCLRM(), DecodeVSHLMaxInstruction(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), DecodeVSTInstruction(), decodeXTHeadMemPair(), llvm::AArch64_IMM::expandMOVImm(), expandMOVImmSimple(), fillCommonArgs(), findCommonDominator(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), llvm::AArch64Disassembler::getInstruction(), llvm::LanaiDisassembler::getInstruction(), M68kDisassembler::getInstruction(), llvm::AArch64TTIImpl::getIntImmCost(), getNextMachineInstrInBB(), llvm::ImplicitControlFlowTracking::isDominatedByICFIFromSameBlock(), llvm::MemoryWriteTracking::isDominatedByMemoryWriteFromSameBlock(), llvm::AArch64TargetLowering::isFPImmLegal(), llvm::isGuardAsWidenableBranch(), llvm::AArch64TargetLowering::isMulAddWithConstProfitable(), llvm::InstructionPrecedenceTracking::isPreceededBySpecialInstruction(), llvm::ImplicitControlFlowTracking::isSpecialInstruction(), llvm::MemoryWriteTracking::isSpecialInstruction(), isSupportedGuardInstruction(), PostOperandDecodeAdjust(), readInstruction16(), readInstruction24(), readInstruction32(), readInstruction48(), readInstruction64(), reconstructCommon(), removeGEPBuiltinsInFunc(), reportNonStaticGEPChain(), llvm::RuntimeDyldMachOARM::resolveRelocation(), rewriteAccessChain(), rewriteUses(), llvm::ARMTargetLowering::shouldSinkOperands(), llvm::RISCVTargetLowering::shouldSinkOperands(), splitAddSubImm(), tryAndOfLogicalImmediates(), tryEorOfLogicalImmediates(), tryOrrOfLogicalImmediates(), trySequenceOfOnes(), and tryToreplicateChunks().

◆ LowestBitSet

unsigned LowestBitSet = llvm::countr_zero(UImm)

Definition at line 167 of file AArch64MIPeepholeOpt.cpp.

◆ NewImm1

T NewImm1
Initial value:
= (static_cast<T>(2) << HighestBitSet) -
(static_cast<T>(1) << LowestBitSet)
unsigned HighestBitSet
unsigned LowestBitSet

Definition at line 172 of file AArch64MIPeepholeOpt.cpp.

◆ NewImm2

T NewImm2 = UImm | ~NewImm1

Definition at line 176 of file AArch64MIPeepholeOpt.cpp.

◆ RegSize

unsigned RegSize

◆ true

return true

Definition at line 185 of file AArch64MIPeepholeOpt.cpp.