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13 #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCTARGETDESC_H
14 #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCTARGETDESC_H
25 class MCObjectTargetWriter;
27 class MCSubtargetInfo;
28 class MCTargetOptions;
39 const MCRegisterInfo &
MRI,
40 const MCTargetOptions &
Options);
42 std::unique_ptr<MCObjectTargetWriter>
53 #define GET_REGINFO_ENUM
54 #include "MipsGenRegisterInfo.inc"
57 #define GET_INSTRINFO_ENUM
58 #include "MipsGenInstrInfo.inc"
60 #define GET_SUBTARGETINFO_ENUM
61 #include "MipsGenSubtargetInfo.inc"
This is an optimization pass for GlobalISel generic memory operations.
MCAsmBackend * createMipsAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
MCCodeEmitter * createMipsMCCodeEmitterEL(const MCInstrInfo &MCII, MCContext &Ctx)
Triple - Helper class for working with autoconf configuration names.
MCCodeEmitter * createMipsMCCodeEmitterEB(const MCInstrInfo &MCII, MCContext &Ctx)
const char LLVMTargetMachineRef LLVMPassBuilderOptionsRef Options
std::unique_ptr< MCObjectTargetWriter > createMipsELFObjectWriter(const Triple &TT, bool IsN32)
StringRef - Represent a constant reference to a string, i.e.
unsigned const MachineRegisterInfo * MRI
StringRef selectMipsCPU(const Triple &TT, StringRef CPU)
Select the Mips CPU for the given triple and cpu name.