LLVM  13.0.0git
MipsMCTargetDesc.cpp
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1 //===-- MipsMCTargetDesc.cpp - Mips Target Descriptions -------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file provides Mips specific target descriptions.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "MipsMCTargetDesc.h"
14 #include "MipsAsmBackend.h"
15 #include "MipsBaseInfo.h"
16 #include "MipsELFStreamer.h"
17 #include "MipsInstPrinter.h"
18 #include "MipsMCAsmInfo.h"
19 #include "MipsMCNaCl.h"
20 #include "MipsTargetStreamer.h"
22 #include "llvm/ADT/Triple.h"
23 #include "llvm/MC/MCCodeEmitter.h"
24 #include "llvm/MC/MCELFStreamer.h"
26 #include "llvm/MC/MCInstrInfo.h"
27 #include "llvm/MC/MCObjectWriter.h"
28 #include "llvm/MC/MCRegisterInfo.h"
30 #include "llvm/MC/MCSymbol.h"
35 
36 using namespace llvm;
37 
38 #define GET_INSTRINFO_MC_DESC
39 #include "MipsGenInstrInfo.inc"
40 
41 #define GET_SUBTARGETINFO_MC_DESC
42 #include "MipsGenSubtargetInfo.inc"
43 
44 #define GET_REGINFO_MC_DESC
45 #include "MipsGenRegisterInfo.inc"
46 
47 /// Select the Mips CPU for the given triple and cpu name.
49  if (CPU.empty() || CPU == "generic") {
50  if (TT.getSubArch() == llvm::Triple::MipsSubArch_r6) {
51  if (TT.isMIPS32())
52  CPU = "mips32r6";
53  else
54  CPU = "mips64r6";
55  } else {
56  if (TT.isMIPS32())
57  CPU = "mips32";
58  else
59  CPU = "mips64";
60  }
61  }
62  return CPU;
63 }
64 
66  MCInstrInfo *X = new MCInstrInfo();
67  InitMipsMCInstrInfo(X);
68  return X;
69 }
70 
73  InitMipsMCRegisterInfo(X, Mips::RA);
74  return X;
75 }
76 
78  StringRef CPU, StringRef FS) {
79  CPU = MIPS_MC::selectMipsCPU(TT, CPU);
80  return createMipsMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
81 }
82 
84  const Triple &TT,
85  const MCTargetOptions &Options) {
86  MCAsmInfo *MAI = new MipsMCAsmInfo(TT, Options);
87 
88  unsigned SP = MRI.getDwarfRegNum(Mips::SP, true);
90  MAI->addInitialFrameState(Inst);
91 
92  return MAI;
93 }
94 
96  unsigned SyntaxVariant,
97  const MCAsmInfo &MAI,
98  const MCInstrInfo &MII,
99  const MCRegisterInfo &MRI) {
100  return new MipsInstPrinter(MAI, MII, MRI);
101 }
102 
104  std::unique_ptr<MCAsmBackend> &&MAB,
105  std::unique_ptr<MCObjectWriter> &&OW,
106  std::unique_ptr<MCCodeEmitter> &&Emitter,
107  bool RelaxAll) {
108  MCStreamer *S;
109  if (!T.isOSNaCl())
111  std::move(Emitter), RelaxAll);
112  else
114  std::move(Emitter), RelaxAll);
115  return S;
116 }
117 
120  MCInstPrinter *InstPrint,
121  bool isVerboseAsm) {
122  return new MipsTargetAsmStreamer(S, OS);
123 }
124 
126  return new MipsTargetStreamer(S);
127 }
128 
129 static MCTargetStreamer *
131  return new MipsTargetELFStreamer(S, STI);
132 }
133 
134 namespace {
135 
136 class MipsMCInstrAnalysis : public MCInstrAnalysis {
137 public:
138  MipsMCInstrAnalysis(const MCInstrInfo *Info) : MCInstrAnalysis(Info) {}
139 
140  bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
141  uint64_t &Target) const override {
142  unsigned NumOps = Inst.getNumOperands();
143  if (NumOps == 0)
144  return false;
145  switch (Info->get(Inst.getOpcode()).OpInfo[NumOps - 1].OperandType) {
148  // j, jal, jalx, jals
149  // Absolute branch within the current 256 MB-aligned region
150  uint64_t Region = Addr & ~uint64_t(0xfffffff);
151  Target = Region + Inst.getOperand(NumOps - 1).getImm();
152  return true;
153  }
154  case MCOI::OPERAND_PCREL:
155  // b, beq ...
156  Target = Addr + Inst.getOperand(NumOps - 1).getImm();
157  return true;
158  default:
159  return false;
160  }
161  }
162 };
163 }
164 
166  return new MipsMCInstrAnalysis(Info);
167 }
168 
172  // Register the MC asm info.
174 
175  // Register the MC instruction info.
177 
178  // Register the MC register info.
180 
181  // Register the elf streamer.
183 
184  // Register the asm target streamer.
186 
189 
190  // Register the MC subtarget info.
192 
193  // Register the MC instruction analyzer.
195 
196  // Register the MCInstPrinter.
198 
201 
202  // Register the asm backend.
204  }
205 
206  // Register the MC Code Emitter
207  for (Target *T : {&getTheMipsTarget(), &getTheMips64Target()})
209 
212 }
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
createMCStreamer
static MCStreamer * createMCStreamer(const Triple &T, MCContext &Context, std::unique_ptr< MCAsmBackend > &&MAB, std::unique_ptr< MCObjectWriter > &&OW, std::unique_ptr< MCCodeEmitter > &&Emitter, bool RelaxAll)
Definition: MipsMCTargetDesc.cpp:103
createMipsMCInstrAnalysis
static MCInstrAnalysis * createMipsMCInstrAnalysis(const MCInstrInfo *Info)
Definition: MipsMCTargetDesc.cpp:165
MipsBaseInfo.h
llvm
Definition: AllocatorList.h:23
llvm::StringRef::empty
LLVM_NODISCARD bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:156
llvm::createMipsNaClELFStreamer
MCELFStreamer * createMipsNaClELFStreamer(MCContext &Context, std::unique_ptr< MCAsmBackend > TAB, std::unique_ptr< MCObjectWriter > OW, std::unique_ptr< MCCodeEmitter > Emitter, bool RelaxAll)
Definition: MipsNaClELFStreamer.cpp:262
llvm::MCOI::OPERAND_IMMEDIATE
@ OPERAND_IMMEDIATE
Definition: MCInstrDesc.h:59
llvm::createMipsAsmBackend
MCAsmBackend * createMipsAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
Definition: MipsAsmBackend.cpp:584
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:71
MipsELFStreamer.h
MCCodeEmitter.h
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:124
llvm::MCAsmInfo
This class is intended to be used as a base class for asm properties and features specific to the tar...
Definition: MCAsmInfo.h:56
ErrorHandling.h
llvm::MipsTargetAsmStreamer
Definition: MipsTargetStreamer.h:208
llvm::TargetRegistry::RegisterAsmTargetStreamer
static void RegisterAsmTargetStreamer(Target &T, Target::AsmTargetStreamerCtorTy Fn)
Definition: TargetRegistry.h:876
llvm::TargetRegistry::RegisterMCInstrAnalysis
static void RegisterMCInstrAnalysis(Target &T, Target::MCInstrAnalysisCtorFnTy Fn)
RegisterMCInstrAnalysis - Register a MCInstrAnalysis implementation for the given target.
Definition: TargetRegistry.h:731
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:45
llvm::createMipsELFStreamer
MCELFStreamer * createMipsELFStreamer(MCContext &Context, std::unique_ptr< MCAsmBackend > MAB, std::unique_ptr< MCObjectWriter > OW, std::unique_ptr< MCCodeEmitter > Emitter, bool RelaxAll)
Definition: MipsELFStreamer.cpp:115
llvm::createMipsMCCodeEmitterEL
MCCodeEmitter * createMipsMCCodeEmitterEL(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
Definition: MipsMCCodeEmitter.cpp:50
T
#define T
Definition: Mips16ISelLowering.cpp:341
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:183
llvm::TargetRegistry::RegisterMCInstPrinter
static void RegisterMCInstPrinter(Target &T, Target::MCInstPrinterCtorTy Fn)
RegisterMCInstPrinter - Register a MCInstPrinter implementation for the given target.
Definition: TargetRegistry.h:838
llvm::MCInst::getNumOperands
unsigned getNumOperands() const
Definition: MCInst.h:207
MCELFStreamer.h
Context
LLVMContext & Context
Definition: NVVMIntrRange.cpp:66
FormattedStream.h
llvm::MCStreamer
Streaming machine code generation interface.
Definition: MCStreamer.h:197
llvm::MipsInstPrinter
Definition: MipsInstPrinter.h:75
MipsTargetStreamer.h
llvm::X86AS::FS
@ FS
Definition: X86.h:183
MCInstrInfo.h
llvm::MCOperand::getImm
int64_t getImm() const
Definition: MCInst.h:79
MCSymbol.h
llvm::Triple::MipsSubArch_r6
@ MipsSubArch_r6
Definition: Triple.h:141
llvm::MCInstrAnalysis
Definition: MCInstrAnalysis.h:27
MCSubtargetInfo.h
llvm::MCTargetStreamer
Target specific streamer interface.
Definition: MCStreamer.h:91
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:26
llvm::MCOI::OPERAND_PCREL
@ OPERAND_PCREL
Definition: MCInstrDesc.h:62
llvm::RegisterMCAsmInfoFn
RegisterMCAsmInfoFn - Helper template for registering a target assembly info implementation.
Definition: TargetRegistry.h:973
llvm::MCCFIInstruction
Definition: MCDwarf.h:441
llvm::MipsTargetELFStreamer
Definition: MipsTargetStreamer.h:313
X
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
llvm::MCCFIInstruction::createDefCfaRegister
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:495
createMipsMCAsmInfo
static MCAsmInfo * createMipsMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT, const MCTargetOptions &Options)
Definition: MipsMCTargetDesc.cpp:83
llvm::createMipsMCCodeEmitterEB
MCCodeEmitter * createMipsMCCodeEmitterEB(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
Definition: MipsMCCodeEmitter.cpp:44
llvm::TargetRegistry::RegisterMCAsmBackend
static void RegisterMCAsmBackend(Target &T, Target::MCAsmBackendCtorTy Fn)
RegisterMCAsmBackend - Register a MCAsmBackend implementation for the given target.
Definition: TargetRegistry.h:785
MipsTargetInfo.h
llvm::MCInstPrinter
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Definition: MCInstPrinter.h:43
LLVM_EXTERNAL_VISIBILITY
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:132
Addr
uint64_t Addr
Definition: ELFObjHandler.cpp:80
MipsInstPrinter.h
move
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
Definition: README.txt:546
createMipsMCInstPrinter
static MCInstPrinter * createMipsMCInstPrinter(const Triple &T, unsigned SyntaxVariant, const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)
Definition: MipsMCTargetDesc.cpp:95
llvm::TargetRegistry::RegisterObjectTargetStreamer
static void RegisterObjectTargetStreamer(Target &T, Target::ObjectTargetStreamerCtorTy Fn)
Definition: TargetRegistry.h:882
MCRegisterInfo.h
llvm::formatted_raw_ostream
formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...
Definition: FormattedStream.h:30
MipsAsmBackend.h
MipsMCNaCl.h
MipsMCTargetDesc.h
llvm::getTheMipsTarget
Target & getTheMipsTarget()
Definition: MipsTargetInfo.cpp:13
createMipsMCRegisterInfo
static MCRegisterInfo * createMipsMCRegisterInfo(const Triple &TT)
Definition: MipsMCTargetDesc.cpp:71
llvm::MCAsmInfo::addInitialFrameState
void addInitialFrameState(const MCCFIInstruction &Inst)
Definition: MCAsmInfo.cpp:81
RA
SI optimize exec mask operations pre RA
Definition: SIOptimizeExecMaskingPreRA.cpp:71
llvm::TargetRegistry::RegisterMCSubtargetInfo
static void RegisterMCSubtargetInfo(Target &T, Target::MCSubtargetInfoCtorFnTy Fn)
RegisterMCSubtargetInfo - Register a MCSubtargetInfo implementation for the given target.
Definition: TargetRegistry.h:758
llvm::MCTargetOptions
Definition: MCTargetOptions.h:36
Triple.h
MCInstrAnalysis.h
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:57
MachineLocation.h
createMipsNullTargetStreamer
static MCTargetStreamer * createMipsNullTargetStreamer(MCStreamer &S)
Definition: MipsMCTargetDesc.cpp:125
S
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
Definition: README.txt:210
llvm::getTheMips64elTarget
Target & getTheMips64elTarget()
Definition: MipsTargetInfo.cpp:25
llvm::getTheMips64Target
Target & getTheMips64Target()
Definition: MipsTargetInfo.cpp:21
llvm::MCRegisterInfo
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Definition: MCRegisterInfo.h:135
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
createMipsMCSubtargetInfo
static MCSubtargetInfo * createMipsMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
Definition: MipsMCTargetDesc.cpp:77
MCObjectWriter.h
llvm::TargetRegistry::RegisterMCInstrInfo
static void RegisterMCInstrInfo(Target &T, Target::MCInstrInfoCtorFnTy Fn)
RegisterMCInstrInfo - Register a MCInstrInfo implementation for the given target.
Definition: TargetRegistry.h:725
llvm::TargetRegistry::RegisterMCCodeEmitter
static void RegisterMCCodeEmitter(Target &T, Target::MCCodeEmitterCtorTy Fn)
RegisterMCCodeEmitter - Register a MCCodeEmitter implementation for the given target.
Definition: TargetRegistry.h:851
llvm::MCInstrInfo
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:25
llvm::TargetRegistry::RegisterMCRegInfo
static void RegisterMCRegInfo(Target &T, Target::MCRegInfoCtorFnTy Fn)
RegisterMCRegInfo - Register a MCRegisterInfo implementation for the given target.
Definition: TargetRegistry.h:745
llvm::TargetRegistry::RegisterELFStreamer
static void RegisterELFStreamer(Target &T, Target::ELFStreamerCtorTy Fn)
Definition: TargetRegistry.h:863
llvm::MipsTargetStreamer
Definition: MipsTargetStreamer.h:24
llvm::MCInst::getOpcode
unsigned getOpcode() const
Definition: MCInst.h:197
createMipsAsmTargetStreamer
static MCTargetStreamer * createMipsAsmTargetStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint, bool isVerboseAsm)
Definition: MipsMCTargetDesc.cpp:118
llvm::MIPS_MC::selectMipsCPU
StringRef selectMipsCPU(const Triple &TT, StringRef CPU)
Select the Mips CPU for the given triple and cpu name.
Definition: MipsMCTargetDesc.cpp:48
llvm::TargetRegistry::RegisterNullTargetStreamer
static void RegisterNullTargetStreamer(Target &T, Target::NullTargetStreamerCtorTy Fn)
Definition: TargetRegistry.h:871
llvm::MipsMCAsmInfo
Definition: MipsMCAsmInfo.h:21
llvm::MCInst::getOperand
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:205
llvm::MCOI::OPERAND_UNKNOWN
@ OPERAND_UNKNOWN
Definition: MCInstrDesc.h:58
MipsMCAsmInfo.h
llvm::Region
Definition: RegionInfo.h:889
TargetRegistry.h
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:75
LLVMInitializeMipsTargetMC
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTargetMC()
Definition: MipsMCTargetDesc.cpp:169
createMipsObjectTargetStreamer
static MCTargetStreamer * createMipsObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI)
Definition: MipsMCTargetDesc.cpp:130
createMipsMCInstrInfo
static MCInstrInfo * createMipsMCInstrInfo()
Definition: MipsMCTargetDesc.cpp:65
llvm::getTheMipselTarget
Target & getTheMipselTarget()
Definition: MipsTargetInfo.cpp:17