17#define GET_REGINFO_ENUM
18#include "SPIRVGenRegisterInfo.inc"
20#define GET_TARGET_REGBANK_IMPL
21#include "SPIRVGenRegisterBank.inc"
31 case SPIRV::TYPERegClassID:
32 return SPIRV::TYPERegBank;
33 case SPIRV::pIDRegClassID:
34 case SPIRV::IDRegClassID:
35 return SPIRV::IDRegBank;
36 case SPIRV::fIDRegClassID:
37 return SPIRV::fIDRegBank;
38 case SPIRV::vIDRegClassID:
39 return SPIRV::vIDRegBank;
40 case SPIRV::vfIDRegClassID:
41 return SPIRV::vfIDRegBank;
42 case SPIRV::ANYIDRegClassID:
43 case SPIRV::ANYRegClassID:
44 return SPIRV::IDRegBank;
This class implements the register bank concept.
const RegisterBank & getRegBankFromRegClass(const TargetRegisterClass &RC, LLT Ty) const override
Get a register bank that covers RC.
unsigned getID() const
Return the register class ID number.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This is an optimization pass for GlobalISel generic memory operations.