LLVM 19.0.0git
SPIRVRegisterBankInfo.cpp
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1//===- SPIRVRegisterBankInfo.cpp ------------------------------*- C++ -*---===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the targeting of the RegisterBankInfo class for SPIR-V.
10//
11//===----------------------------------------------------------------------===//
12
14#include "SPIRVRegisterInfo.h"
16
17#define GET_REGINFO_ENUM
18#include "SPIRVGenRegisterInfo.inc"
19
20#define GET_TARGET_REGBANK_IMPL
21#include "SPIRVGenRegisterBank.inc"
22
23using namespace llvm;
24
25// This required for .td selection patterns to work or we'd end up with RegClass
26// checks being redundant as all the classes would be mapped to the same bank.
27const RegisterBank &
29 LLT Ty) const {
30 switch (RC.getID()) {
31 case SPIRV::TYPERegClassID:
32 return SPIRV::TYPERegBank;
33 case SPIRV::pIDRegClassID:
34 case SPIRV::IDRegClassID:
35 return SPIRV::IDRegBank;
36 case SPIRV::fIDRegClassID:
37 return SPIRV::fIDRegBank;
38 case SPIRV::vIDRegClassID:
39 return SPIRV::vIDRegBank;
40 case SPIRV::vfIDRegClassID:
41 return SPIRV::vfIDRegBank;
42 case SPIRV::ANYIDRegClassID:
43 case SPIRV::ANYRegClassID:
44 return SPIRV::IDRegBank;
45 }
46 llvm_unreachable("Unknown register class");
47}
This class implements the register bank concept.
Definition: RegisterBank.h:28
const RegisterBank & getRegBankFromRegClass(const TargetRegisterClass &RC, LLT Ty) const override
Get a register bank that covers RC.
unsigned getID() const
Return the register class ID number.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18