LLVM 19.0.0git
SPIRVRegisterBankInfo.h
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1//===- SPIRVRegisterBankInfo.h -----------------------------------*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares the targeting of the RegisterBankInfo class for SPIR-V.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_SPIRV_SPIRVREGISTERBANKINFO_H
14#define LLVM_LIB_TARGET_SPIRV_SPIRVREGISTERBANKINFO_H
15
17
18#define GET_REGBANK_DECLARATIONS
19#include "SPIRVGenRegisterBank.inc"
20
21namespace llvm {
22
23class TargetRegisterInfo;
24
26protected:
27#define GET_TARGET_REGBANK_CLASS
28#include "SPIRVGenRegisterBank.inc"
29};
30
31// This class provides the information for the target register banks.
33public:
35 LLT Ty) const override;
36};
37} // namespace llvm
38#endif // LLVM_LIB_TARGET_SPIRV_SPIRVREGISTERBANKINFO_H
Holds all the information related to register banks.
This class implements the register bank concept.
Definition: RegisterBank.h:28
const RegisterBank & getRegBankFromRegClass(const TargetRegisterClass &RC, LLT Ty) const override
Get a register bank that covers RC.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18