LLVM 22.0.0git
XtensaTargetParser.h
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1//===----------------------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file implements a target parser to recognise Xtensa hardware features.
11///
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_TARGETPARSER_XTENSATARGETPARSER_H
15#define LLVM_TARGETPARSER_XTENSATARGETPARSER_H
16
18#include <vector>
19
20namespace llvm {
21class StringRef;
22
23namespace Xtensa {
24
25enum CPUKind : unsigned {
26#define XTENSA_CPU(ENUM, NAME, FEATURES) CK_##ENUM,
27#include "XtensaTargetParser.def"
28};
29
33 XF_FP = 1 << 1,
34 XF_WINDOWED = 1 << 2,
35 XF_BOOLEAN = 1 << 3,
36 XF_DENSITY = 1 << 4,
37 XF_LOOP = 1 << 5,
38 XF_SEXT = 1 << 6,
39 XF_NSA = 1 << 7,
40 XF_CLAMPS = 1 << 8,
41 XF_MINMAX = 1 << 9,
42 XF_MAC16 = 1 << 10,
43 XF_MUL32 = 1 << 11,
44 XF_MUL32HIGH = 1 << 12,
45 XF_DIV32 = 1 << 13,
46 XF_MUL16 = 1 << 14,
47 XF_DFPACCEL = 1 << 15,
48 XF_S32C1I = 1 << 16,
49 XF_THREADPTR = 1 << 17,
50 XF_EXTENDEDL32R = 1 << 18,
51 XF_DATACACHE = 1 << 19,
52 XF_DEBUG = 1 << 20,
53 XF_EXCEPTION = 1 << 21,
60 XF_COPROCESSOR = 1 << 28,
61 XF_INTERRUPT = 1 << 29,
62 XF_RVECTOR = 1 << 30,
63 XF_TIMERS1 = 1ULL << 31,
64 XF_TIMERS2 = 1ULL << 32,
65 XF_TIMERS3 = 1ULL << 33,
66 XF_PRID = 1ULL << 34,
67 XF_REGPROTECT = 1ULL << 35,
68 XF_MISCSR = 1ULL << 36
69};
70
71CPUKind parseCPUKind(StringRef CPU);
75
76} // namespace Xtensa
77} // namespace llvm
78
79#endif // LLVM_SUPPORT_XTENSATARGETPARSER_H
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
StringRef - Represent a constant reference to a string, i.e.
Definition StringRef.h:55
void getCPUFeatures(StringRef CPU, SmallVectorImpl< StringRef > &Features)
StringRef getBaseName(StringRef CPU)
void fillValidCPUList(SmallVectorImpl< StringRef > &Values)
CPUKind parseCPUKind(StringRef CPU)
This is an optimization pass for GlobalISel generic memory operations.