Inheritance diagram for R600CodeGenPassBuilder:

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Public Member Functions
	R600CodeGenPassBuilder (R600TargetMachine &TM, const CGPassBuilderOption &Opts, PassInstrumentationCallbacks *PIC)
void	addPreISel (PassManagerWrapper &PMW) override
	{{@ For GlobalISel
void	addAsmPrinterBegin (PassManagerWrapper &PMW) override
void	addAsmPrinter (PassManagerWrapper &PMW) override
void	addAsmPrinterEnd (PassManagerWrapper &PMW) override
Error	addInstSelector (PassManagerWrapper &PMW) override
	addInstSelector - This method should install an instruction selector pass, which converts from LLVM code to machine instructions.
Public Member Functions inherited from llvm::CodeGenPassBuilder
	CodeGenPassBuilder (TargetMachine &TM, const CGPassBuilderOption &Opts, PassInstrumentationCallbacks *PIC)
	CodeGenPassBuilder (const CodeGenPassBuilder &)=delete
CodeGenPassBuilder &	operator= (const CodeGenPassBuilder &)=delete
virtual	~CodeGenPassBuilder ()
Error	buildPipeline (ModulePassManager &MPM, ModuleAnalysisManager &MAM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut, CodeGenFileType FileType, MCContext &Ctx)
PassInstrumentationCallbacks *	getPassInstrumentationCallbacks () const

Additional Inherited Members
Protected Types inherited from llvm::CodeGenPassBuilder
template<typename PassT>
using	is_module_pass_t
template<typename PassT>
using	is_function_pass_t
template<typename PassT>
using	is_machine_function_pass_t
Protected Member Functions inherited from llvm::CodeGenPassBuilder
template<typename PassT>
void	addFunctionPass (PassT &&Pass, PassManagerWrapper &PMW, bool Force=false, StringRef Name=PassT::name())
template<typename PassT>
void	addModulePass (PassT &&Pass, PassManagerWrapper &PMW, bool Force=false, StringRef Name=PassT::name())
template<typename PassT>
void	addMachineFunctionPass (PassT &&Pass, PassManagerWrapper &PMW, bool Force=false, StringRef Name=PassT::name())
void	flushFPMsToMPM (PassManagerWrapper &PMW, bool FreeMachineFunctions=false)
void	requireCGSCCOrder (PassManagerWrapper &PMW)
void	stopAddingInCGSCCOrder (PassManagerWrapper &PMW)
CodeGenOptLevel	getOptLevel () const
bool	isGlobalISelAbortEnabled () const
	Check whether or not GlobalISel should abort on error.
bool	reportDiagnosticWhenGlobalISelFallback () const
	Check whether or not a diagnostic should be emitted when GlobalISel uses the fallback path.
virtual void	addGlobalMergePass (PassManagerWrapper &PMW)
	Target can override this to add GlobalMergePass before all IR passes.
virtual void	addILPOpts (PassManagerWrapper &PMW)
	Add passes that optimize instruction level parallelism for out-of-order targets.
virtual void	addPreRegAlloc (PassManagerWrapper &PMW)
	This method may be implemented by targets that want to run passes immediately before register allocation.
virtual void	addPreRewrite (PassManagerWrapper &PMW)
	addPreRewrite - Add passes to the optimized register allocation pipeline after register allocation is complete, but before virtual registers are rewritten to physical registers.
virtual void	addPostRewrite (PassManagerWrapper &PMW)
	Add passes to be run immediately after virtual registers are rewritten to physical registers.
virtual void	addPostRegAlloc (PassManagerWrapper &PMW)
	This method may be implemented by targets that want to run passes after register allocation pass pipeline but before prolog-epilog insertion.
virtual void	addPreSched2 (PassManagerWrapper &PMW)
	This method may be implemented by targets that want to run passes after prolog-epilog insertion and before the second instruction scheduling pass.
virtual void	addPreEmitPass (PassManagerWrapper &PMW)
	This pass may be implemented by targets that want to run passes immediately before machine code is emitted.
virtual void	addPreEmitPass2 (PassManagerWrapper &PMW)
	Targets may add passes immediately before machine code is emitted in this callback.
virtual Error	addIRTranslator (PassManagerWrapper &PMW)
	This method should install an IR translator pass, which converts from LLVM code to machine instructions with possibly generic opcodes.
virtual void	addPreLegalizeMachineIR (PassManagerWrapper &PMW)
	This method may be implemented by targets that want to run passes immediately before legalization.
virtual Error	addLegalizeMachineIR (PassManagerWrapper &PMW)
	This method should install a legalize pass, which converts the instruction sequence into one that can be selected by the target.
virtual void	addPreRegBankSelect (PassManagerWrapper &PMW)
	This method may be implemented by targets that want to run passes immediately before the register bank selection.
virtual Error	addRegBankSelect (PassManagerWrapper &PMW)
	This method should install a register bank selector pass, which assigns register banks to virtual registers without a register class or register banks.
virtual void	addPreGlobalInstructionSelect (PassManagerWrapper &PMW)
	This method may be implemented by targets that want to run passes immediately before the (global) instruction selection.
virtual Error	addGlobalInstructionSelect (PassManagerWrapper &PMW)
	This method should install a (global) instruction selector pass, which converts possibly generic instructions to fully target-specific instructions, thereby constraining all generic virtual registers to register classes.
void	addISelPasses (PassManagerWrapper &PMW)
	High level function that adds all passes necessary to go from llvm IR representation to the MI representation.
Error	addCoreISelPasses (PassManagerWrapper &PMW)
	Add the actual instruction selection passes.
virtual Error	addMachinePasses (PassManagerWrapper &PMW)
	Add the complete, standard set of LLVM CodeGen passes.
void	addPassesToHandleExceptions (PassManagerWrapper &PMW)
	Add passes to lower exception handling for the code generator.
virtual void	addIRPasses (PassManagerWrapper &PMW)
	Add common target configurable passes that perform LLVM IR to IR transforms following machine independent optimization.
virtual void	addCodeGenPrepare (PassManagerWrapper &PMW)
	Add pass to prepare the LLVM IR for code generation.
virtual void	addISelPrepare (PassManagerWrapper &PMW)
	Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection.
virtual void	addMachineSSAOptimization (PassManagerWrapper &PMW)
	Methods with trivial inline returns are convenient points in the common codegen pass pipeline where targets may insert passes.
virtual Error	addFastRegAlloc (PassManagerWrapper &PMW)
	addFastRegAlloc - Add the minimum set of target-independent passes that are required for fast register allocation.
virtual Error	addOptimizedRegAlloc (PassManagerWrapper &PMW)
	addOptimizedRegAlloc - Add passes related to register allocation.
virtual void	addMachineLateOptimization (PassManagerWrapper &PMW)
	Add passes that optimize machine instructions after register allocation.
virtual void	addGCPasses (PassManagerWrapper &PMW)
	addGCPasses - Add late codegen passes that analyze code for garbage collection.
virtual void	addBlockPlacement (PassManagerWrapper &PMW)
	Add standard basic block placement passes.
virtual void	addPostBBSections (PassManagerWrapper &PMW)
virtual void	addTargetRegisterAllocator (PassManagerWrapper &PMW, bool Optimized)
	Utilities for targets to add passes to the pass manager.
void	addRegAllocPass (PassManagerWrapper &PMW, bool Optimized)
	addMachinePasses helper to create the target-selected or overriden regalloc pass.
virtual Error	addRegAssignAndRewriteFast (PassManagerWrapper &PMW)
	Add core register allocator passes which do the actual register assignment and rewriting.
virtual Expected< bool >	addRegAssignAndRewriteOptimized (PassManagerWrapper &PMW)
template<typename... PassTs>
void	disablePass ()
	Allow the target to disable a specific pass by default.
template<typename TargetPassT, typename InsertedPassT>
void	insertPass (InsertedPassT &&Pass)
	Insert InsertedPass pass after TargetPass pass.
Protected Attributes inherited from llvm::CodeGenPassBuilder
TargetMachine &	TM
CGPassBuilderOption	Opt
PassInstrumentationCallbacks *	PIC