LLVM  14.0.0git
R600TargetMachine.cpp
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1 //===-- R600TargetMachine.cpp - TargetMachine for hw codegen targets-------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// The AMDGPU-R600 target machine contains all of the hardware specific
11 /// information needed to emit code for R600 GPUs.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "R600TargetMachine.h"
16 #include "AMDGPUTargetMachine.h"
17 #include "R600.h"
18 #include "R600MachineScheduler.h"
20 #include "llvm/Transforms/Scalar.h"
21 
22 using namespace llvm;
23 
24 static cl::opt<bool>
25  EnableR600StructurizeCFG("r600-ir-structurize",
26  cl::desc("Use StructurizeCFG IR pass"),
27  cl::init(true));
28 
29 static cl::opt<bool> EnableR600IfConvert("r600-if-convert",
30  cl::desc("Use if conversion pass"),
31  cl::ReallyHidden, cl::init(true));
32 
34  "amdgpu-function-calls", cl::desc("Enable AMDGPU function call support"),
36  cl::Hidden);
37 
39  return new ScheduleDAGMILive(C, std::make_unique<R600SchedStrategy>());
40 }
41 
43  "Run R600's custom scheduler",
45 
46 //===----------------------------------------------------------------------===//
47 // R600 Target Machine (R600 -> Cayman)
48 //===----------------------------------------------------------------------===//
49 
51  StringRef CPU, StringRef FS,
55  CodeGenOpt::Level OL, bool JIT)
56  : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
58 
59  // Override the default since calls aren't supported for r600.
60  if (EnableFunctionCalls &&
61  EnableAMDGPUFunctionCallsOpt.getNumOccurrences() == 0)
62  EnableFunctionCalls = false;
63 }
64 
65 const TargetSubtargetInfo *
67  StringRef GPU = getGPUName(F);
69 
70  SmallString<128> SubtargetKey(GPU);
71  SubtargetKey.append(FS);
72 
73  auto &I = SubtargetMap[SubtargetKey];
74  if (!I) {
75  // This needs to be done before we create a new subtarget since any
76  // creation will depend on the TM and the code generation flags on the
77  // function that reside in TargetOptions.
79  I = std::make_unique<R600Subtarget>(TargetTriple, GPU, FS, *this);
80  }
81 
82  return I.get();
83 }
84 
87  return TargetTransformInfo(R600TTIImpl(this, F));
88 }
89 
90 class R600PassConfig final : public AMDGPUPassConfig {
91 public:
93  : AMDGPUPassConfig(TM, PM) {}
94 
98  }
99 
100  bool addPreISel() override;
101  bool addInstSelector() override;
102  void addPreRegAlloc() override;
103  void addPreSched2() override;
104  void addPreEmitPass() override;
105 };
106 
107 //===----------------------------------------------------------------------===//
108 // R600 Pass Setup
109 //===----------------------------------------------------------------------===//
110 
113 
115  addPass(createStructurizeCFGPass());
116  return false;
117 }
118 
120  addPass(createR600ISelDag(&getAMDGPUTargetMachine(), getOptLevel()));
121  return false;
122 }
123 
125 
127  addPass(createR600EmitClauseMarkers());
129  addPass(&IfConverterID);
130  addPass(createR600ClauseMergePass());
131 }
132 
136  addPass(&FinalizeMachineBundlesID);
137  addPass(createR600Packetizer());
139 }
140 
142  return new R600PassConfig(*this, PM);
143 }
llvm::createR600ExpandSpecialInstrsPass
FunctionPass * createR600ExpandSpecialInstrsPass()
Definition: R600ExpandSpecialInstrs.cpp:57
R600PassConfig
Definition: R600TargetMachine.cpp:90
R600PassConfig::addPreEmitPass
void addPreEmitPass() override
This pass may be implemented by targets that want to run passes immediately before machine code is em...
Definition: R600TargetMachine.cpp:133
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AllocatorList.h:23
llvm::X86AS::FS
@ FS
Definition: X86.h:188
llvm::TargetOptions
Definition: TargetOptions.h:124
Scalar.h
T
llvm::Function
Definition: Function.h:62
llvm::cl::location
LocationClass< Ty > location(Ty &L)
Definition: CommandLine.h:457
R600MachineScheduler.h
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:137
llvm::MachineSchedRegistry
MachineSchedRegistry provides a selection of available machine instruction schedulers.
Definition: MachineScheduler.h:136
llvm::TargetTransformInfo
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
Definition: TargetTransformInfo.h:169
R600PassConfig::addPreSched2
void addPreSched2() override
This method may be implemented by targets that want to run passes after prolog-epilog insertion and b...
Definition: R600TargetMachine.cpp:126
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:45
R600TargetTransformInfo.h
llvm::cl::Hidden
@ Hidden
Definition: CommandLine.h:143
llvm::AMDGPUPassConfig
Definition: AMDGPUTargetMachine.h:109
llvm::Optional< Reloc::Model >
llvm::createR600ClauseMergePass
FunctionPass * createR600ClauseMergePass()
Definition: R600ClauseMergePass.cpp:207
R600PassConfig::R600PassConfig
R600PassConfig(LLVMTargetMachine &TM, PassManagerBase &PM)
Definition: R600TargetMachine.cpp:92
llvm::cl::ReallyHidden
@ ReallyHidden
Definition: CommandLine.h:144
F
#define F(x, y, z)
Definition: MD5.cpp:56
R600.h
llvm::AMDGPUTargetMachine
Definition: AMDGPUTargetMachine.h:30
llvm::createR600Packetizer
FunctionPass * createR600Packetizer()
Definition: R600Packetizer.cpp:402
llvm::R600TargetMachine::getTargetTransformInfo
TargetTransformInfo getTargetTransformInfo(const Function &F) override
Get a TargetTransformInfo implementation for the target.
Definition: R600TargetMachine.cpp:86
C
(vector float) vec_cmpeq(*A, *B) C
Definition: README_ALTIVEC.txt:86
R600TargetMachine.h
llvm::createR600EmitClauseMarkers
FunctionPass * createR600EmitClauseMarkers()
Definition: R600EmitClauseMarkers.cpp:334
Options
const char LLVMTargetMachineRef LLVMPassBuilderOptionsRef Options
Definition: PassBuilderBindings.cpp:48
llvm::AMDGPUTargetMachine::getSubtargetImpl
const TargetSubtargetInfo * getSubtargetImpl() const
llvm::TargetMachine::resetTargetOptions
void resetTargetOptions(const Function &F) const
Reset the target options based on the function's attributes.
Definition: TargetMachine.cpp:56
llvm::SmallString< 128 >
llvm::R600TTIImpl
Definition: R600TargetTransformInfo.h:28
llvm::TargetPassConfig
Target-Independent Code Generator Pass Configuration Options.
Definition: TargetPassConfig.h:84
EnableAMDGPUFunctionCallsOpt
static cl::opt< bool, true > EnableAMDGPUFunctionCallsOpt("amdgpu-function-calls", cl::desc("Enable AMDGPU function call support"), cl::location(AMDGPUTargetMachine::EnableFunctionCalls), cl::init(true), cl::Hidden)
llvm::SmallString::append
void append(StringRef RHS)
Append from a StringRef.
Definition: SmallString.h:67
llvm::AMDGPUTargetMachine::getFeatureString
StringRef getFeatureString(const Function &F) const
Definition: AMDGPUTargetMachine.cpp:518
llvm::cl::opt< bool >
llvm::TargetMachine::TargetTriple
Triple TargetTriple
Triple string, CPU name, and target feature strings the TargetMachine instance is created with.
Definition: TargetMachine.h:99
llvm::R600TargetMachine::createPassConfig
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
Definition: R600TargetMachine.cpp:141
llvm::TargetMachine::setRequiresStructuredCFG
void setRequiresStructuredCFG(bool Value)
Definition: TargetMachine.h:220
llvm::EngineKind::JIT
@ JIT
Definition: ExecutionEngine.h:524
llvm::FinalizeMachineBundlesID
char & FinalizeMachineBundlesID
FinalizeMachineBundles - This pass finalize machine instruction bundles (created earlier,...
Definition: MachineInstrBundle.cpp:98
llvm::MachineSchedContext
MachineSchedContext provides enough context from the MachineScheduler pass for the target to instanti...
Definition: MachineScheduler.h:120
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::cl::init
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:441
R600PassConfig::addInstSelector
bool addInstSelector() override
addInstSelector - This method should install an instruction selector pass, which converts from LLVM c...
Definition: R600TargetMachine.cpp:119
llvm::AArch64::RM
@ RM
Definition: AArch64ISelLowering.h:478
EnableR600StructurizeCFG
static cl::opt< bool > EnableR600StructurizeCFG("r600-ir-structurize", cl::desc("Use StructurizeCFG IR pass"), cl::init(true))
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:57
llvm::AMDGPUPassConfig::addPreISel
bool addPreISel() override
Methods with trivial inline returns are convenient points in the common codegen pass pipeline where t...
Definition: AMDGPUTargetMachine.cpp:1072
createR600MachineScheduler
static ScheduleDAGInstrs * createR600MachineScheduler(MachineSchedContext *C)
Definition: R600TargetMachine.cpp:38
llvm::CodeGenOpt::Level
Level
Definition: CodeGen.h:52
llvm::TargetSubtargetInfo
TargetSubtargetInfo - Generic base class for all target subtargets.
Definition: TargetSubtargetInfo.h:59
llvm::createStructurizeCFGPass
Pass * createStructurizeCFGPass(bool SkipUniformRegions=false)
When SkipUniformRegions is true the structizer will not structurize regions that only contain uniform...
Definition: StructurizeCFG.cpp:1086
R600PassConfig::addPreISel
bool addPreISel() override
Methods with trivial inline returns are convenient points in the common codegen pass pipeline where t...
Definition: R600TargetMachine.cpp:111
R600SchedRegistry
static MachineSchedRegistry R600SchedRegistry("r600", "Run R600's custom scheduler", createR600MachineScheduler)
llvm::R600TargetMachine::R600TargetMachine
R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, TargetOptions Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool JIT)
Definition: R600TargetMachine.cpp:50
llvm::createR600VectorRegMerger
FunctionPass * createR600VectorRegMerger()
Definition: R600OptimizeVectorRegisters.cpp:383
R600PassConfig::addPreRegAlloc
void addPreRegAlloc() override
This method may be implemented by targets that want to run passes immediately before register allocat...
Definition: R600TargetMachine.cpp:124
llvm::createR600ControlFlowFinalizer
FunctionPass * createR600ControlFlowFinalizer()
Definition: R600ControlFlowFinalizer.cpp:689
EnableR600IfConvert
static cl::opt< bool > EnableR600IfConvert("r600-if-convert", cl::desc("Use if conversion pass"), cl::ReallyHidden, cl::init(true))
llvm::LLVMTargetMachine
This class describes a target machine that is implemented with the LLVM target-independent code gener...
Definition: TargetMachine.h:406
R600PassConfig::createMachineScheduler
ScheduleDAGInstrs * createMachineScheduler(MachineSchedContext *C) const override
Create an instance of ScheduleDAGInstrs to be run within the standard MachineScheduler pass for this ...
Definition: R600TargetMachine.cpp:96
llvm::AMDGPUTargetMachine::EnableFunctionCalls
static bool EnableFunctionCalls
Definition: AMDGPUTargetMachine.h:39
llvm::legacy::PassManagerBase
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
Definition: LegacyPassManager.h:39
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::AMDGPUTargetMachine::getGPUName
StringRef getGPUName(const Function &F) const
Definition: AMDGPUTargetMachine.cpp:513
llvm::cl::desc
Definition: CommandLine.h:412
llvm::ScheduleDAGMILive
ScheduleDAGMILive is an implementation of ScheduleDAGInstrs that schedules machine instructions while...
Definition: MachineScheduler.h:385
llvm::ScheduleDAGInstrs
A ScheduleDAG for scheduling lists of MachineInstr.
Definition: ScheduleDAGInstrs.h:119
llvm::createAMDGPUCFGStructurizerPass
FunctionPass * createAMDGPUCFGStructurizerPass()
Definition: AMDILCFGStructurizer.cpp:1641
llvm::createR600ISelDag
FunctionPass * createR600ISelDag(TargetMachine *TM, CodeGenOpt::Level OptLevel)
This pass converts a legalized DAG into a R600-specific.
Definition: R600ISelDAGToDAG.cpp:181
llvm::IfConverterID
char & IfConverterID
IfConverter - This pass performs machine code if conversion.
Definition: IfConversion.cpp:436
AMDGPUTargetMachine.h