LLVM  16.0.0git
x86_64.cpp
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1 //===----- x86_64.cpp - Generic JITLink x86-64 edge kinds, utilities ------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Generic utilities for graphs representing x86-64 objects.
10 //
11 //===----------------------------------------------------------------------===//
12 
14 
15 #define DEBUG_TYPE "jitlink"
16 
17 namespace llvm {
18 namespace jitlink {
19 namespace x86_64 {
20 
21 const char *getEdgeKindName(Edge::Kind K) {
22  switch (K) {
23  case Pointer64:
24  return "Pointer64";
25  case Pointer32:
26  return "Pointer32";
27  case Pointer32Signed:
28  return "Pointer32Signed";
29  case Pointer16:
30  return "Pointer16";
31  case Delta64:
32  return "Delta64";
33  case Delta32:
34  return "Delta32";
35  case NegDelta64:
36  return "NegDelta64";
37  case NegDelta32:
38  return "NegDelta32";
39  case Delta64FromGOT:
40  return "Delta64FromGOT";
41  case PCRel32:
42  return "PCRel32";
43  case BranchPCRel32:
44  return "BranchPCRel32";
46  return "BranchPCRel32ToPtrJumpStub";
48  return "BranchPCRel32ToPtrJumpStubBypassable";
50  return "RequestGOTAndTransformToDelta32";
52  return "RequestGOTAndTransformToDelta64";
54  return "RequestGOTAndTransformToDelta64FromGOT";
56  return "PCRel32GOTLoadREXRelaxable";
58  return "RequestGOTAndTransformToPCRel32GOTLoadREXRelaxable";
60  return "PCRel32GOTLoadRelaxable";
62  return "RequestGOTAndTransformToPCRel32GOTLoadRelaxable";
64  return "PCRel32TLVPLoadREXRelaxable";
66  return "RequestTLVPAndTransformToPCRel32TLVPLoadREXRelaxable";
67  default:
68  return getGenericEdgeKindName(static_cast<Edge::Kind>(K));
69  }
70 }
71 
72 const char NullPointerContent[PointerSize] = {0x00, 0x00, 0x00, 0x00,
73  0x00, 0x00, 0x00, 0x00};
74 
75 const char PointerJumpStubContent[6] = {
76  static_cast<char>(0xFFu), 0x25, 0x00, 0x00, 0x00, 0x00};
77 
79  LLVM_DEBUG(dbgs() << "Optimizing GOT entries and stubs:\n");
80 
81  for (auto *B : G.blocks())
82  for (auto &E : B->edges()) {
83  if (E.getKind() == x86_64::PCRel32GOTLoadRelaxable ||
85 #ifndef NDEBUG
86  bool REXPrefix = E.getKind() == x86_64::PCRel32GOTLoadREXRelaxable;
87  assert(E.getOffset() >= (REXPrefix ? 3u : 2u) &&
88  "GOT edge occurs too early in block");
89 #endif
90  auto *FixupData = reinterpret_cast<uint8_t *>(
91  const_cast<char *>(B->getContent().data())) +
92  E.getOffset();
93  const uint8_t Op = FixupData[-2];
94  const uint8_t ModRM = FixupData[-1];
95 
96  auto &GOTEntryBlock = E.getTarget().getBlock();
97  assert(GOTEntryBlock.getSize() == G.getPointerSize() &&
98  "GOT entry block should be pointer sized");
99  assert(GOTEntryBlock.edges_size() == 1 &&
100  "GOT entry should only have one outgoing edge");
101  auto &GOTTarget = GOTEntryBlock.edges().begin()->getTarget();
102  orc::ExecutorAddr TargetAddr = GOTTarget.getAddress();
103  orc::ExecutorAddr EdgeAddr = B->getFixupAddress(E);
104  int64_t Displacement = TargetAddr - EdgeAddr + 4;
105  bool TargetInRangeForImmU32 = isInRangeForImmU32(TargetAddr.getValue());
106  bool DisplacementInRangeForImmS32 = isInRangeForImmS32(Displacement);
107 
108  // If both of the Target and displacement is out of range, then
109  // there isn't optimization chance.
110  if (!(TargetInRangeForImmU32 || DisplacementInRangeForImmS32))
111  continue;
112 
113  // Transform "mov foo@GOTPCREL(%rip),%reg" to "lea foo(%rip),%reg".
114  if (Op == 0x8b && DisplacementInRangeForImmS32) {
115  FixupData[-2] = 0x8d;
116  E.setKind(x86_64::Delta32);
117  E.setTarget(GOTTarget);
118  E.setAddend(E.getAddend() - 4);
119  LLVM_DEBUG({
120  dbgs() << " Replaced GOT load wih LEA:\n ";
121  printEdge(dbgs(), *B, E, getEdgeKindName(E.getKind()));
122  dbgs() << "\n";
123  });
124  continue;
125  }
126 
127  // Transform call/jmp instructions
128  if (Op == 0xff && TargetInRangeForImmU32) {
129  if (ModRM == 0x15) {
130  // ABI says we can convert "call *foo@GOTPCREL(%rip)" to "nop; call
131  // foo" But lld convert it to "addr32 call foo, because that makes
132  // result expression to be a single instruction.
133  FixupData[-2] = 0x67;
134  FixupData[-1] = 0xe8;
135  LLVM_DEBUG({
136  dbgs() << " replaced call instruction's memory operand wih imm "
137  "operand:\n ";
138  printEdge(dbgs(), *B, E, getEdgeKindName(E.getKind()));
139  dbgs() << "\n";
140  });
141  } else {
142  // Transform "jmp *foo@GOTPCREL(%rip)" to "jmp foo; nop"
143  assert(ModRM == 0x25 && "Invalid ModRm for call/jmp instructions");
144  FixupData[-2] = 0xe9;
145  FixupData[3] = 0x90;
146  E.setOffset(E.getOffset() - 1);
147  LLVM_DEBUG({
148  dbgs() << " replaced jmp instruction's memory operand wih imm "
149  "operand:\n ";
150  printEdge(dbgs(), *B, E, getEdgeKindName(E.getKind()));
151  dbgs() << "\n";
152  });
153  }
154  E.setKind(x86_64::Pointer32);
155  E.setTarget(GOTTarget);
156  continue;
157  }
158  } else if (E.getKind() == x86_64::BranchPCRel32ToPtrJumpStubBypassable) {
159  auto &StubBlock = E.getTarget().getBlock();
160  assert(StubBlock.getSize() == sizeof(PointerJumpStubContent) &&
161  "Stub block should be stub sized");
162  assert(StubBlock.edges_size() == 1 &&
163  "Stub block should only have one outgoing edge");
164 
165  auto &GOTBlock = StubBlock.edges().begin()->getTarget().getBlock();
166  assert(GOTBlock.getSize() == G.getPointerSize() &&
167  "GOT block should be pointer sized");
168  assert(GOTBlock.edges_size() == 1 &&
169  "GOT block should only have one outgoing edge");
170 
171  auto &GOTTarget = GOTBlock.edges().begin()->getTarget();
172  orc::ExecutorAddr EdgeAddr = B->getAddress() + E.getOffset();
173  orc::ExecutorAddr TargetAddr = GOTTarget.getAddress();
174 
175  int64_t Displacement = TargetAddr - EdgeAddr + 4;
176  if (isInRangeForImmS32(Displacement)) {
177  E.setKind(x86_64::BranchPCRel32);
178  E.setTarget(GOTTarget);
179  LLVM_DEBUG({
180  dbgs() << " Replaced stub branch with direct branch:\n ";
181  printEdge(dbgs(), *B, E, getEdgeKindName(E.getKind()));
182  dbgs() << "\n";
183  });
184  }
185  }
186  }
187 
188  return Error::success();
189 }
190 
191 } // end namespace x86_64
192 } // end namespace jitlink
193 } // end namespace llvm
llvm::orc::ExecutorAddr
Represents an address in the executor process.
Definition: ExecutorAddress.h:31
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::Error::success
static ErrorSuccess success()
Create a success value.
Definition: Error.h:329
llvm::orc::ExecutorAddr::getValue
uint64_t getValue() const
Definition: ExecutorAddress.h:105
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
G
const DataFlowGraph & G
Definition: RDFGraph.cpp:200
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
x86_64.h
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:348
llvm::Error
Lightweight error class with error context and mandatory checking.
Definition: Error.h:155