LLVM  10.0.0svn
Public Types | Public Member Functions | Protected Attributes | List of all members
llvm::AArch64Subtarget Class Referencefinal

#include "Target/AArch64/AArch64Subtarget.h"

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Public Types

enum  ARMProcFamilyEnum : uint8_t {
  Others, CortexA35, CortexA53, CortexA55,
  CortexA57, CortexA65, CortexA72, CortexA73,
  CortexA75, CortexA76, Cyclone, ExynosM1,
  ExynosM3, Falkor, Kryo, NeoverseE1,
  NeoverseN1, Saphira, ThunderX2T99, ThunderX,
  ThunderXT81, ThunderXT83, ThunderXT88, TSV110
}
 

Public Member Functions

 AArch64Subtarget (const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM, bool LittleEndian)
 This constructor initializes the data members to match that of the specified triple. More...
 
const AArch64SelectionDAGInfogetSelectionDAGInfo () const override
 
const AArch64FrameLoweringgetFrameLowering () const override
 
const AArch64TargetLoweringgetTargetLowering () const override
 
const AArch64InstrInfogetInstrInfo () const override
 
const AArch64RegisterInfogetRegisterInfo () const override
 
const CallLoweringgetCallLowering () const override
 
InstructionSelectorgetInstructionSelector () const override
 
const LegalizerInfogetLegalizerInfo () const override
 
const RegisterBankInfogetRegBankInfo () const override
 
const TriplegetTargetTriple () const
 
bool enableMachineScheduler () const override
 
bool enablePostRAScheduler () const override
 
ARMProcFamilyEnum getProcFamily () const
 Returns ARM processor family. More...
 
bool hasV8_1aOps () const
 
bool hasV8_2aOps () const
 
bool hasV8_3aOps () const
 
bool hasV8_4aOps () const
 
bool hasV8_5aOps () const
 
bool hasZeroCycleRegMove () const
 
bool hasZeroCycleZeroingGP () const
 
bool hasZeroCycleZeroingFP () const
 
bool hasZeroCycleZeroingFPWorkaround () const
 
bool requiresStrictAlign () const
 
bool isXRaySupported () const override
 
unsigned getMinVectorRegisterBitWidth () const
 
bool isXRegisterReserved (size_t i) const
 
unsigned getNumXRegisterReserved () const
 
bool isXRegCustomCalleeSaved (size_t i) const
 
bool hasCustomCallingConv () const
 
bool hasFPARMv8 () const
 
bool hasNEON () const
 
bool hasCrypto () const
 
bool hasDotProd () const
 
bool hasCRC () const
 
bool hasLSE () const
 
bool hasRAS () const
 
bool hasRDM () const
 
bool hasSM4 () const
 
bool hasSHA3 () const
 
bool hasSHA2 () const
 
bool hasAES () const
 
bool balanceFPOps () const
 
bool predictableSelectIsExpensive () const
 
bool hasCustomCheapAsMoveHandling () const
 
bool hasExynosCheapAsMoveHandling () const
 
bool isMisaligned128StoreSlow () const
 
bool isPaired128Slow () const
 
bool isSTRQroSlow () const
 
bool useAlternateSExtLoadCVTF32Pattern () const
 
bool hasArithmeticBccFusion () const
 
bool hasArithmeticCbzFusion () const
 
bool hasFuseAddress () const
 
bool hasFuseAES () const
 
bool hasFuseArithmeticLogic () const
 
bool hasFuseCCSelect () const
 
bool hasFuseCryptoEOR () const
 
bool hasFuseLiterals () const
 
bool hasFusion () const
 Return true if the CPU supports any kind of instruction fusion. More...
 
bool useEL1ForTP () const
 
bool useEL2ForTP () const
 
bool useEL3ForTP () const
 
bool useRSqrt () const
 
bool force32BitJumpTables () const
 
unsigned getMaxInterleaveFactor () const
 
unsigned getVectorInsertExtractBaseCost () const
 
unsigned getCacheLineSize () const override
 
unsigned getPrefetchDistance () const override
 
unsigned getMinPrefetchStride () const override
 
unsigned getMaxPrefetchIterationsAhead () const override
 
unsigned getPrefFunctionLogAlignment () const
 
unsigned getPrefLoopLogAlignment () const
 
unsigned getMaximumJumpTableSize () const
 
unsigned getWideningBaseCost () const
 
bool supportsAddressTopByteIgnored () const
 CPU has TBI (top byte of addresses is ignored during HW address translation) and OS enables it. More...
 
bool hasPerfMon () const
 
bool hasFullFP16 () const
 
bool hasFP16FML () const
 
bool hasSPE () const
 
bool hasLSLFast () const
 
bool hasSVE () const
 
bool hasSVE2 () const
 
bool hasRCPC () const
 
bool hasAggressiveFMA () const
 
bool hasAlternativeNZCV () const
 
bool hasFRInt3264 () const
 
bool hasSpecRestrict () const
 
bool hasSSBS () const
 
bool hasSB () const
 
bool hasPredRes () const
 
bool hasCCDP () const
 
bool hasBTI () const
 
bool hasRandGen () const
 
bool hasMTE () const
 
bool hasTME () const
 
bool hasSVE2AES () const
 
bool hasSVE2SM4 () const
 
bool hasSVE2SHA3 () const
 
bool hasSVE2BitPerm () const
 
bool isLittleEndian () const
 
bool isTargetDarwin () const
 
bool isTargetIOS () const
 
bool isTargetLinux () const
 
bool isTargetWindows () const
 
bool isTargetAndroid () const
 
bool isTargetFuchsia () const
 
bool isTargetCOFF () const
 
bool isTargetELF () const
 
bool isTargetMachO () const
 
bool isTargetILP32 () const
 
bool useAA () const override
 
bool hasVH () const
 
bool hasPAN () const
 
bool hasLOR () const
 
bool hasPsUAO () const
 
bool hasPAN_RWV () const
 
bool hasCCPP () const
 
bool hasPA () const
 
bool hasJS () const
 
bool hasCCIDX () const
 
bool hasComplxNum () const
 
bool hasNV () const
 
bool hasRASv8_4 () const
 
bool hasMPAM () const
 
bool hasDIT () const
 
bool hasTRACEV8_4 () const
 
bool hasAM () const
 
bool hasSEL2 () const
 
bool hasTLB_RMI () const
 
bool hasFMI () const
 
bool hasRCPC_IMMO () const
 
bool addrSinkUsingGEPs () const override
 
bool useSmallAddressing () const
 
void ParseSubtargetFeatures (StringRef CPU, StringRef FS)
 ParseSubtargetFeatures - Parses features string setting specified subtarget options. More...
 
unsigned ClassifyGlobalReference (const GlobalValue *GV, const TargetMachine &TM) const
 ClassifyGlobalReference - Find the target operand flags that describe how a global value should be referenced for the current subtarget. More...
 
unsigned classifyGlobalFunctionReference (const GlobalValue *GV, const TargetMachine &TM) const
 
void overrideSchedPolicy (MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override
 
bool enableEarlyIfConversion () const override
 
std::unique_ptr< PBQPRAConstraintgetCustomPBQPConstraints () const override
 
bool isCallingConvWin64 (CallingConv::ID CC) const
 
void mirFileLoaded (MachineFunction &MF) const override
 

Protected Attributes

ARMProcFamilyEnum ARMProcFamily = Others
 ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others. More...
 
bool HasV8_1aOps = false
 
bool HasV8_2aOps = false
 
bool HasV8_3aOps = false
 
bool HasV8_4aOps = false
 
bool HasV8_5aOps = false
 
bool HasFPARMv8 = false
 
bool HasNEON = false
 
bool HasCrypto = false
 
bool HasDotProd = false
 
bool HasCRC = false
 
bool HasLSE = false
 
bool HasRAS = false
 
bool HasRDM = false
 
bool HasPerfMon = false
 
bool HasFullFP16 = false
 
bool HasFP16FML = false
 
bool HasSPE = false
 
bool HasVH = false
 
bool HasPAN = false
 
bool HasLOR = false
 
bool HasPsUAO = false
 
bool HasPAN_RWV = false
 
bool HasCCPP = false
 
bool HasSM4 = false
 
bool HasSHA3 = false
 
bool HasSHA2 = false
 
bool HasAES = false
 
bool HasPA = false
 
bool HasJS = false
 
bool HasCCIDX = false
 
bool HasComplxNum = false
 
bool HasNV = false
 
bool HasRASv8_4 = false
 
bool HasMPAM = false
 
bool HasDIT = false
 
bool HasTRACEV8_4 = false
 
bool HasAM = false
 
bool HasSEL2 = false
 
bool HasTLB_RMI = false
 
bool HasFMI = false
 
bool HasRCPC_IMMO = false
 
bool HasLSLFast = false
 
bool HasSVE = false
 
bool HasSVE2 = false
 
bool HasRCPC = false
 
bool HasAggressiveFMA = false
 
bool HasAlternativeNZCV = false
 
bool HasFRInt3264 = false
 
bool HasSpecRestrict = false
 
bool HasSSBS = false
 
bool HasSB = false
 
bool HasPredRes = false
 
bool HasCCDP = false
 
bool HasBTI = false
 
bool HasRandGen = false
 
bool HasMTE = false
 
bool HasTME = false
 
bool HasSVE2AES = false
 
bool HasSVE2SM4 = false
 
bool HasSVE2SHA3 = false
 
bool HasSVE2BitPerm = false
 
bool HasETE = false
 
bool HasTRBE = false
 
bool HasZeroCycleRegMove = false
 
bool HasZeroCycleZeroing = false
 
bool HasZeroCycleZeroingGP = false
 
bool HasZeroCycleZeroingFP = false
 
bool HasZeroCycleZeroingFPWorkaround = false
 
bool StrictAlign = false
 
bool NegativeImmediates = true
 
unsigned MinVectorRegisterBitWidth = 64
 
bool UseAA = false
 
bool PredictableSelectIsExpensive = false
 
bool BalanceFPOps = false
 
bool CustomAsCheapAsMove = false
 
bool ExynosAsCheapAsMove = false
 
bool UsePostRAScheduler = false
 
bool Misaligned128StoreIsSlow = false
 
bool Paired128IsSlow = false
 
bool STRQroIsSlow = false
 
bool UseAlternateSExtLoadCVTF32Pattern = false
 
bool HasArithmeticBccFusion = false
 
bool HasArithmeticCbzFusion = false
 
bool HasFuseAddress = false
 
bool HasFuseAES = false
 
bool HasFuseArithmeticLogic = false
 
bool HasFuseCCSelect = false
 
bool HasFuseCryptoEOR = false
 
bool HasFuseLiterals = false
 
bool DisableLatencySchedHeuristic = false
 
bool UseRSqrt = false
 
bool Force32BitJumpTables = false
 
bool UseEL1ForTP = false
 
bool UseEL2ForTP = false
 
bool UseEL3ForTP = false
 
bool AllowTaggedGlobals = false
 
uint8_t MaxInterleaveFactor = 2
 
uint8_t VectorInsertExtractBaseCost = 3
 
uint16_t CacheLineSize = 0
 
uint16_t PrefetchDistance = 0
 
uint16_t MinPrefetchStride = 1
 
unsigned MaxPrefetchIterationsAhead = UINT_MAX
 
unsigned PrefFunctionLogAlignment = 0
 
unsigned PrefLoopLogAlignment = 0
 
unsigned MaxJumpTableSize = 0
 
unsigned WideningBaseCost = 0
 
BitVector ReserveXRegister
 
BitVector CustomCallSavedXRegs
 
bool IsLittle
 
Triple TargetTriple
 TargetTriple - What processor and OS we're targeting. More...
 
AArch64FrameLowering FrameLowering
 
AArch64InstrInfo InstrInfo
 
AArch64SelectionDAGInfo TSInfo
 
AArch64TargetLowering TLInfo
 
std::unique_ptr< CallLoweringCallLoweringInfo
 GlobalISel related APIs. More...
 
std::unique_ptr< InstructionSelectorInstSelector
 
std::unique_ptr< LegalizerInfoLegalizer
 
std::unique_ptr< RegisterBankInfoRegBankInfo
 

Detailed Description

Definition at line 37 of file AArch64Subtarget.h.

Member Enumeration Documentation

◆ ARMProcFamilyEnum

Enumerator
Others 
CortexA35 
CortexA53 
CortexA55 
CortexA57 
CortexA65 
CortexA72 
CortexA73 
CortexA75 
CortexA76 
Cyclone 
ExynosM1 
ExynosM3 
Falkor 
Kryo 
NeoverseE1 
NeoverseN1 
Saphira 
ThunderX2T99 
ThunderX 
ThunderXT81 
ThunderXT83 
ThunderXT88 
TSV110 

Definition at line 39 of file AArch64Subtarget.h.

Constructor & Destructor Documentation

◆ AArch64Subtarget()

AArch64Subtarget::AArch64Subtarget ( const Triple TT,
const std::string &  CPU,
const std::string &  FS,
const TargetMachine TM,
bool  LittleEndian 
)

This constructor initializes the data members to match that of the specified triple.

Definition at line 168 of file AArch64Subtarget.cpp.

References CallLoweringInfo, llvm::createAArch64InstructionSelector(), getRegisterInfo(), getTargetLowering(), InstSelector, llvm::AArch64::isX18ReservedByDefault(), RegBankInfo, ReserveXRegister, and llvm::BitVector::set().

Member Function Documentation

◆ addrSinkUsingGEPs()

bool llvm::AArch64Subtarget::addrSinkUsingGEPs ( ) const
inlineoverride

Definition at line 442 of file AArch64Subtarget.h.

References isTargetILP32(), and useAA().

◆ balanceFPOps()

bool llvm::AArch64Subtarget::balanceFPOps ( ) const
inline

Definition at line 318 of file AArch64Subtarget.h.

References BalanceFPOps.

Referenced by getCustomPBQPConstraints(), and false::Chain::str().

◆ classifyGlobalFunctionReference()

unsigned AArch64Subtarget::classifyGlobalFunctionReference ( const GlobalValue GV,
const TargetMachine TM 
) const

◆ ClassifyGlobalReference()

unsigned AArch64Subtarget::ClassifyGlobalReference ( const GlobalValue GV,
const TargetMachine TM 
) const

◆ enableEarlyIfConversion()

bool AArch64Subtarget::enableEarlyIfConversion ( ) const
override

Definition at line 275 of file AArch64Subtarget.cpp.

References EnableEarlyIfConvert.

Referenced by useSmallAddressing().

◆ enableMachineScheduler()

bool llvm::AArch64Subtarget::enableMachineScheduler ( ) const
inlineoverride

Definition at line 263 of file AArch64Subtarget.h.

◆ enablePostRAScheduler()

bool llvm::AArch64Subtarget::enablePostRAScheduler ( ) const
inlineoverride

Definition at line 264 of file AArch64Subtarget.h.

References UsePostRAScheduler.

◆ force32BitJumpTables()

bool llvm::AArch64Subtarget::force32BitJumpTables ( ) const
inline

Definition at line 351 of file AArch64Subtarget.h.

References Force32BitJumpTables.

◆ getCacheLineSize()

unsigned llvm::AArch64Subtarget::getCacheLineSize ( ) const
inlineoverride

Definition at line 356 of file AArch64Subtarget.h.

References CacheLineSize.

◆ getCallLowering()

const CallLowering * AArch64Subtarget::getCallLowering ( ) const
override

Definition at line 195 of file AArch64Subtarget.cpp.

References CallLoweringInfo.

Referenced by getRegisterInfo().

◆ getCustomPBQPConstraints()

std::unique_ptr< PBQPRAConstraint > AArch64Subtarget::getCustomPBQPConstraints ( ) const
override

Definition at line 293 of file AArch64Subtarget.cpp.

References balanceFPOps().

Referenced by useSmallAddressing().

◆ getFrameLowering()

const AArch64FrameLowering* llvm::AArch64Subtarget::getFrameLowering ( ) const
inlineoverride

Definition at line 248 of file AArch64Subtarget.h.

References FrameLowering.

◆ getInstrInfo()

const AArch64InstrInfo* llvm::AArch64Subtarget::getInstrInfo ( ) const
inlineoverride

◆ getInstructionSelector()

InstructionSelector * AArch64Subtarget::getInstructionSelector ( ) const
override

Definition at line 199 of file AArch64Subtarget.cpp.

References InstSelector.

Referenced by getRegisterInfo().

◆ getLegalizerInfo()

const LegalizerInfo * AArch64Subtarget::getLegalizerInfo ( ) const
override

Definition at line 203 of file AArch64Subtarget.cpp.

Referenced by getRegisterInfo().

◆ getMaximumJumpTableSize()

unsigned llvm::AArch64Subtarget::getMaximumJumpTableSize ( ) const
inline

Definition at line 367 of file AArch64Subtarget.h.

References MaxJumpTableSize.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ getMaxInterleaveFactor()

unsigned llvm::AArch64Subtarget::getMaxInterleaveFactor ( ) const
inline

Definition at line 352 of file AArch64Subtarget.h.

References MaxInterleaveFactor.

Referenced by llvm::AArch64TTIImpl::getMaxInterleaveFactor().

◆ getMaxPrefetchIterationsAhead()

unsigned llvm::AArch64Subtarget::getMaxPrefetchIterationsAhead ( ) const
inlineoverride

Definition at line 359 of file AArch64Subtarget.h.

References MaxPrefetchIterationsAhead.

◆ getMinPrefetchStride()

unsigned llvm::AArch64Subtarget::getMinPrefetchStride ( ) const
inlineoverride

Definition at line 358 of file AArch64Subtarget.h.

References MinPrefetchStride.

◆ getMinVectorRegisterBitWidth()

unsigned llvm::AArch64Subtarget::getMinVectorRegisterBitWidth ( ) const
inline

◆ getNumXRegisterReserved()

unsigned llvm::AArch64Subtarget::getNumXRegisterReserved ( ) const
inline

◆ getPrefetchDistance()

unsigned llvm::AArch64Subtarget::getPrefetchDistance ( ) const
inlineoverride

Definition at line 357 of file AArch64Subtarget.h.

References PrefetchDistance.

◆ getPrefFunctionLogAlignment()

unsigned llvm::AArch64Subtarget::getPrefFunctionLogAlignment ( ) const
inline

◆ getPrefLoopLogAlignment()

unsigned llvm::AArch64Subtarget::getPrefLoopLogAlignment ( ) const
inline

◆ getProcFamily()

ARMProcFamilyEnum llvm::AArch64Subtarget::getProcFamily ( ) const
inline

Returns ARM processor family.

Avoid this function! CPU specifics should be kept local to this class and preferably modeled with SubtargetFeatures or properties in initializeProperties().

Definition at line 272 of file AArch64Subtarget.h.

References ARMProcFamily.

Referenced by llvm::AArch64TTIImpl::getUnrollingPreferences().

◆ getRegBankInfo()

const RegisterBankInfo * AArch64Subtarget::getRegBankInfo ( ) const
override

Definition at line 207 of file AArch64Subtarget.cpp.

References RegBankInfo.

Referenced by getRegisterInfo().

◆ getRegisterInfo()

const AArch64RegisterInfo* llvm::AArch64Subtarget::getRegisterInfo ( ) const
inlineoverride

◆ getSelectionDAGInfo()

const AArch64SelectionDAGInfo* llvm::AArch64Subtarget::getSelectionDAGInfo ( ) const
inlineoverride

Definition at line 245 of file AArch64Subtarget.h.

References TSInfo.

◆ getTargetLowering()

const AArch64TargetLowering* llvm::AArch64Subtarget::getTargetLowering ( ) const
inlineoverride

◆ getTargetTriple()

const Triple& llvm::AArch64Subtarget::getTargetTriple ( ) const
inline

Definition at line 262 of file AArch64Subtarget.h.

References TargetTriple.

Referenced by ClassifyGlobalReference().

◆ getVectorInsertExtractBaseCost()

unsigned llvm::AArch64Subtarget::getVectorInsertExtractBaseCost ( ) const
inline

Definition at line 353 of file AArch64Subtarget.h.

References VectorInsertExtractBaseCost.

Referenced by llvm::AArch64TTIImpl::getVectorInstrCost().

◆ getWideningBaseCost()

unsigned llvm::AArch64Subtarget::getWideningBaseCost ( ) const
inline

◆ hasAES()

bool llvm::AArch64Subtarget::hasAES ( ) const
inline

Definition at line 317 of file AArch64Subtarget.h.

References HasAES.

◆ hasAggressiveFMA()

bool llvm::AArch64Subtarget::hasAggressiveFMA ( ) const
inline

Definition at line 383 of file AArch64Subtarget.h.

References HasAggressiveFMA.

◆ hasAlternativeNZCV()

bool llvm::AArch64Subtarget::hasAlternativeNZCV ( ) const
inline

Definition at line 384 of file AArch64Subtarget.h.

References HasAlternativeNZCV.

◆ hasAM()

bool llvm::AArch64Subtarget::hasAM ( ) const
inline

Definition at line 436 of file AArch64Subtarget.h.

References HasAM.

◆ hasArithmeticBccFusion()

bool llvm::AArch64Subtarget::hasArithmeticBccFusion ( ) const
inline

Definition at line 330 of file AArch64Subtarget.h.

References HasArithmeticBccFusion.

Referenced by hasFusion().

◆ hasArithmeticCbzFusion()

bool llvm::AArch64Subtarget::hasArithmeticCbzFusion ( ) const
inline

Definition at line 331 of file AArch64Subtarget.h.

References HasArithmeticCbzFusion.

Referenced by hasFusion().

◆ hasBTI()

bool llvm::AArch64Subtarget::hasBTI ( ) const
inline

Definition at line 391 of file AArch64Subtarget.h.

References HasBTI.

◆ hasCCDP()

bool llvm::AArch64Subtarget::hasCCDP ( ) const
inline

Definition at line 390 of file AArch64Subtarget.h.

References HasCCDP.

◆ hasCCIDX()

bool llvm::AArch64Subtarget::hasCCIDX ( ) const
inline

Definition at line 428 of file AArch64Subtarget.h.

References HasCCIDX.

◆ hasCCPP()

bool llvm::AArch64Subtarget::hasCCPP ( ) const
inline

Definition at line 424 of file AArch64Subtarget.h.

References HasCCPP.

◆ hasComplxNum()

bool llvm::AArch64Subtarget::hasComplxNum ( ) const
inline

Definition at line 429 of file AArch64Subtarget.h.

References HasComplxNum.

◆ hasCRC()

bool llvm::AArch64Subtarget::hasCRC ( ) const
inline

Definition at line 310 of file AArch64Subtarget.h.

References HasCRC.

◆ hasCrypto()

bool llvm::AArch64Subtarget::hasCrypto ( ) const
inline

Definition at line 308 of file AArch64Subtarget.h.

References HasCrypto.

◆ hasCustomCallingConv()

bool llvm::AArch64Subtarget::hasCustomCallingConv ( ) const
inline

◆ hasCustomCheapAsMoveHandling()

bool llvm::AArch64Subtarget::hasCustomCheapAsMoveHandling ( ) const
inline

Definition at line 322 of file AArch64Subtarget.h.

References CustomAsCheapAsMove.

Referenced by llvm::AArch64InstrInfo::isAsCheapAsAMove().

◆ hasDIT()

bool llvm::AArch64Subtarget::hasDIT ( ) const
inline

Definition at line 434 of file AArch64Subtarget.h.

References HasDIT.

◆ hasDotProd()

bool llvm::AArch64Subtarget::hasDotProd ( ) const
inline

Definition at line 309 of file AArch64Subtarget.h.

References HasDotProd.

◆ hasExynosCheapAsMoveHandling()

bool llvm::AArch64Subtarget::hasExynosCheapAsMoveHandling ( ) const
inline

Definition at line 323 of file AArch64Subtarget.h.

References ExynosAsCheapAsMove.

Referenced by llvm::AArch64InstrInfo::isAsCheapAsAMove().

◆ hasFMI()

bool llvm::AArch64Subtarget::hasFMI ( ) const
inline

Definition at line 439 of file AArch64Subtarget.h.

References HasFMI.

◆ hasFP16FML()

bool llvm::AArch64Subtarget::hasFP16FML ( ) const
inline

Definition at line 377 of file AArch64Subtarget.h.

References HasFP16FML.

◆ hasFPARMv8()

bool llvm::AArch64Subtarget::hasFPARMv8 ( ) const
inline

◆ hasFRInt3264()

bool llvm::AArch64Subtarget::hasFRInt3264 ( ) const
inline

Definition at line 385 of file AArch64Subtarget.h.

References HasFRInt3264.

◆ hasFullFP16()

bool llvm::AArch64Subtarget::hasFullFP16 ( ) const
inline

◆ hasFuseAddress()

bool llvm::AArch64Subtarget::hasFuseAddress ( ) const
inline

Definition at line 332 of file AArch64Subtarget.h.

References HasFuseAddress.

◆ hasFuseAES()

bool llvm::AArch64Subtarget::hasFuseAES ( ) const
inline

Definition at line 333 of file AArch64Subtarget.h.

References HasFuseAES.

Referenced by hasFusion().

◆ hasFuseArithmeticLogic()

bool llvm::AArch64Subtarget::hasFuseArithmeticLogic ( ) const
inline

Definition at line 334 of file AArch64Subtarget.h.

References HasFuseArithmeticLogic.

Referenced by hasFusion().

◆ hasFuseCCSelect()

bool llvm::AArch64Subtarget::hasFuseCCSelect ( ) const
inline

Definition at line 335 of file AArch64Subtarget.h.

References HasFuseCCSelect.

Referenced by hasFusion().

◆ hasFuseCryptoEOR()

bool llvm::AArch64Subtarget::hasFuseCryptoEOR ( ) const
inline

Definition at line 336 of file AArch64Subtarget.h.

References HasFuseCryptoEOR.

◆ hasFuseLiterals()

bool llvm::AArch64Subtarget::hasFuseLiterals ( ) const
inline

Definition at line 337 of file AArch64Subtarget.h.

References HasFuseLiterals.

Referenced by hasFusion(), and llvm::AArch64TargetLowering::isFPImmLegal().

◆ hasFusion()

bool llvm::AArch64Subtarget::hasFusion ( ) const
inline

Return true if the CPU supports any kind of instruction fusion.

Definition at line 340 of file AArch64Subtarget.h.

References hasArithmeticBccFusion(), hasArithmeticCbzFusion(), hasFuseAES(), hasFuseArithmeticLogic(), hasFuseCCSelect(), and hasFuseLiterals().

Referenced by llvm::AArch64beTargetMachine::AArch64beTargetMachine().

◆ hasJS()

bool llvm::AArch64Subtarget::hasJS ( ) const
inline

Definition at line 427 of file AArch64Subtarget.h.

References HasJS.

◆ hasLOR()

bool llvm::AArch64Subtarget::hasLOR ( ) const
inline

Definition at line 420 of file AArch64Subtarget.h.

References HasLOR.

◆ hasLSE()

bool llvm::AArch64Subtarget::hasLSE ( ) const
inline

◆ hasLSLFast()

bool llvm::AArch64Subtarget::hasLSLFast ( ) const
inline

Definition at line 379 of file AArch64Subtarget.h.

References HasLSLFast.

◆ hasMPAM()

bool llvm::AArch64Subtarget::hasMPAM ( ) const
inline

Definition at line 433 of file AArch64Subtarget.h.

References HasMPAM.

◆ hasMTE()

bool llvm::AArch64Subtarget::hasMTE ( ) const
inline

Definition at line 393 of file AArch64Subtarget.h.

References HasMTE.

◆ hasNEON()

bool llvm::AArch64Subtarget::hasNEON ( ) const
inline

◆ hasNV()

bool llvm::AArch64Subtarget::hasNV ( ) const
inline

Definition at line 431 of file AArch64Subtarget.h.

References HasNV.

◆ hasPA()

bool llvm::AArch64Subtarget::hasPA ( ) const
inline

Definition at line 426 of file AArch64Subtarget.h.

References HasPA.

◆ hasPAN()

bool llvm::AArch64Subtarget::hasPAN ( ) const
inline

Definition at line 419 of file AArch64Subtarget.h.

References HasPAN.

◆ hasPAN_RWV()

bool llvm::AArch64Subtarget::hasPAN_RWV ( ) const
inline

Definition at line 423 of file AArch64Subtarget.h.

References HasPAN_RWV.

◆ hasPerfMon()

bool llvm::AArch64Subtarget::hasPerfMon ( ) const
inline

Definition at line 375 of file AArch64Subtarget.h.

References HasPerfMon.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ hasPredRes()

bool llvm::AArch64Subtarget::hasPredRes ( ) const
inline

Definition at line 389 of file AArch64Subtarget.h.

References HasPredRes.

◆ hasPsUAO()

bool llvm::AArch64Subtarget::hasPsUAO ( ) const
inline

Definition at line 422 of file AArch64Subtarget.h.

References HasPsUAO.

◆ hasRandGen()

bool llvm::AArch64Subtarget::hasRandGen ( ) const
inline

Definition at line 392 of file AArch64Subtarget.h.

References HasRandGen.

◆ hasRAS()

bool llvm::AArch64Subtarget::hasRAS ( ) const
inline

Definition at line 312 of file AArch64Subtarget.h.

References HasRAS.

◆ hasRASv8_4()

bool llvm::AArch64Subtarget::hasRASv8_4 ( ) const
inline

Definition at line 432 of file AArch64Subtarget.h.

References HasRASv8_4.

◆ hasRCPC()

bool llvm::AArch64Subtarget::hasRCPC ( ) const
inline

Definition at line 382 of file AArch64Subtarget.h.

References HasRCPC.

◆ hasRCPC_IMMO()

bool llvm::AArch64Subtarget::hasRCPC_IMMO ( ) const
inline

Definition at line 440 of file AArch64Subtarget.h.

References HasRCPC_IMMO.

◆ hasRDM()

bool llvm::AArch64Subtarget::hasRDM ( ) const
inline

Definition at line 313 of file AArch64Subtarget.h.

References HasRDM.

◆ hasSB()

bool llvm::AArch64Subtarget::hasSB ( ) const
inline

Definition at line 388 of file AArch64Subtarget.h.

References HasSB.

◆ hasSEL2()

bool llvm::AArch64Subtarget::hasSEL2 ( ) const
inline

Definition at line 437 of file AArch64Subtarget.h.

References HasSEL2.

◆ hasSHA2()

bool llvm::AArch64Subtarget::hasSHA2 ( ) const
inline

Definition at line 316 of file AArch64Subtarget.h.

References HasSHA2.

◆ hasSHA3()

bool llvm::AArch64Subtarget::hasSHA3 ( ) const
inline

Definition at line 315 of file AArch64Subtarget.h.

References HasSHA3.

◆ hasSM4()

bool llvm::AArch64Subtarget::hasSM4 ( ) const
inline

Definition at line 314 of file AArch64Subtarget.h.

References HasSM4.

◆ hasSPE()

bool llvm::AArch64Subtarget::hasSPE ( ) const
inline

Definition at line 378 of file AArch64Subtarget.h.

References HasSPE.

◆ hasSpecRestrict()

bool llvm::AArch64Subtarget::hasSpecRestrict ( ) const
inline

Definition at line 386 of file AArch64Subtarget.h.

References HasSpecRestrict.

◆ hasSSBS()

bool llvm::AArch64Subtarget::hasSSBS ( ) const
inline

Definition at line 387 of file AArch64Subtarget.h.

References HasSSBS.

◆ hasSVE()

bool llvm::AArch64Subtarget::hasSVE ( ) const
inline

Definition at line 380 of file AArch64Subtarget.h.

References HasSVE.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ hasSVE2()

bool llvm::AArch64Subtarget::hasSVE2 ( ) const
inline

Definition at line 381 of file AArch64Subtarget.h.

References HasSVE2.

◆ hasSVE2AES()

bool llvm::AArch64Subtarget::hasSVE2AES ( ) const
inline

Definition at line 396 of file AArch64Subtarget.h.

References HasSVE2AES.

◆ hasSVE2BitPerm()

bool llvm::AArch64Subtarget::hasSVE2BitPerm ( ) const
inline

Definition at line 399 of file AArch64Subtarget.h.

References HasSVE2BitPerm.

◆ hasSVE2SHA3()

bool llvm::AArch64Subtarget::hasSVE2SHA3 ( ) const
inline

Definition at line 398 of file AArch64Subtarget.h.

References HasSVE2SHA3.

◆ hasSVE2SM4()

bool llvm::AArch64Subtarget::hasSVE2SM4 ( ) const
inline

Definition at line 397 of file AArch64Subtarget.h.

References HasSVE2SM4.

◆ hasTLB_RMI()

bool llvm::AArch64Subtarget::hasTLB_RMI ( ) const
inline

Definition at line 438 of file AArch64Subtarget.h.

References HasTLB_RMI.

◆ hasTME()

bool llvm::AArch64Subtarget::hasTME ( ) const
inline

Definition at line 394 of file AArch64Subtarget.h.

References HasTME.

◆ hasTRACEV8_4()

bool llvm::AArch64Subtarget::hasTRACEV8_4 ( ) const
inline

Definition at line 435 of file AArch64Subtarget.h.

References HasTRACEV8_4.

◆ hasV8_1aOps()

bool llvm::AArch64Subtarget::hasV8_1aOps ( ) const
inline

Definition at line 276 of file AArch64Subtarget.h.

References HasV8_1aOps.

◆ hasV8_2aOps()

bool llvm::AArch64Subtarget::hasV8_2aOps ( ) const
inline

Definition at line 277 of file AArch64Subtarget.h.

References HasV8_2aOps.

◆ hasV8_3aOps()

bool llvm::AArch64Subtarget::hasV8_3aOps ( ) const
inline

Definition at line 278 of file AArch64Subtarget.h.

References HasV8_3aOps.

Referenced by InsertReturnAddressAuth().

◆ hasV8_4aOps()

bool llvm::AArch64Subtarget::hasV8_4aOps ( ) const
inline

Definition at line 279 of file AArch64Subtarget.h.

References HasV8_4aOps.

◆ hasV8_5aOps()

bool llvm::AArch64Subtarget::hasV8_5aOps ( ) const
inline

Definition at line 280 of file AArch64Subtarget.h.

References HasV8_5aOps.

◆ hasVH()

bool llvm::AArch64Subtarget::hasVH ( ) const
inline

Definition at line 418 of file AArch64Subtarget.h.

References HasVH.

◆ hasZeroCycleRegMove()

bool llvm::AArch64Subtarget::hasZeroCycleRegMove ( ) const
inline

Definition at line 282 of file AArch64Subtarget.h.

References HasZeroCycleRegMove.

◆ hasZeroCycleZeroingFP()

bool llvm::AArch64Subtarget::hasZeroCycleZeroingFP ( ) const
inline

Definition at line 286 of file AArch64Subtarget.h.

References HasZeroCycleZeroingFP.

Referenced by llvm::AArch64InstrInfo::isAsCheapAsAMove().

◆ hasZeroCycleZeroingFPWorkaround()

bool llvm::AArch64Subtarget::hasZeroCycleZeroingFPWorkaround ( ) const
inline

Definition at line 288 of file AArch64Subtarget.h.

References HasZeroCycleZeroingFPWorkaround.

◆ hasZeroCycleZeroingGP()

bool llvm::AArch64Subtarget::hasZeroCycleZeroingGP ( ) const
inline

Definition at line 284 of file AArch64Subtarget.h.

References HasZeroCycleZeroingGP.

Referenced by llvm::AArch64InstrInfo::isAsCheapAsAMove().

◆ isCallingConvWin64()

bool llvm::AArch64Subtarget::isCallingConvWin64 ( CallingConv::ID  CC) const
inline

◆ isLittleEndian()

bool llvm::AArch64Subtarget::isLittleEndian ( ) const
inline

◆ isMisaligned128StoreSlow()

bool llvm::AArch64Subtarget::isMisaligned128StoreSlow ( ) const
inline

◆ isPaired128Slow()

bool llvm::AArch64Subtarget::isPaired128Slow ( ) const
inline

Definition at line 325 of file AArch64Subtarget.h.

References Paired128IsSlow.

◆ isSTRQroSlow()

bool llvm::AArch64Subtarget::isSTRQroSlow ( ) const
inline

Definition at line 326 of file AArch64Subtarget.h.

References STRQroIsSlow.

◆ isTargetAndroid()

bool llvm::AArch64Subtarget::isTargetAndroid ( ) const
inline

Definition at line 407 of file AArch64Subtarget.h.

References llvm::Triple::isAndroid().

◆ isTargetCOFF()

bool llvm::AArch64Subtarget::isTargetCOFF ( ) const
inline

Definition at line 410 of file AArch64Subtarget.h.

References llvm::Triple::isOSBinFormatCOFF().

Referenced by mayTailCallThisCC().

◆ isTargetDarwin()

bool llvm::AArch64Subtarget::isTargetDarwin ( ) const
inline

◆ isTargetELF()

bool llvm::AArch64Subtarget::isTargetELF ( ) const
inline

Definition at line 411 of file AArch64Subtarget.h.

References llvm::Triple::isOSBinFormatELF().

Referenced by mayTailCallThisCC().

◆ isTargetFuchsia()

bool llvm::AArch64Subtarget::isTargetFuchsia ( ) const
inline

Definition at line 408 of file AArch64Subtarget.h.

References llvm::Triple::isOSFuchsia().

◆ isTargetILP32()

bool llvm::AArch64Subtarget::isTargetILP32 ( ) const
inline

◆ isTargetIOS()

bool llvm::AArch64Subtarget::isTargetIOS ( ) const
inline

Definition at line 404 of file AArch64Subtarget.h.

References llvm::Triple::isiOS().

◆ isTargetLinux()

bool llvm::AArch64Subtarget::isTargetLinux ( ) const
inline

Definition at line 405 of file AArch64Subtarget.h.

References llvm::Triple::isOSLinux().

◆ isTargetMachO()

bool llvm::AArch64Subtarget::isTargetMachO ( ) const
inline

◆ isTargetWindows()

bool llvm::AArch64Subtarget::isTargetWindows ( ) const
inline

◆ isXRaySupported()

bool llvm::AArch64Subtarget::isXRaySupported ( ) const
inlineoverride

Definition at line 294 of file AArch64Subtarget.h.

◆ isXRegCustomCalleeSaved()

bool llvm::AArch64Subtarget::isXRegCustomCalleeSaved ( size_t  i) const
inline

◆ isXRegisterReserved()

bool llvm::AArch64Subtarget::isXRegisterReserved ( size_t  i) const
inline

◆ mirFileLoaded()

void AArch64Subtarget::mirFileLoaded ( MachineFunction MF) const
override

◆ overrideSchedPolicy()

void AArch64Subtarget::overrideSchedPolicy ( MachineSchedPolicy Policy,
unsigned  NumRegionInstrs 
) const
override

◆ ParseSubtargetFeatures()

void llvm::AArch64Subtarget::ParseSubtargetFeatures ( StringRef  CPU,
StringRef  FS 
)

ParseSubtargetFeatures - Parses features string setting specified subtarget options.

Definition of function is auto generated by tblgen.

Referenced by useSmallAddressing().

◆ predictableSelectIsExpensive()

bool llvm::AArch64Subtarget::predictableSelectIsExpensive ( ) const
inline

◆ requiresStrictAlign()

bool llvm::AArch64Subtarget::requiresStrictAlign ( ) const
inline

◆ supportsAddressTopByteIgnored()

bool AArch64Subtarget::supportsAddressTopByteIgnored ( ) const

CPU has TBI (top byte of addresses is ignored during HW address translation) and OS enables it.

Definition at line 279 of file AArch64Subtarget.cpp.

References llvm::Triple::getiOSVersion(), llvm::Triple::isiOS(), TargetTriple, and UseAddressTopByteIgnored.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), getWideningBaseCost(), and performSTORECombine().

◆ useAA()

bool llvm::AArch64Subtarget::useAA ( ) const
inlineoverride

Definition at line 416 of file AArch64Subtarget.h.

References UseAA.

Referenced by addrSinkUsingGEPs().

◆ useAlternateSExtLoadCVTF32Pattern()

bool llvm::AArch64Subtarget::useAlternateSExtLoadCVTF32Pattern ( ) const
inline

Definition at line 327 of file AArch64Subtarget.h.

References UseAlternateSExtLoadCVTF32Pattern.

◆ useEL1ForTP()

bool llvm::AArch64Subtarget::useEL1ForTP ( ) const
inline

Definition at line 346 of file AArch64Subtarget.h.

References UseEL1ForTP.

Referenced by for().

◆ useEL2ForTP()

bool llvm::AArch64Subtarget::useEL2ForTP ( ) const
inline

Definition at line 347 of file AArch64Subtarget.h.

References UseEL2ForTP.

Referenced by for().

◆ useEL3ForTP()

bool llvm::AArch64Subtarget::useEL3ForTP ( ) const
inline

Definition at line 348 of file AArch64Subtarget.h.

References UseEL3ForTP.

Referenced by for().

◆ useRSqrt()

bool llvm::AArch64Subtarget::useRSqrt ( ) const
inline

Definition at line 350 of file AArch64Subtarget.h.

References UseRSqrt.

Referenced by getEstimate().

◆ useSmallAddressing()

bool llvm::AArch64Subtarget::useSmallAddressing ( ) const
inline

Member Data Documentation

◆ AllowTaggedGlobals

bool llvm::AArch64Subtarget::AllowTaggedGlobals = false
protected

Definition at line 194 of file AArch64Subtarget.h.

Referenced by ClassifyGlobalReference().

◆ ARMProcFamily

ARMProcFamilyEnum llvm::AArch64Subtarget::ARMProcFamily = Others
protected

ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.

Definition at line 68 of file AArch64Subtarget.h.

Referenced by getProcFamily().

◆ BalanceFPOps

bool llvm::AArch64Subtarget::BalanceFPOps = false
protected

Definition at line 172 of file AArch64Subtarget.h.

Referenced by balanceFPOps().

◆ CacheLineSize

uint16_t llvm::AArch64Subtarget::CacheLineSize = 0
protected

Definition at line 197 of file AArch64Subtarget.h.

Referenced by getCacheLineSize().

◆ CallLoweringInfo

std::unique_ptr<CallLowering> llvm::AArch64Subtarget::CallLoweringInfo
protected

GlobalISel related APIs.

Definition at line 223 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getCallLowering().

◆ CustomAsCheapAsMove

bool llvm::AArch64Subtarget::CustomAsCheapAsMove = false
protected

Definition at line 173 of file AArch64Subtarget.h.

Referenced by hasCustomCheapAsMoveHandling().

◆ CustomCallSavedXRegs

BitVector llvm::AArch64Subtarget::CustomCallSavedXRegs
protected

Definition at line 210 of file AArch64Subtarget.h.

◆ DisableLatencySchedHeuristic

bool llvm::AArch64Subtarget::DisableLatencySchedHeuristic = false
protected

Definition at line 188 of file AArch64Subtarget.h.

Referenced by overrideSchedPolicy().

◆ ExynosAsCheapAsMove

bool llvm::AArch64Subtarget::ExynosAsCheapAsMove = false
protected

Definition at line 174 of file AArch64Subtarget.h.

Referenced by hasExynosCheapAsMoveHandling().

◆ Force32BitJumpTables

bool llvm::AArch64Subtarget::Force32BitJumpTables = false
protected

Definition at line 190 of file AArch64Subtarget.h.

Referenced by force32BitJumpTables().

◆ FrameLowering

AArch64FrameLowering llvm::AArch64Subtarget::FrameLowering
protected

Definition at line 217 of file AArch64Subtarget.h.

Referenced by getFrameLowering().

◆ HasAES

bool llvm::AArch64Subtarget::HasAES = false
protected

Definition at line 103 of file AArch64Subtarget.h.

Referenced by hasAES().

◆ HasAggressiveFMA

bool llvm::AArch64Subtarget::HasAggressiveFMA = false
protected

Definition at line 127 of file AArch64Subtarget.h.

Referenced by hasAggressiveFMA().

◆ HasAlternativeNZCV

bool llvm::AArch64Subtarget::HasAlternativeNZCV = false
protected

Definition at line 130 of file AArch64Subtarget.h.

Referenced by hasAlternativeNZCV().

◆ HasAM

bool llvm::AArch64Subtarget::HasAM = false
protected

Definition at line 117 of file AArch64Subtarget.h.

Referenced by hasAM().

◆ HasArithmeticBccFusion

bool llvm::AArch64Subtarget::HasArithmeticBccFusion = false
protected

Definition at line 180 of file AArch64Subtarget.h.

Referenced by hasArithmeticBccFusion().

◆ HasArithmeticCbzFusion

bool llvm::AArch64Subtarget::HasArithmeticCbzFusion = false
protected

Definition at line 181 of file AArch64Subtarget.h.

Referenced by hasArithmeticCbzFusion().

◆ HasBTI

bool llvm::AArch64Subtarget::HasBTI = false
protected

Definition at line 137 of file AArch64Subtarget.h.

Referenced by hasBTI().

◆ HasCCDP

bool llvm::AArch64Subtarget::HasCCDP = false
protected

Definition at line 136 of file AArch64Subtarget.h.

Referenced by hasCCDP().

◆ HasCCIDX

bool llvm::AArch64Subtarget::HasCCIDX = false
protected

Definition at line 108 of file AArch64Subtarget.h.

Referenced by hasCCIDX().

◆ HasCCPP

bool llvm::AArch64Subtarget::HasCCPP = false
protected

Definition at line 97 of file AArch64Subtarget.h.

Referenced by hasCCPP().

◆ HasComplxNum

bool llvm::AArch64Subtarget::HasComplxNum = false
protected

Definition at line 109 of file AArch64Subtarget.h.

Referenced by hasComplxNum().

◆ HasCRC

bool llvm::AArch64Subtarget::HasCRC = false
protected

Definition at line 80 of file AArch64Subtarget.h.

Referenced by hasCRC().

◆ HasCrypto

bool llvm::AArch64Subtarget::HasCrypto = false
protected

Definition at line 78 of file AArch64Subtarget.h.

Referenced by hasCrypto().

◆ HasDIT

bool llvm::AArch64Subtarget::HasDIT = false
protected

Definition at line 115 of file AArch64Subtarget.h.

Referenced by hasDIT().

◆ HasDotProd

bool llvm::AArch64Subtarget::HasDotProd = false
protected

Definition at line 79 of file AArch64Subtarget.h.

Referenced by hasDotProd().

◆ HasETE

bool llvm::AArch64Subtarget::HasETE = false
protected

Definition at line 149 of file AArch64Subtarget.h.

◆ HasFMI

bool llvm::AArch64Subtarget::HasFMI = false
protected

Definition at line 120 of file AArch64Subtarget.h.

Referenced by hasFMI().

◆ HasFP16FML

bool llvm::AArch64Subtarget::HasFP16FML = false
protected

Definition at line 86 of file AArch64Subtarget.h.

Referenced by hasFP16FML().

◆ HasFPARMv8

bool llvm::AArch64Subtarget::HasFPARMv8 = false
protected

Definition at line 76 of file AArch64Subtarget.h.

Referenced by hasFPARMv8().

◆ HasFRInt3264

bool llvm::AArch64Subtarget::HasFRInt3264 = false
protected

Definition at line 131 of file AArch64Subtarget.h.

Referenced by hasFRInt3264().

◆ HasFullFP16

bool llvm::AArch64Subtarget::HasFullFP16 = false
protected

Definition at line 85 of file AArch64Subtarget.h.

Referenced by hasFullFP16().

◆ HasFuseAddress

bool llvm::AArch64Subtarget::HasFuseAddress = false
protected

Definition at line 182 of file AArch64Subtarget.h.

Referenced by hasFuseAddress().

◆ HasFuseAES

bool llvm::AArch64Subtarget::HasFuseAES = false
protected

Definition at line 183 of file AArch64Subtarget.h.

Referenced by hasFuseAES().

◆ HasFuseArithmeticLogic

bool llvm::AArch64Subtarget::HasFuseArithmeticLogic = false
protected

Definition at line 184 of file AArch64Subtarget.h.

Referenced by hasFuseArithmeticLogic().

◆ HasFuseCCSelect

bool llvm::AArch64Subtarget::HasFuseCCSelect = false
protected

Definition at line 185 of file AArch64Subtarget.h.

Referenced by hasFuseCCSelect().

◆ HasFuseCryptoEOR

bool llvm::AArch64Subtarget::HasFuseCryptoEOR = false
protected

Definition at line 186 of file AArch64Subtarget.h.

Referenced by hasFuseCryptoEOR().

◆ HasFuseLiterals

bool llvm::AArch64Subtarget::HasFuseLiterals = false
protected

Definition at line 187 of file AArch64Subtarget.h.

Referenced by hasFuseLiterals().

◆ HasJS

bool llvm::AArch64Subtarget::HasJS = false
protected

Definition at line 107 of file AArch64Subtarget.h.

Referenced by hasJS().

◆ HasLOR

bool llvm::AArch64Subtarget::HasLOR = false
protected

Definition at line 92 of file AArch64Subtarget.h.

Referenced by hasLOR().

◆ HasLSE

bool llvm::AArch64Subtarget::HasLSE = false
protected

Definition at line 81 of file AArch64Subtarget.h.

Referenced by hasLSE().

◆ HasLSLFast

bool llvm::AArch64Subtarget::HasLSLFast = false
protected

Definition at line 123 of file AArch64Subtarget.h.

Referenced by hasLSLFast().

◆ HasMPAM

bool llvm::AArch64Subtarget::HasMPAM = false
protected

Definition at line 114 of file AArch64Subtarget.h.

Referenced by hasMPAM().

◆ HasMTE

bool llvm::AArch64Subtarget::HasMTE = false
protected

Definition at line 139 of file AArch64Subtarget.h.

Referenced by hasMTE().

◆ HasNEON

bool llvm::AArch64Subtarget::HasNEON = false
protected

Definition at line 77 of file AArch64Subtarget.h.

Referenced by hasNEON().

◆ HasNV

bool llvm::AArch64Subtarget::HasNV = false
protected

Definition at line 112 of file AArch64Subtarget.h.

Referenced by hasNV().

◆ HasPA

bool llvm::AArch64Subtarget::HasPA = false
protected

Definition at line 106 of file AArch64Subtarget.h.

Referenced by hasPA().

◆ HasPAN

bool llvm::AArch64Subtarget::HasPAN = false
protected

Definition at line 91 of file AArch64Subtarget.h.

Referenced by hasPAN().

◆ HasPAN_RWV

bool llvm::AArch64Subtarget::HasPAN_RWV = false
protected

Definition at line 96 of file AArch64Subtarget.h.

Referenced by hasPAN_RWV().

◆ HasPerfMon

bool llvm::AArch64Subtarget::HasPerfMon = false
protected

Definition at line 84 of file AArch64Subtarget.h.

Referenced by hasPerfMon().

◆ HasPredRes

bool llvm::AArch64Subtarget::HasPredRes = false
protected

Definition at line 135 of file AArch64Subtarget.h.

Referenced by hasPredRes().

◆ HasPsUAO

bool llvm::AArch64Subtarget::HasPsUAO = false
protected

Definition at line 95 of file AArch64Subtarget.h.

Referenced by hasPsUAO().

◆ HasRandGen

bool llvm::AArch64Subtarget::HasRandGen = false
protected

Definition at line 138 of file AArch64Subtarget.h.

Referenced by hasRandGen().

◆ HasRAS

bool llvm::AArch64Subtarget::HasRAS = false
protected

Definition at line 82 of file AArch64Subtarget.h.

Referenced by hasRAS().

◆ HasRASv8_4

bool llvm::AArch64Subtarget::HasRASv8_4 = false
protected

Definition at line 113 of file AArch64Subtarget.h.

Referenced by hasRASv8_4().

◆ HasRCPC

bool llvm::AArch64Subtarget::HasRCPC = false
protected

Definition at line 126 of file AArch64Subtarget.h.

Referenced by hasRCPC().

◆ HasRCPC_IMMO

bool llvm::AArch64Subtarget::HasRCPC_IMMO = false
protected

Definition at line 121 of file AArch64Subtarget.h.

Referenced by hasRCPC_IMMO().

◆ HasRDM

bool llvm::AArch64Subtarget::HasRDM = false
protected

Definition at line 83 of file AArch64Subtarget.h.

Referenced by hasRDM().

◆ HasSB

bool llvm::AArch64Subtarget::HasSB = false
protected

Definition at line 134 of file AArch64Subtarget.h.

Referenced by hasSB().

◆ HasSEL2

bool llvm::AArch64Subtarget::HasSEL2 = false
protected

Definition at line 118 of file AArch64Subtarget.h.

Referenced by hasSEL2().

◆ HasSHA2

bool llvm::AArch64Subtarget::HasSHA2 = false
protected

Definition at line 102 of file AArch64Subtarget.h.

Referenced by hasSHA2().

◆ HasSHA3

bool llvm::AArch64Subtarget::HasSHA3 = false
protected

Definition at line 101 of file AArch64Subtarget.h.

Referenced by hasSHA3().

◆ HasSM4

bool llvm::AArch64Subtarget::HasSM4 = false
protected

Definition at line 100 of file AArch64Subtarget.h.

Referenced by hasSM4().

◆ HasSPE

bool llvm::AArch64Subtarget::HasSPE = false
protected

Definition at line 87 of file AArch64Subtarget.h.

Referenced by hasSPE().

◆ HasSpecRestrict

bool llvm::AArch64Subtarget::HasSpecRestrict = false
protected

Definition at line 132 of file AArch64Subtarget.h.

Referenced by hasSpecRestrict().

◆ HasSSBS

bool llvm::AArch64Subtarget::HasSSBS = false
protected

Definition at line 133 of file AArch64Subtarget.h.

Referenced by hasSSBS().

◆ HasSVE

bool llvm::AArch64Subtarget::HasSVE = false
protected

Definition at line 124 of file AArch64Subtarget.h.

Referenced by hasSVE().

◆ HasSVE2

bool llvm::AArch64Subtarget::HasSVE2 = false
protected

Definition at line 125 of file AArch64Subtarget.h.

Referenced by hasSVE2().

◆ HasSVE2AES

bool llvm::AArch64Subtarget::HasSVE2AES = false
protected

Definition at line 143 of file AArch64Subtarget.h.

Referenced by hasSVE2AES().

◆ HasSVE2BitPerm

bool llvm::AArch64Subtarget::HasSVE2BitPerm = false
protected

Definition at line 146 of file AArch64Subtarget.h.

Referenced by hasSVE2BitPerm().

◆ HasSVE2SHA3

bool llvm::AArch64Subtarget::HasSVE2SHA3 = false
protected

Definition at line 145 of file AArch64Subtarget.h.

Referenced by hasSVE2SHA3().

◆ HasSVE2SM4

bool llvm::AArch64Subtarget::HasSVE2SM4 = false
protected

Definition at line 144 of file AArch64Subtarget.h.

Referenced by hasSVE2SM4().

◆ HasTLB_RMI

bool llvm::AArch64Subtarget::HasTLB_RMI = false
protected

Definition at line 119 of file AArch64Subtarget.h.

Referenced by hasTLB_RMI().

◆ HasTME

bool llvm::AArch64Subtarget::HasTME = false
protected

Definition at line 140 of file AArch64Subtarget.h.

Referenced by hasTME().

◆ HasTRACEV8_4

bool llvm::AArch64Subtarget::HasTRACEV8_4 = false
protected

Definition at line 116 of file AArch64Subtarget.h.

Referenced by hasTRACEV8_4().

◆ HasTRBE

bool llvm::AArch64Subtarget::HasTRBE = false
protected

Definition at line 150 of file AArch64Subtarget.h.

◆ HasV8_1aOps

bool llvm::AArch64Subtarget::HasV8_1aOps = false
protected

Definition at line 70 of file AArch64Subtarget.h.

Referenced by hasV8_1aOps().

◆ HasV8_2aOps

bool llvm::AArch64Subtarget::HasV8_2aOps = false
protected

Definition at line 71 of file AArch64Subtarget.h.

Referenced by hasV8_2aOps().

◆ HasV8_3aOps

bool llvm::AArch64Subtarget::HasV8_3aOps = false
protected

Definition at line 72 of file AArch64Subtarget.h.

Referenced by hasV8_3aOps().

◆ HasV8_4aOps

bool llvm::AArch64Subtarget::HasV8_4aOps = false
protected

Definition at line 73 of file AArch64Subtarget.h.

Referenced by hasV8_4aOps().

◆ HasV8_5aOps

bool llvm::AArch64Subtarget::HasV8_5aOps = false
protected

Definition at line 74 of file AArch64Subtarget.h.

Referenced by hasV8_5aOps().

◆ HasVH

bool llvm::AArch64Subtarget::HasVH = false
protected

Definition at line 90 of file AArch64Subtarget.h.

Referenced by hasVH().

◆ HasZeroCycleRegMove

bool llvm::AArch64Subtarget::HasZeroCycleRegMove = false
protected

Definition at line 153 of file AArch64Subtarget.h.

Referenced by hasZeroCycleRegMove().

◆ HasZeroCycleZeroing

bool llvm::AArch64Subtarget::HasZeroCycleZeroing = false
protected

Definition at line 156 of file AArch64Subtarget.h.

◆ HasZeroCycleZeroingFP

bool llvm::AArch64Subtarget::HasZeroCycleZeroingFP = false
protected

Definition at line 158 of file AArch64Subtarget.h.

Referenced by hasZeroCycleZeroingFP().

◆ HasZeroCycleZeroingFPWorkaround

bool llvm::AArch64Subtarget::HasZeroCycleZeroingFPWorkaround = false
protected

Definition at line 159 of file AArch64Subtarget.h.

Referenced by hasZeroCycleZeroingFPWorkaround().

◆ HasZeroCycleZeroingGP

bool llvm::AArch64Subtarget::HasZeroCycleZeroingGP = false
protected

Definition at line 157 of file AArch64Subtarget.h.

Referenced by hasZeroCycleZeroingGP().

◆ InstrInfo

AArch64InstrInfo llvm::AArch64Subtarget::InstrInfo
protected

Definition at line 218 of file AArch64Subtarget.h.

Referenced by getInstrInfo().

◆ InstSelector

std::unique_ptr<InstructionSelector> llvm::AArch64Subtarget::InstSelector
protected

Definition at line 224 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getInstructionSelector().

◆ IsLittle

bool llvm::AArch64Subtarget::IsLittle
protected

Definition at line 212 of file AArch64Subtarget.h.

Referenced by isLittleEndian().

◆ Legalizer

std::unique_ptr<LegalizerInfo> llvm::AArch64Subtarget::Legalizer
protected

Definition at line 225 of file AArch64Subtarget.h.

◆ MaxInterleaveFactor

uint8_t llvm::AArch64Subtarget::MaxInterleaveFactor = 2
protected

Definition at line 195 of file AArch64Subtarget.h.

Referenced by getMaxInterleaveFactor().

◆ MaxJumpTableSize

unsigned llvm::AArch64Subtarget::MaxJumpTableSize = 0
protected

Definition at line 203 of file AArch64Subtarget.h.

Referenced by getMaximumJumpTableSize().

◆ MaxPrefetchIterationsAhead

unsigned llvm::AArch64Subtarget::MaxPrefetchIterationsAhead = UINT_MAX
protected

Definition at line 200 of file AArch64Subtarget.h.

Referenced by getMaxPrefetchIterationsAhead().

◆ MinPrefetchStride

uint16_t llvm::AArch64Subtarget::MinPrefetchStride = 1
protected

Definition at line 199 of file AArch64Subtarget.h.

Referenced by getMinPrefetchStride().

◆ MinVectorRegisterBitWidth

unsigned llvm::AArch64Subtarget::MinVectorRegisterBitWidth = 64
protected

Definition at line 168 of file AArch64Subtarget.h.

Referenced by getMinVectorRegisterBitWidth().

◆ Misaligned128StoreIsSlow

bool llvm::AArch64Subtarget::Misaligned128StoreIsSlow = false
protected

Definition at line 176 of file AArch64Subtarget.h.

Referenced by isMisaligned128StoreSlow().

◆ NegativeImmediates

bool llvm::AArch64Subtarget::NegativeImmediates = true
protected

Definition at line 165 of file AArch64Subtarget.h.

◆ Paired128IsSlow

bool llvm::AArch64Subtarget::Paired128IsSlow = false
protected

Definition at line 177 of file AArch64Subtarget.h.

Referenced by isPaired128Slow().

◆ PredictableSelectIsExpensive

bool llvm::AArch64Subtarget::PredictableSelectIsExpensive = false
protected

Definition at line 171 of file AArch64Subtarget.h.

Referenced by predictableSelectIsExpensive().

◆ PrefetchDistance

uint16_t llvm::AArch64Subtarget::PrefetchDistance = 0
protected

Definition at line 198 of file AArch64Subtarget.h.

Referenced by getPrefetchDistance().

◆ PrefFunctionLogAlignment

unsigned llvm::AArch64Subtarget::PrefFunctionLogAlignment = 0
protected

Definition at line 201 of file AArch64Subtarget.h.

Referenced by getPrefFunctionLogAlignment().

◆ PrefLoopLogAlignment

unsigned llvm::AArch64Subtarget::PrefLoopLogAlignment = 0
protected

Definition at line 202 of file AArch64Subtarget.h.

Referenced by getPrefLoopLogAlignment().

◆ RegBankInfo

std::unique_ptr<RegisterBankInfo> llvm::AArch64Subtarget::RegBankInfo
protected

Definition at line 226 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getRegBankInfo().

◆ ReserveXRegister

BitVector llvm::AArch64Subtarget::ReserveXRegister
protected

Definition at line 207 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget().

◆ StrictAlign

bool llvm::AArch64Subtarget::StrictAlign = false
protected

Definition at line 162 of file AArch64Subtarget.h.

Referenced by requiresStrictAlign().

◆ STRQroIsSlow

bool llvm::AArch64Subtarget::STRQroIsSlow = false
protected

Definition at line 178 of file AArch64Subtarget.h.

Referenced by isSTRQroSlow().

◆ TargetTriple

Triple llvm::AArch64Subtarget::TargetTriple
protected

TargetTriple - What processor and OS we're targeting.

Definition at line 215 of file AArch64Subtarget.h.

Referenced by getTargetTriple(), and supportsAddressTopByteIgnored().

◆ TLInfo

AArch64TargetLowering llvm::AArch64Subtarget::TLInfo
protected

Definition at line 220 of file AArch64Subtarget.h.

Referenced by getTargetLowering().

◆ TSInfo

AArch64SelectionDAGInfo llvm::AArch64Subtarget::TSInfo
protected

Definition at line 219 of file AArch64Subtarget.h.

Referenced by getSelectionDAGInfo().

◆ UseAA

bool llvm::AArch64Subtarget::UseAA = false
protected

Definition at line 170 of file AArch64Subtarget.h.

Referenced by useAA().

◆ UseAlternateSExtLoadCVTF32Pattern

bool llvm::AArch64Subtarget::UseAlternateSExtLoadCVTF32Pattern = false
protected

Definition at line 179 of file AArch64Subtarget.h.

Referenced by useAlternateSExtLoadCVTF32Pattern().

◆ UseEL1ForTP

bool llvm::AArch64Subtarget::UseEL1ForTP = false
protected

Definition at line 191 of file AArch64Subtarget.h.

Referenced by useEL1ForTP().

◆ UseEL2ForTP

bool llvm::AArch64Subtarget::UseEL2ForTP = false
protected

Definition at line 192 of file AArch64Subtarget.h.

Referenced by useEL2ForTP().

◆ UseEL3ForTP

bool llvm::AArch64Subtarget::UseEL3ForTP = false
protected

Definition at line 193 of file AArch64Subtarget.h.

Referenced by useEL3ForTP().

◆ UsePostRAScheduler

bool llvm::AArch64Subtarget::UsePostRAScheduler = false
protected

Definition at line 175 of file AArch64Subtarget.h.

Referenced by enablePostRAScheduler().

◆ UseRSqrt

bool llvm::AArch64Subtarget::UseRSqrt = false
protected

Definition at line 189 of file AArch64Subtarget.h.

Referenced by useRSqrt().

◆ VectorInsertExtractBaseCost

uint8_t llvm::AArch64Subtarget::VectorInsertExtractBaseCost = 3
protected

Definition at line 196 of file AArch64Subtarget.h.

Referenced by getVectorInsertExtractBaseCost().

◆ WideningBaseCost

unsigned llvm::AArch64Subtarget::WideningBaseCost = 0
protected

Definition at line 204 of file AArch64Subtarget.h.

Referenced by getWideningBaseCost().


The documentation for this class was generated from the following files: