LLVM 24.0.0git
BasicTTIImpl.h
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1//===- BasicTTIImpl.h -------------------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// This file provides a helper that implements much of the TTI interface in
11/// terms of the target-independent code generator and TargetLowering
12/// interfaces.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_CODEGEN_BASICTTIIMPL_H
17#define LLVM_CODEGEN_BASICTTIIMPL_H
18
19#include "llvm/ADT/APInt.h"
20#include "llvm/ADT/BitVector.h"
21#include "llvm/ADT/STLExtras.h"
35#include "llvm/IR/BasicBlock.h"
36#include "llvm/IR/Constant.h"
37#include "llvm/IR/Constants.h"
38#include "llvm/IR/DataLayout.h"
40#include "llvm/IR/InstrTypes.h"
41#include "llvm/IR/Instruction.h"
43#include "llvm/IR/Intrinsics.h"
44#include "llvm/IR/Operator.h"
45#include "llvm/IR/Type.h"
46#include "llvm/IR/Value.h"
55#include <algorithm>
56#include <cassert>
57#include <cstdint>
58#include <limits>
59#include <optional>
60#include <utility>
61
62namespace llvm {
63
64class Function;
65class GlobalValue;
66class LLVMContext;
67class ScalarEvolution;
68class SCEV;
69class TargetMachine;
70
72
73/// Base class which can be used to help build a TTI implementation.
74///
75/// This class provides as much implementation of the TTI interface as is
76/// possible using the target independent parts of the code generator.
77///
78/// In order to subclass it, your class must implement a getST() method to
79/// return the subtarget, and a getTLI() method to return the target lowering.
80/// We need these methods implemented in the derived class so that this class
81/// doesn't have to duplicate storage for them.
82template <typename T>
84private:
86 using TTI = TargetTransformInfo;
87
88 /// Helper function to access this as a T.
89 const T *thisT() const { return static_cast<const T *>(this); }
90
91 /// Estimate a cost of Broadcast as an extract and sequence of insert
92 /// operations.
94 getBroadcastShuffleOverhead(FixedVectorType *VTy,
97 // Broadcast cost is equal to the cost of extracting the zero'th element
98 // plus the cost of inserting it into every element of the result vector.
99 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
100 CostKind, 0, nullptr, nullptr);
101
102 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
103 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
104 CostKind, i, nullptr, nullptr);
105 }
106 return Cost;
107 }
108
109 /// Estimate a cost of shuffle as a sequence of extract and insert
110 /// operations.
112 getPermuteShuffleOverhead(FixedVectorType *VTy,
115 // Shuffle cost is equal to the cost of extracting element from its argument
116 // plus the cost of inserting them onto the result vector.
117
118 // e.g. <4 x float> has a mask of <0,5,2,7> i.e we need to extract from
119 // index 0 of first vector, index 1 of second vector,index 2 of first
120 // vector and finally index 3 of second vector and insert them at index
121 // <0,1,2,3> of result vector.
122 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
123 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
124 CostKind, i, nullptr, nullptr);
125 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
126 CostKind, i, nullptr, nullptr);
127 }
128 return Cost;
129 }
130
131 /// Estimate a cost of subvector extraction as a sequence of extract and
132 /// insert operations.
133 InstructionCost getExtractSubvectorOverhead(VectorType *VTy,
135 int Index,
136 FixedVectorType *SubVTy) const {
137 assert(VTy && SubVTy &&
138 "Can only extract subvectors from vectors");
139 int NumSubElts = SubVTy->getNumElements();
141 (Index + NumSubElts) <=
142 (int)cast<FixedVectorType>(VTy)->getNumElements()) &&
143 "SK_ExtractSubvector index out of range");
144
146 // Subvector extraction cost is equal to the cost of extracting element from
147 // the source type plus the cost of inserting them into the result vector
148 // type.
149 for (int i = 0; i != NumSubElts; ++i) {
150 Cost +=
151 thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
152 CostKind, i + Index, nullptr, nullptr);
153 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SubVTy,
154 CostKind, i, nullptr, nullptr);
155 }
156 return Cost;
157 }
158
159 /// Estimate a cost of subvector insertion as a sequence of extract and
160 /// insert operations.
161 InstructionCost getInsertSubvectorOverhead(VectorType *VTy,
163 int Index,
164 FixedVectorType *SubVTy) const {
165 assert(VTy && SubVTy &&
166 "Can only insert subvectors into vectors");
167 int NumSubElts = SubVTy->getNumElements();
169 (Index + NumSubElts) <=
170 (int)cast<FixedVectorType>(VTy)->getNumElements()) &&
171 "SK_InsertSubvector index out of range");
172
174 // Subvector insertion cost is equal to the cost of extracting element from
175 // the source type plus the cost of inserting them into the result vector
176 // type.
177 for (int i = 0; i != NumSubElts; ++i) {
178 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, SubVTy,
179 CostKind, i, nullptr, nullptr);
180 Cost +=
181 thisT()->getVectorInstrCost(Instruction::InsertElement, VTy, CostKind,
182 i + Index, nullptr, nullptr);
183 }
184 return Cost;
185 }
186
187 /// Local query method delegates up to T which *must* implement this!
188 const TargetSubtargetInfo *getST() const {
189 return static_cast<const T *>(this)->getST();
190 }
191
192 /// Local query method delegates up to T which *must* implement this!
193 const TargetLoweringBase *getTLI() const {
194 return static_cast<const T *>(this)->getTLI();
195 }
196
197 static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) {
198 switch (M) {
200 return ISD::UNINDEXED;
201 case TTI::MIM_PreInc:
202 return ISD::PRE_INC;
203 case TTI::MIM_PreDec:
204 return ISD::PRE_DEC;
205 case TTI::MIM_PostInc:
206 return ISD::POST_INC;
207 case TTI::MIM_PostDec:
208 return ISD::POST_DEC;
209 }
210 llvm_unreachable("Unexpected MemIndexedMode");
211 }
212
213 InstructionCost getCommonMaskedMemoryOpCost(unsigned Opcode, Type *DataTy,
214 Align Alignment,
215 bool VariableMask,
216 bool IsGatherScatter,
218 unsigned AddressSpace = 0) const {
219 // We cannot scalarize scalable vectors, so return Invalid.
220 if (isa<ScalableVectorType>(DataTy))
222
223 auto *VT = cast<FixedVectorType>(DataTy);
224 unsigned VF = VT->getNumElements();
225
226 // Assume the target does not have support for gather/scatter operations
227 // and provide a rough estimate.
228 //
229 // First, compute the cost of the individual memory operations.
230 InstructionCost AddrExtractCost =
231 IsGatherScatter ? getScalarizationOverhead(
233 PointerType::get(VT->getContext(), 0), VF),
234 /*Insert=*/false, /*Extract=*/true, CostKind)
235 : 0;
236
237 // The cost of the scalar loads/stores.
238 InstructionCost MemoryOpCost =
239 VF * thisT()->getMemoryOpCost(Opcode, VT->getElementType(), Alignment,
241
242 // Next, compute the cost of packing the result in a vector.
243 InstructionCost PackingCost =
244 getScalarizationOverhead(VT, Opcode != Instruction::Store,
245 Opcode == Instruction::Store, CostKind);
246
247 InstructionCost ConditionalCost = 0;
248 if (VariableMask) {
249 // Compute the cost of conditionally executing the memory operations with
250 // variable masks. This includes extracting the individual conditions, a
251 // branches and PHIs to combine the results.
252 // NOTE: Estimating the cost of conditionally executing the memory
253 // operations accurately is quite difficult and the current solution
254 // provides a very rough estimate only.
255 ConditionalCost =
258 /*Insert=*/false, /*Extract=*/true, CostKind) +
259 VF * (thisT()->getCFInstrCost(Instruction::CondBr, CostKind) +
260 thisT()->getCFInstrCost(Instruction::PHI, CostKind));
261 }
262
263 return AddrExtractCost + MemoryOpCost + PackingCost + ConditionalCost;
264 }
265
266 /// Checks if the provided mask \p is a splat mask, i.e. it contains only -1
267 /// or same non -1 index value and this index value contained at least twice.
268 /// So, mask <0, -1,-1, -1> is not considered splat (it is just identity),
269 /// same for <-1, 0, -1, -1> (just a slide), while <2, -1, 2, -1> is a splat
270 /// with \p Index=2.
271 static bool isSplatMask(ArrayRef<int> Mask, unsigned NumSrcElts, int &Index) {
272 // Check that the broadcast index meets at least twice.
273 bool IsCompared = false;
274 if (int SplatIdx = PoisonMaskElem;
275 all_of(enumerate(Mask), [&](const auto &P) {
276 if (P.value() == PoisonMaskElem)
277 return P.index() != Mask.size() - 1 || IsCompared;
278 if (static_cast<unsigned>(P.value()) >= NumSrcElts * 2)
279 return false;
280 if (SplatIdx == PoisonMaskElem) {
281 SplatIdx = P.value();
282 return P.index() != Mask.size() - 1;
283 }
284 IsCompared = true;
285 return SplatIdx == P.value();
286 })) {
287 Index = SplatIdx;
288 return true;
289 }
290 return false;
291 }
292
293 /// Several intrinsics that return structs (including llvm.sincos[pi] and
294 /// llvm.modf) can be lowered to a vector library call (for certain VFs). The
295 /// vector library functions correspond to the scalar calls (e.g. sincos or
296 /// modf), which unlike the intrinsic return values via output pointers. This
297 /// helper checks if a vector call exists for the given intrinsic, and returns
298 /// the cost, which includes the cost of the mask (if required), and the loads
299 /// for values returned via output pointers. \p LC is the scalar libcall and
300 /// \p CallRetElementIndex (optional) is the struct element which is mapped to
301 /// the call return value. If std::nullopt is returned, then no vector library
302 /// call is available, so the intrinsic should be assigned the default cost
303 /// (e.g. scalarization).
304 std::optional<InstructionCost> getMultipleResultIntrinsicVectorLibCallCost(
306 std::optional<unsigned> CallRetElementIndex = {}) const {
307 Type *RetTy = ICA.getReturnType();
308 // Vector variants of the intrinsic can be mapped to a vector library call.
309 if (!isa<StructType>(RetTy) ||
311 return std::nullopt;
312
313 Type *Ty = getContainedTypes(RetTy).front();
314 EVT VT = getTLI()->getValueType(DL, Ty);
315
316 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
317
318 switch (ICA.getID()) {
319 case Intrinsic::modf:
320 LC = RTLIB::getMODF(VT);
321 break;
322 case Intrinsic::sincospi:
323 LC = RTLIB::getSINCOSPI(VT);
324 break;
325 case Intrinsic::sincos:
326 LC = RTLIB::getSINCOS(VT);
327 break;
328 default:
329 return std::nullopt;
330 }
331
332 // Find associated libcall.
333 RTLIB::LibcallImpl LibcallImpl = getTLI()->getLibcallImpl(LC);
334 if (LibcallImpl == RTLIB::Unsupported)
335 return std::nullopt;
336
337 LLVMContext &Ctx = RetTy->getContext();
338
339 // Cost the call + mask.
340 auto Cost =
341 thisT()->getCallInstrCost(nullptr, RetTy, ICA.getArgTypes(), CostKind);
342
345 auto VecTy = VectorType::get(IntegerType::getInt1Ty(Ctx), VF);
346 Cost += thisT()->getShuffleCost(TargetTransformInfo::SK_Broadcast, VecTy,
347 VecTy, CostKind, {}, 0, nullptr, {});
348 }
349
350 // Lowering to a library call (with output pointers) may require us to emit
351 // reloads for the results.
352 for (auto [Idx, VectorTy] : enumerate(getContainedTypes(RetTy))) {
353 if (Idx == CallRetElementIndex)
354 continue;
355 Cost += thisT()->getMemoryOpCost(
356 Instruction::Load, VectorTy,
357 thisT()->getDataLayout().getABITypeAlign(VectorTy), 0, CostKind);
358 }
359 return Cost;
360 }
361
362 /// Filter out constant and duplicated entries in \p Ops and return a vector
363 /// containing the types from \p Tys corresponding to the remaining operands.
365 filterConstantAndDuplicatedOperands(ArrayRef<const Value *> Ops,
366 ArrayRef<Type *> Tys) {
367 SmallPtrSet<const Value *, 4> UniqueOperands;
368 SmallVector<Type *, 4> FilteredTys;
369 for (const auto &[Op, Ty] : zip_equal(Ops, Tys)) {
370 if (isa<Constant>(Op) || !UniqueOperands.insert(Op).second)
371 continue;
372 FilteredTys.push_back(Ty);
373 }
374 return FilteredTys;
375 }
376
377protected:
378 explicit BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
379 : BaseT(DL) {}
380 ~BasicTTIImplBase() override = default;
381
384
385public:
386 /// \name Scalar TTI Implementations
387 /// @{
389 unsigned AddressSpace, Align Alignment,
390 unsigned *Fast) const override {
391 EVT E = EVT::getIntegerVT(Context, BitWidth);
392 return getTLI()->allowsMisalignedMemoryAccesses(
394 }
395
396 bool areInlineCompatible(const Function *Caller,
397 const Function *Callee) const override {
398 const TargetMachine &TM = getTLI()->getTargetMachine();
399
400 const TargetSubtargetInfo *CallerSTI = TM.getSubtargetImpl(*Caller);
401 const TargetSubtargetInfo *CalleeSTI = TM.getSubtargetImpl(*Callee);
402 FeatureBitset InlineIgnoreFeatures = CallerSTI->getInlineIgnoreFeatures();
403 FeatureBitset InlineInverseFeatures = CallerSTI->getInlineInverseFeatures();
404 FeatureBitset InlineMustMatchFeatures =
405 CallerSTI->getInlineMustMatchFeatures();
406
407 FeatureBitset CallerBits =
408 (CallerSTI->getFeatureBits() ^ InlineInverseFeatures) &
409 ~InlineIgnoreFeatures;
410 FeatureBitset CalleeBits =
411 (CalleeSTI->getFeatureBits() ^ InlineInverseFeatures) &
412 ~InlineIgnoreFeatures;
413
414 if ((CallerBits & InlineMustMatchFeatures) !=
415 (CalleeBits & InlineMustMatchFeatures))
416 return false;
417
418 // Inline a callee if its target-features are a subset of the callers
419 // target-features.
420 return (CallerBits & CalleeBits) == CalleeBits;
421 }
422
423 bool hasBranchDivergence(const Function *F = nullptr) const override {
424 return false;
425 }
426
427 bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
428 return false;
429 }
430
431 bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override {
432 return true;
433 }
434
435 unsigned getFlatAddressSpace() const override {
436 // Return an invalid address space.
437 return -1;
438 }
439
441 Intrinsic::ID IID) const override {
442 return false;
443 }
444
445 bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
446 return getTLI()->getTargetMachine().isNoopAddrSpaceCast(FromAS, ToAS);
447 }
448
449 unsigned getAssumedAddrSpace(const Value *V) const override {
450 return getTLI()->getTargetMachine().getAssumedAddrSpace(V);
451 }
452
453 std::pair<const Value *, unsigned>
454 getPredicatedAddrSpace(const Value *V) const override {
455 return getTLI()->getTargetMachine().getPredicatedAddrSpace(V);
456 }
457
459 Value *NewV) const override {
460 return nullptr;
461 }
462
463 bool isLegalAddImmediate(int64_t imm) const override {
464 return getTLI()->isLegalAddImmediate(imm);
465 }
466
467 bool isLegalAddScalableImmediate(int64_t Imm) const override {
468 return getTLI()->isLegalAddScalableImmediate(Imm);
469 }
470
471 bool isLegalICmpImmediate(int64_t imm) const override {
472 return getTLI()->isLegalICmpImmediate(imm);
473 }
474
475 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
476 bool HasBaseReg, int64_t Scale, unsigned AddrSpace,
477 Instruction *I = nullptr,
478 int64_t ScalableOffset = 0) const override {
480 AM.BaseGV = BaseGV;
481 AM.BaseOffs = BaseOffset;
482 AM.HasBaseReg = HasBaseReg;
483 AM.Scale = Scale;
484 AM.ScalableOffset = ScalableOffset;
485 return getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace, I);
486 }
487
488 int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset) {
489 return getTLI()->getPreferredLargeGEPBaseOffset(MinOffset, MaxOffset);
490 }
491
492 unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy,
493 Align Alignment,
494 unsigned AddrSpace) const override {
495 auto &&IsSupportedByTarget = [this, ScalarMemTy, ScalarValTy, Alignment,
496 AddrSpace](unsigned VF) {
497 auto *SrcTy = FixedVectorType::get(ScalarMemTy, VF / 2);
498 EVT VT = getTLI()->getValueType(DL, SrcTy);
499 if (getTLI()->isOperationLegal(ISD::STORE, VT) ||
500 getTLI()->isOperationCustom(ISD::STORE, VT))
501 return true;
502
503 EVT ValVT =
504 getTLI()->getValueType(DL, FixedVectorType::get(ScalarValTy, VF / 2));
505 EVT LegalizedVT =
506 getTLI()->getTypeToTransformTo(ScalarMemTy->getContext(), VT);
507 return getTLI()->isTruncStoreLegal(LegalizedVT, ValVT, Alignment,
508 AddrSpace);
509 };
510 while (VF > 2 && IsSupportedByTarget(VF))
511 VF /= 2;
512 return VF;
513 }
514
515 bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty) const override {
516 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
517 return getTLI()->isIndexedLoadLegal(getISDIndexedMode(M), VT);
518 }
519
520 bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty) const override {
521 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
522 return getTLI()->isIndexedStoreLegal(getISDIndexedMode(M), VT);
523 }
524
526 const TTI::LSRCost &C2) const override {
528 }
529
533
537
541
543 StackOffset BaseOffset, bool HasBaseReg,
544 int64_t Scale,
545 unsigned AddrSpace) const override {
547 AM.BaseGV = BaseGV;
548 AM.BaseOffs = BaseOffset.getFixed();
549 AM.HasBaseReg = HasBaseReg;
550 AM.Scale = Scale;
551 AM.ScalableOffset = BaseOffset.getScalable();
552 if (getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace))
553 return 0;
555 }
556
557 bool isTruncateFree(Type *Ty1, Type *Ty2) const override {
558 return getTLI()->isTruncateFree(Ty1, Ty2);
559 }
560
561 bool isProfitableToHoist(Instruction *I) const override {
562 return getTLI()->isProfitableToHoist(I);
563 }
564
565 bool useAA() const override { return getST()->useAA(); }
566
567 bool isTypeLegal(Type *Ty) const override {
568 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
569 return getTLI()->isTypeLegal(VT);
570 }
571
572 unsigned getRegUsageForType(Type *Ty) const override {
573 EVT ETy = getTLI()->getValueType(DL, Ty);
574 return getTLI()->getNumRegisters(Ty->getContext(), ETy);
575 }
576
577 InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr,
580 Type *AccessType) const override {
581 return BaseT::getGEPCost(PointeeType, Ptr, Operands, CostKind, AccessType);
582 }
583
585 const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI,
586 BlockFrequencyInfo *BFI) const override {
587 /// Try to find the estimated number of clusters. Note that the number of
588 /// clusters identified in this function could be different from the actual
589 /// numbers found in lowering. This function ignore switches that are
590 /// lowered with a mix of jump table / bit test / BTree. This function was
591 /// initially intended to be used when estimating the cost of switch in
592 /// inline cost heuristic, but it's a generic cost model to be used in other
593 /// places (e.g., in loop unrolling).
594 unsigned N = SI.getNumCases();
595 const TargetLoweringBase *TLI = getTLI();
596 const DataLayout &DL = this->getDataLayout();
597
598 JumpTableSize = 0;
599 bool IsJTAllowed = TLI->areJTsAllowed(SI.getParent()->getParent());
600
601 // Early exit if both a jump table and bit test are not allowed.
602 if (N < 1 || (!IsJTAllowed && DL.getIndexSizeInBits(0u) < N))
603 return N;
604
605 APInt MaxCaseVal = SI.case_begin()->getCaseValue()->getValue();
606 APInt MinCaseVal = MaxCaseVal;
607 for (auto CI : SI.cases()) {
608 const APInt &CaseVal = CI.getCaseValue()->getValue();
609 if (CaseVal.sgt(MaxCaseVal))
610 MaxCaseVal = CaseVal;
611 if (CaseVal.slt(MinCaseVal))
612 MinCaseVal = CaseVal;
613 }
614
615 // Check if suitable for a bit test
616 if (N <= DL.getIndexSizeInBits(0u)) {
618 for (auto I : SI.cases()) {
619 const BasicBlock *BB = I.getCaseSuccessor();
620 ++DestMap[BB];
621 }
622
623 if (TLI->isSuitableForBitTests(DestMap, MinCaseVal, MaxCaseVal, DL))
624 return 1;
625 }
626
627 // Check if suitable for a jump table.
628 if (IsJTAllowed) {
629 if (N < 2 || N < TLI->getMinimumJumpTableEntries())
630 return N;
632 (MaxCaseVal - MinCaseVal)
633 .getLimitedValue(std::numeric_limits<uint64_t>::max() - 1) + 1;
634 // Check whether a range of clusters is dense enough for a jump table
635 if (TLI->isSuitableForJumpTable(&SI, N, Range, PSI, BFI)) {
636 JumpTableSize = Range;
637 return 1;
638 }
639 }
640 return N;
641 }
642
643 bool shouldBuildLookupTables() const override {
644 const TargetLoweringBase *TLI = getTLI();
645 return TLI->isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
646 TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
647 }
648
649 bool shouldBuildRelLookupTables() const override {
650 const TargetMachine &TM = getTLI()->getTargetMachine();
651 // If non-PIC mode, do not generate a relative lookup table.
652 if (!TM.isPositionIndependent())
653 return false;
654
655 /// Relative lookup table entries consist of 32-bit offsets.
656 /// Do not generate relative lookup tables for large code models
657 /// in 64-bit achitectures where 32-bit offsets might not be enough.
658 if (TM.getCodeModel() == CodeModel::Medium ||
660 return false;
661
662 const Triple &TargetTriple = TM.getTargetTriple();
663 if (!TargetTriple.isArch64Bit())
664 return false;
665
666 // TODO: Triggers issues on aarch64 on darwin, so temporarily disable it
667 // there.
668 if (TargetTriple.getArch() == Triple::aarch64 && TargetTriple.isOSDarwin())
669 return false;
670
671 return true;
672 }
673
674 bool haveFastSqrt(Type *Ty) const override {
675 const TargetLoweringBase *TLI = getTLI();
676 EVT VT = TLI->getValueType(DL, Ty);
677 return TLI->isTypeLegal(VT) &&
679 }
680
681 bool haveFastClmul(IntegerType *Ty) const override {
682 // FIXME: clmul should really be Promote for any bitwidth under the largest
683 // legal bitwidth for clmul. Using IndexTy instead of Ty is a hack to get
684 // around that shortcoming.
685 const DataLayout &DL = thisT()->DL;
686 IntegerType *IndexTy =
687 DL.getIndexType(Ty->getContext(), DL.getAllocaAddrSpace());
688 if (Ty->getBitWidth() > IndexTy->getBitWidth())
689 return false;
690
691 const TargetLoweringBase *TLI = getTLI();
692 EVT VT = TLI->getValueType(DL, IndexTy);
693 return TLI->isOperationLegalOrCustom(ISD::CLMUL, VT);
694 }
695
696 bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const override { return true; }
697
698 InstructionCost getFPOpCost(Type *Ty) const override {
699 // Check whether FADD is available, as a proxy for floating-point in
700 // general.
701 const TargetLoweringBase *TLI = getTLI();
702 EVT VT = TLI->getValueType(DL, Ty);
706 }
707
709 const Function &Fn) const override {
710 switch (Inst.getOpcode()) {
711 default:
712 break;
713 case Instruction::SDiv:
714 case Instruction::SRem:
715 case Instruction::UDiv:
716 case Instruction::URem: {
717 if (!isa<ConstantInt>(Inst.getOperand(1)))
718 return false;
719 EVT VT = getTLI()->getValueType(DL, Inst.getType());
720 return !getTLI()->isIntDivCheap(VT, Fn.getAttributes());
721 }
722 };
723
724 return false;
725 }
726
727 unsigned getInliningThresholdMultiplier() const override { return 1; }
728 unsigned adjustInliningThreshold(const CallBase *CB) const override {
729 return 0;
730 }
731 unsigned getCallerAllocaCost(const CallBase *CB,
732 const AllocaInst *AI) const override {
733 return 0;
734 }
735
736 int getInlinerVectorBonusPercent() const override { return 150; }
737
740 OptimizationRemarkEmitter *ORE) const override {
741 // This unrolling functionality is target independent, but to provide some
742 // motivation for its intended use, for x86:
743
744 // According to the Intel 64 and IA-32 Architectures Optimization Reference
745 // Manual, Intel Core models and later have a loop stream detector (and
746 // associated uop queue) that can benefit from partial unrolling.
747 // The relevant requirements are:
748 // - The loop must have no more than 4 (8 for Nehalem and later) branches
749 // taken, and none of them may be calls.
750 // - The loop can have no more than 18 (28 for Nehalem and later) uops.
751
752 // According to the Software Optimization Guide for AMD Family 15h
753 // Processors, models 30h-4fh (Steamroller and later) have a loop predictor
754 // and loop buffer which can benefit from partial unrolling.
755 // The relevant requirements are:
756 // - The loop must have fewer than 16 branches
757 // - The loop must have less than 40 uops in all executed loop branches
758
759 // The number of taken branches in a loop is hard to estimate here, and
760 // benchmarking has revealed that it is better not to be conservative when
761 // estimating the branch count. As a result, we'll ignore the branch limits
762 // until someone finds a case where it matters in practice.
763
764 unsigned MaxOps;
765 const TargetSubtargetInfo *ST = getST();
766 if (PartialUnrollingThreshold.getNumOccurrences() > 0)
768 else if (ST->getSchedModel().LoopMicroOpBufferSize > 0)
769 MaxOps = ST->getSchedModel().LoopMicroOpBufferSize;
770 else
771 return;
772
773 // Scan the loop: don't unroll loops with calls.
774 for (BasicBlock *BB : L->blocks()) {
775 for (Instruction &I : *BB) {
776 if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
777 if (const Function *F = cast<CallBase>(I).getCalledFunction()) {
778 if (!thisT()->isLoweredToCall(F))
779 continue;
780 }
781
782 if (ORE) {
783 ORE->emit([&]() {
784 return OptimizationRemark("TTI", "DontUnroll", L->getStartLoc(),
785 L->getHeader())
786 << "advising against unrolling the loop because it "
787 "contains a "
788 << ore::NV("Call", &I);
789 });
790 }
791 return;
792 }
793 }
794 }
795
796 // Enable runtime and partial unrolling up to the specified size.
797 // Enable using trip count upper bound to unroll loops.
798 UP.Partial = UP.Runtime = UP.UpperBound = true;
799 UP.PartialThreshold = MaxOps;
800
801 // Avoid unrolling when optimizing for size.
802 UP.OptSizeThreshold = 0;
804
805 // Set number of instructions optimized when "back edge"
806 // becomes "fall through" to default value of 2.
807 UP.BEInsns = 2;
808 }
809
811 TTI::PeelingPreferences &PP) const override {
812 PP.PeelCount = 0;
813 PP.AllowPeeling = true;
814 PP.AllowLoopNestsPeeling = false;
815 PP.PeelProfiledIterations = true;
816 }
817
820 HardwareLoopInfo &HWLoopInfo) const override {
821 return BaseT::isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
822 }
823
824 unsigned getEpilogueVectorizationMinVF() const override {
826 }
827
831
835
836 std::optional<Instruction *>
839 }
840
841 std::optional<Value *>
843 APInt DemandedMask, KnownBits &Known,
844 bool &KnownBitsComputed) const override {
845 return BaseT::simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
846 KnownBitsComputed);
847 }
848
850 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
851 APInt &UndefElts2, APInt &UndefElts3,
852 std::function<void(Instruction *, unsigned, APInt, APInt &)>
853 SimplifyAndSetOp) const override {
855 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
856 SimplifyAndSetOp);
857 }
858
860 return getST()->getMispredictionPenalty();
861 }
862
863 std::optional<unsigned>
865 return std::optional<unsigned>(
866 getST()->getCacheSize(static_cast<unsigned>(Level)));
867 }
868
869 std::optional<unsigned>
871 std::optional<unsigned> TargetResult =
872 getST()->getCacheAssociativity(static_cast<unsigned>(Level));
873
874 if (TargetResult)
875 return TargetResult;
876
877 return BaseT::getCacheAssociativity(Level);
878 }
879
880 unsigned getCacheLineSize() const override {
881 return getST()->getCacheLineSize();
882 }
883
884 unsigned getPrefetchDistance() const override {
885 return getST()->getPrefetchDistance();
886 }
887
888 unsigned getMinPrefetchStride(unsigned NumMemAccesses,
889 unsigned NumStridedMemAccesses,
890 unsigned NumPrefetches,
891 bool HasCall) const override {
892 return getST()->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
893 NumPrefetches, HasCall);
894 }
895
896 unsigned getMaxPrefetchIterationsAhead() const override {
897 return getST()->getMaxPrefetchIterationsAhead();
898 }
899
900 bool enableWritePrefetching() const override {
901 return getST()->enableWritePrefetching();
902 }
903
904 bool shouldPrefetchAddressSpace(unsigned AS) const override {
905 return getST()->shouldPrefetchAddressSpace(AS);
906 }
907
908 /// @}
909
910 /// \name Vector TTI Implementations
911 /// @{
912
917
918 std::optional<unsigned> getVScaleForTuning() const override {
919 return std::nullopt;
920 }
921
922 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
923 /// are set if the demanded result elements need to be inserted and/or
924 /// extracted from vectors.
926 getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts,
927 bool Insert, bool Extract,
929 bool ForPoisonSrc = true, ArrayRef<Value *> VL = {},
931 TTI::VectorInstrContext::None) const override {
932 /// FIXME: a bitfield is not a reasonable abstraction for talking about
933 /// which elements are needed from a scalable vector
934 if (isa<ScalableVectorType>(InTy))
936 auto *Ty = cast<FixedVectorType>(InTy);
937
938 assert(DemandedElts.getBitWidth() == Ty->getNumElements() &&
939 (VL.empty() || VL.size() == Ty->getNumElements()) &&
940 "Vector size mismatch");
941
943
944 for (int i = 0, e = Ty->getNumElements(); i < e; ++i) {
945 if (!DemandedElts[i])
946 continue;
947 if (Insert) {
948 Value *InsertedVal = VL.empty() ? nullptr : VL[i];
949 Cost +=
950 thisT()->getVectorInstrCost(Instruction::InsertElement, Ty,
951 CostKind, i, nullptr, InsertedVal, VIC);
952 }
953 if (Extract)
954 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
955 CostKind, i, nullptr, nullptr, VIC);
956 }
957
958 return Cost;
959 }
960
961 bool
963 unsigned ScalarOpdIdx) const override {
964 return false;
965 }
966
968 int OpdIdx) const override {
969 return OpdIdx == -1;
970 }
971
972 bool
974 int RetIdx) const override {
975 return RetIdx == 0;
976 }
977
978 /// Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
980 VectorType *InTy, bool Insert, bool Extract, TTI::TargetCostKind CostKind,
981 bool ForPoisonSrc = true, ArrayRef<Value *> VL = {},
983 if (isa<ScalableVectorType>(InTy))
985 auto *Ty = cast<FixedVectorType>(InTy);
986
987 APInt DemandedElts = APInt::getAllOnes(Ty->getNumElements());
988 // Use CRTP to allow target overrides
989 return thisT()->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
990 CostKind, ForPoisonSrc, VL, VIC);
991 }
992
993 /// Estimate the overhead of scalarizing an instruction's
994 /// operands. The (potentially vector) types to use for each of
995 /// argument are passes via Tys.
999 TTI::VectorInstrContext::None) const override {
1001 for (Type *Ty : Tys) {
1002 // Disregard things like metadata arguments.
1003 if (!Ty->isIntOrIntVectorTy() && !Ty->isFPOrFPVectorTy() &&
1004 !Ty->isPtrOrPtrVectorTy())
1005 continue;
1006
1007 if (auto *VecTy = dyn_cast<VectorType>(Ty))
1008 Cost += getScalarizationOverhead(VecTy, /*Insert*/ false,
1009 /*Extract*/ true, CostKind,
1010 /*ForPoisonSrc=*/true, {}, VIC);
1011 }
1012
1013 return Cost;
1014 }
1015
1016 /// Estimate the overhead of scalarizing the inputs and outputs of an
1017 /// instruction, with return type RetTy and arguments Args of type Tys. If
1018 /// Args are unknown (empty), then the cost associated with one argument is
1019 /// added as a heuristic.
1022 ArrayRef<Type *> Tys,
1025 RetTy, /*Insert*/ true, /*Extract*/ false, CostKind);
1026 if (!Args.empty())
1028 filterConstantAndDuplicatedOperands(Args, Tys), CostKind);
1029 else
1030 // When no information on arguments is provided, we add the cost
1031 // associated with one argument as a heuristic.
1032 Cost += getScalarizationOverhead(RetTy, /*Insert*/ false,
1033 /*Extract*/ true, CostKind);
1034
1035 return Cost;
1036 }
1037
1038 /// Estimate the cost of type-legalization and the legalized type.
1039 std::pair<InstructionCost, MVT> getTypeLegalizationCost(Type *Ty) const {
1040 auto [It, Inserted] = TypeLegalizationCostCache.try_emplace(Ty);
1041 if (Inserted)
1042 It->second = computeTypeLegalizationCost(Ty);
1043 return It->second;
1044 }
1045
1046private:
1047 std::pair<InstructionCost, MVT> computeTypeLegalizationCost(Type *Ty) const {
1048 LLVMContext &C = Ty->getContext();
1049 EVT MTy = getTLI()->getValueType(DL, Ty);
1050
1052 // We keep legalizing the type until we find a legal kind. We assume that
1053 // the only operation that costs anything is the split. After splitting
1054 // we need to handle two types.
1055 while (true) {
1057
1059 // Ensure we return a sensible simple VT here, since many callers of
1060 // this function require it.
1061 MVT VT = MTy.isSimple() ? MTy.getSimpleVT() : MVT::i64;
1062 return std::make_pair(InstructionCost::getInvalid(), VT);
1063 }
1064
1065 if (LK.first == TargetLoweringBase::TypeLegal)
1066 return std::make_pair(Cost, MTy.getSimpleVT());
1067
1068 if (LK.first == TargetLoweringBase::TypeSplitVector ||
1070 Cost *= 2;
1071
1072 // Do not loop with f128 type.
1073 if (MTy == LK.second)
1074 return std::make_pair(Cost, MTy.getSimpleVT());
1075
1076 // Keep legalizing the type.
1077 MTy = LK.second;
1078 }
1079 }
1080
1081 /// Memoizes type legalization cost. The mapping does not depend on the IR, so
1082 /// entries stay valid for the lifetime of this object.
1083 mutable DenseMap<Type *, std::pair<InstructionCost, MVT>>
1084 TypeLegalizationCostCache;
1085
1086public:
1088 bool HasUnorderedReductions) const override {
1089 return 1;
1090 }
1091
1093 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
1096 ArrayRef<const Value *> Args = {},
1097 const Instruction *CxtI = nullptr) const override {
1098 // Check if any of the operands are vector operands.
1099 const TargetLoweringBase *TLI = getTLI();
1100 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1101 assert(ISD && "Invalid opcode");
1102
1103 // TODO: Handle more cost kinds.
1105 return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind,
1106 Opd1Info, Opd2Info,
1107 Args, CxtI);
1108
1109 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Ty);
1110
1111 bool IsFloat = Ty->isFPOrFPVectorTy();
1112 // Assume that floating point arithmetic operations cost twice as much as
1113 // integer operations.
1114 InstructionCost OpCost = (IsFloat ? 2 : 1);
1115
1116 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
1117 // The operation is legal. Assume it costs 1.
1118 // TODO: Once we have extract/insert subvector cost we need to use them.
1119 return LT.first * OpCost;
1120 }
1121
1122 if (!TLI->isOperationExpand(ISD, LT.second)) {
1123 // If the operation is custom lowered, then assume that the code is twice
1124 // as expensive.
1125 return LT.first * 2 * OpCost;
1126 }
1127
1128 // An 'Expand' of URem and SRem is special because it may default
1129 // to expanding the operation into a sequence of sub-operations
1130 // i.e. X % Y -> X-(X/Y)*Y.
1131 if (ISD == ISD::UREM || ISD == ISD::SREM) {
1132 bool IsSigned = ISD == ISD::SREM;
1133 if (TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIVREM : ISD::UDIVREM,
1134 LT.second) ||
1135 TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIV : ISD::UDIV,
1136 LT.second)) {
1137 unsigned DivOpc = IsSigned ? Instruction::SDiv : Instruction::UDiv;
1138 InstructionCost DivCost = thisT()->getArithmeticInstrCost(
1139 DivOpc, Ty, CostKind, Opd1Info, Opd2Info);
1140 InstructionCost MulCost =
1141 thisT()->getArithmeticInstrCost(Instruction::Mul, Ty, CostKind);
1142 InstructionCost SubCost =
1143 thisT()->getArithmeticInstrCost(Instruction::Sub, Ty, CostKind);
1144 return DivCost + MulCost + SubCost;
1145 }
1146 }
1147
1148 // We cannot scalarize scalable vectors, so return Invalid.
1151
1152 // Else, assume that we need to scalarize this op.
1153 // TODO: If one of the types get legalized by splitting, handle this
1154 // similarly to what getCastInstrCost() does.
1155 if (auto *VTy = dyn_cast<FixedVectorType>(Ty)) {
1156 InstructionCost Cost = thisT()->getArithmeticInstrCost(
1157 Opcode, VTy->getScalarType(), CostKind, Opd1Info, Opd2Info,
1158 Args, CxtI);
1159 // Return the cost of multiple scalar invocation plus the cost of
1160 // inserting and extracting the values.
1161 SmallVector<Type *> Tys(Args.size(), Ty);
1162 return getScalarizationOverhead(VTy, Args, Tys, CostKind) +
1163 VTy->getNumElements() * Cost;
1164 }
1165
1166 // We don't know anything about this scalar instruction.
1167 return OpCost;
1168 }
1169
1171 ArrayRef<int> Mask,
1172 VectorType *SrcTy, int &Index,
1173 VectorType *&SubTy) const {
1174 if (Mask.empty())
1175 return Kind;
1176 int NumDstElts = Mask.size();
1177 int NumSrcElts = SrcTy->getElementCount().getKnownMinValue();
1178 switch (Kind) {
1180 if (ShuffleVectorInst::isReverseMask(Mask, NumSrcElts))
1181 return TTI::SK_Reverse;
1182 if (ShuffleVectorInst::isZeroEltSplatMask(Mask, NumSrcElts))
1183 return TTI::SK_Broadcast;
1184 if (isSplatMask(Mask, NumSrcElts, Index))
1185 return TTI::SK_Broadcast;
1186 if (ShuffleVectorInst::isExtractSubvectorMask(Mask, NumSrcElts, Index) &&
1187 (Index + NumDstElts) <= NumSrcElts) {
1188 SubTy = FixedVectorType::get(SrcTy->getElementType(), NumDstElts);
1190 }
1191 break;
1192 }
1193 case TTI::SK_PermuteTwoSrc: {
1194 if (all_of(Mask, [NumSrcElts](int M) { return M < NumSrcElts; }))
1196 Index, SubTy);
1197 int NumSubElts;
1198 if (NumDstElts > 2 && ShuffleVectorInst::isInsertSubvectorMask(
1199 Mask, NumSrcElts, NumSubElts, Index)) {
1200 if (Index + NumSubElts > NumSrcElts)
1201 return Kind;
1202 SubTy = FixedVectorType::get(SrcTy->getElementType(), NumSubElts);
1204 }
1205 if (ShuffleVectorInst::isSelectMask(Mask, NumSrcElts))
1206 return TTI::SK_Select;
1207 if (ShuffleVectorInst::isTransposeMask(Mask, NumSrcElts))
1208 return TTI::SK_Transpose;
1209 if (ShuffleVectorInst::isSpliceMask(Mask, NumSrcElts, Index))
1210 return TTI::SK_Splice;
1211 break;
1212 }
1213 case TTI::SK_Select:
1214 case TTI::SK_Reverse:
1215 case TTI::SK_Broadcast:
1216 case TTI::SK_Transpose:
1219 case TTI::SK_Splice:
1220 break;
1221 }
1222 return Kind;
1223 }
1224
1228 VectorType *SubTp, ArrayRef<const Value *> Args = {},
1229 const Instruction *CxtI = nullptr) const override {
1230 switch (improveShuffleKindFromMask(Kind, Mask, SrcTy, Index, SubTp)) {
1231 case TTI::SK_Broadcast:
1232 if (auto *FVT = dyn_cast<FixedVectorType>(SrcTy))
1233 return getBroadcastShuffleOverhead(FVT, CostKind);
1235 case TTI::SK_Select:
1236 case TTI::SK_Splice:
1237 case TTI::SK_Reverse:
1238 case TTI::SK_Transpose:
1241 if (auto *FVT = dyn_cast<FixedVectorType>(SrcTy))
1242 return getPermuteShuffleOverhead(FVT, CostKind);
1245 return getExtractSubvectorOverhead(SrcTy, CostKind, Index,
1246 cast<FixedVectorType>(SubTp));
1248 return getInsertSubvectorOverhead(DstTy, CostKind, Index,
1249 cast<FixedVectorType>(SubTp));
1250 }
1251 llvm_unreachable("Unknown TTI::ShuffleKind");
1252 }
1253
1255 getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
1257 const Instruction *I = nullptr) const override {
1258 if (BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I) == 0)
1259 return 0;
1260
1261 const TargetLoweringBase *TLI = getTLI();
1262 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1263 assert(ISD && "Invalid opcode");
1264 std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Src);
1265 std::pair<InstructionCost, MVT> DstLT = getTypeLegalizationCost(Dst);
1266
1267 TypeSize SrcSize = SrcLT.second.getSizeInBits();
1268 TypeSize DstSize = DstLT.second.getSizeInBits();
1269 bool IntOrPtrSrc = Src->isIntegerTy() || Src->isPointerTy();
1270 bool IntOrPtrDst = Dst->isIntegerTy() || Dst->isPointerTy();
1271
1272 switch (Opcode) {
1273 default:
1274 break;
1275 case Instruction::Trunc:
1276 // Check for NOOP conversions.
1277 if (TLI->isTruncateFree(SrcLT.second, DstLT.second))
1278 return 0;
1279 [[fallthrough]];
1280 case Instruction::BitCast:
1281 // Bitcast between types that are legalized to the same type are free and
1282 // assume int to/from ptr of the same size is also free.
1283 if (SrcLT.first == DstLT.first && IntOrPtrSrc == IntOrPtrDst &&
1284 SrcSize == DstSize)
1285 return 0;
1286 break;
1287 case Instruction::FPExt:
1288 if (I && getTLI()->isExtFree(I))
1289 return 0;
1290 break;
1291 case Instruction::ZExt:
1292 if (TLI->isZExtFree(SrcLT.second, DstLT.second))
1293 return 0;
1294 [[fallthrough]];
1295 case Instruction::SExt:
1296 if (I && getTLI()->isExtFree(I))
1297 return 0;
1298
1299 // If this is a zext/sext of a load, return 0 if the corresponding
1300 // extending load exists on target and the result type is legal.
1301 if (CCH == TTI::CastContextHint::Normal) {
1302 EVT ExtVT = EVT::getEVT(Dst);
1303 EVT LoadVT = EVT::getEVT(Src);
1304 unsigned LType =
1305 Opcode == Instruction::ZExt ? ISD::ZEXTLOAD : ISD::SEXTLOAD;
1306 if (I) {
1307 if (auto *LI = dyn_cast<LoadInst>(I->getOperand(0))) {
1308 if (DstLT.first == SrcLT.first &&
1309 TLI->isLoadLegal(ExtVT, LoadVT, LI->getAlign(),
1310 LI->getPointerAddressSpace(), LType, false))
1311 return 0;
1312 } else if (auto *II = dyn_cast<IntrinsicInst>(I->getOperand(0))) {
1313 switch (II->getIntrinsicID()) {
1314 case Intrinsic::masked_load: {
1315 Type *PtrType = II->getArgOperand(0)->getType();
1316 assert(PtrType->isPointerTy());
1317
1318 if (DstLT.first == SrcLT.first &&
1319 TLI->isLoadLegal(
1320 ExtVT, LoadVT, II->getParamAlign(0).valueOrOne(),
1321 PtrType->getPointerAddressSpace(), LType, false))
1322 return 0;
1323
1324 break;
1325 }
1326 default:
1327 break;
1328 }
1329 }
1330 }
1331 }
1332 break;
1333 case Instruction::AddrSpaceCast:
1334 if (TLI->isFreeAddrSpaceCast(Src->getPointerAddressSpace(),
1335 Dst->getPointerAddressSpace()))
1336 return 0;
1337 break;
1338 }
1339
1340 auto *SrcVTy = dyn_cast<VectorType>(Src);
1341 auto *DstVTy = dyn_cast<VectorType>(Dst);
1342
1343 // If the cast is marked as legal (or promote) then assume low cost.
1344 if (SrcLT.first == DstLT.first &&
1345 TLI->isOperationLegalOrPromote(ISD, DstLT.second))
1346 return SrcLT.first;
1347
1348 // Handle scalar conversions.
1349 if (!SrcVTy && !DstVTy) {
1350 // Just check the op cost. If the operation is legal then assume it costs
1351 // 1.
1352 if (!TLI->isOperationExpand(ISD, DstLT.second))
1353 return 1;
1354
1355 // Assume that illegal scalar instruction are expensive.
1356 return 4;
1357 }
1358
1359 // Check vector-to-vector casts.
1360 if (DstVTy && SrcVTy) {
1361 // If the cast is between same-sized registers, then the check is simple.
1362 if (SrcLT.first == DstLT.first && SrcSize == DstSize) {
1363
1364 // Assume that Zext is done using AND.
1365 if (Opcode == Instruction::ZExt)
1366 return SrcLT.first;
1367
1368 // Assume that sext is done using SHL and SRA.
1369 if (Opcode == Instruction::SExt)
1370 return SrcLT.first * 2;
1371
1372 // Just check the op cost. If the operation is legal then assume it
1373 // costs
1374 // 1 and multiply by the type-legalization overhead.
1375 if (!TLI->isOperationExpand(ISD, DstLT.second))
1376 return SrcLT.first * 1;
1377 }
1378
1379 // If we are legalizing by splitting, query the concrete TTI for the cost
1380 // of casting the original vector twice. We also need to factor in the
1381 // cost of the split itself. Count that as 1, to be consistent with
1382 // getTypeLegalizationCost().
1383 bool SplitSrc =
1384 TLI->getTypeAction(Src->getContext(), TLI->getValueType(DL, Src)) ==
1386 bool SplitDst =
1387 TLI->getTypeAction(Dst->getContext(), TLI->getValueType(DL, Dst)) ==
1389 if ((SplitSrc || SplitDst) && SrcVTy->getElementCount().isKnownEven() &&
1390 DstVTy->getElementCount().isKnownEven()) {
1391 Type *SplitDstTy = VectorType::getHalfElementsVectorType(DstVTy);
1392 Type *SplitSrcTy = VectorType::getHalfElementsVectorType(SrcVTy);
1393 const T *TTI = thisT();
1394 // If both types need to be split then the split is free.
1395 InstructionCost SplitCost =
1396 (!SplitSrc || !SplitDst) ? TTI->getVectorSplitCost() : 0;
1397 return SplitCost +
1398 (2 * TTI->getCastInstrCost(Opcode, SplitDstTy, SplitSrcTy, CCH,
1399 CostKind, I));
1400 }
1401
1402 // Scalarization cost is Invalid, can't assume any num elements.
1403 if (isa<ScalableVectorType>(DstVTy))
1405
1406 // In other cases where the source or destination are illegal, assume
1407 // the operation will get scalarized.
1408 unsigned Num = cast<FixedVectorType>(DstVTy)->getNumElements();
1409 InstructionCost Cost = thisT()->getCastInstrCost(
1410 Opcode, Dst->getScalarType(), Src->getScalarType(), CCH, CostKind, I);
1411
1412 // Return the cost of multiple scalar invocation plus the cost of
1413 // inserting and extracting the values.
1414 return getScalarizationOverhead(DstVTy, /*Insert*/ true, /*Extract*/ true,
1415 CostKind) +
1416 Num * Cost;
1417 }
1418
1419 // We already handled vector-to-vector and scalar-to-scalar conversions.
1420 // This
1421 // is where we handle bitcast between vectors and scalars. We need to assume
1422 // that the conversion is scalarized in one way or another.
1423 if (Opcode == Instruction::BitCast) {
1424 // Illegal bitcasts are done by storing and loading from a stack slot.
1425 return (SrcVTy ? getScalarizationOverhead(SrcVTy, /*Insert*/ false,
1426 /*Extract*/ true, CostKind)
1427 : 0) +
1428 (DstVTy ? getScalarizationOverhead(DstVTy, /*Insert*/ true,
1429 /*Extract*/ false, CostKind)
1430 : 0);
1431 }
1432
1433 llvm_unreachable("Unhandled cast");
1434 }
1435
1437 getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy,
1438 unsigned Index,
1439 TTI::TargetCostKind CostKind) const override {
1440 return thisT()->getVectorInstrCost(Instruction::ExtractElement, VecTy,
1441 CostKind, Index, nullptr, nullptr) +
1442 thisT()->getCastInstrCost(Opcode, Dst, VecTy->getElementType(),
1444 }
1445
1448 const Instruction *I = nullptr) const override {
1449 return BaseT::getCFInstrCost(Opcode, CostKind, I);
1450 }
1451
1453 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
1457 const Instruction *I = nullptr) const override {
1458 const TargetLoweringBase *TLI = getTLI();
1459 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1460 assert(ISD && "Invalid opcode");
1461
1462 if (getTLI()->getValueType(DL, ValTy, true) == MVT::Other)
1463 return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind,
1464 Op1Info, Op2Info, I);
1465
1466 // Selects on vectors are actually vector selects.
1467 if (ISD == ISD::SELECT) {
1468 assert(CondTy && "CondTy must exist");
1469 if (CondTy->isVectorTy())
1470 ISD = ISD::VSELECT;
1471 }
1472 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(ValTy);
1473
1474 if (!(ValTy->isVectorTy() && !LT.second.isVector()) &&
1475 !TLI->isOperationExpand(ISD, LT.second)) {
1476 // The operation is legal. Assume it costs 1. Multiply
1477 // by the type-legalization overhead.
1478 return LT.first * 1;
1479 }
1480
1481 // Otherwise, assume that the cast is scalarized.
1482 // TODO: If one of the types get legalized by splitting, handle this
1483 // similarly to what getCastInstrCost() does.
1484 if (auto *ValVTy = dyn_cast<VectorType>(ValTy)) {
1485 if (isa<ScalableVectorType>(ValTy))
1487
1488 unsigned Num = cast<FixedVectorType>(ValVTy)->getNumElements();
1489 InstructionCost Cost = thisT()->getCmpSelInstrCost(
1490 Opcode, ValVTy->getScalarType(), CondTy->getScalarType(), VecPred,
1491 CostKind, Op1Info, Op2Info, I);
1492
1493 // Return the cost of multiple scalar invocation plus the cost of
1494 // inserting and extracting the values.
1495 return getScalarizationOverhead(ValVTy, /*Insert*/ true,
1496 /*Extract*/ false, CostKind) +
1497 Num * Cost;
1498 }
1499
1500 // Unknown scalar opcode.
1501 return 1;
1502 }
1503
1506 unsigned Index, const Value *Op0, const Value *Op1,
1508 TTI::VectorInstrContext::None) const override {
1509 return getRegUsageForType(Val->getScalarType());
1510 }
1511
1512 /// \param ScalarUserAndIdx encodes the information about extracts from a
1513 /// vector with 'Scalar' being the value being extracted,'User' being the user
1514 /// of the extract(nullptr if user is not known before vectorization) and
1515 /// 'Idx' being the extract lane.
1517 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1518 Value *Scalar,
1519 ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1521 TTI::VectorInstrContext::None) const override {
1522 return getVectorInstrCost(Opcode, Val, CostKind, Index, nullptr, nullptr,
1523 VIC);
1524 }
1525
1528 TTI::TargetCostKind CostKind, unsigned Index,
1530 TTI::VectorInstrContext::None) const override {
1531 Value *Op0 = nullptr;
1532 Value *Op1 = nullptr;
1533 if (auto *IE = dyn_cast<InsertElementInst>(&I)) {
1534 Op0 = IE->getOperand(0);
1535 Op1 = IE->getOperand(1);
1536 }
1537 // If VIC is None, compute it from the instruction
1540 return thisT()->getVectorInstrCost(I.getOpcode(), Val, CostKind, Index, Op0,
1541 Op1, VIC);
1542 }
1543
1547 unsigned Index) const override {
1548 unsigned NewIndex = -1;
1549 if (auto *FVTy = dyn_cast<FixedVectorType>(Val)) {
1550 assert(Index < FVTy->getNumElements() &&
1551 "Unexpected index from end of vector");
1552 NewIndex = FVTy->getNumElements() - 1 - Index;
1553 }
1554 return thisT()->getVectorInstrCost(Opcode, Val, CostKind, NewIndex, nullptr,
1555 nullptr);
1556 }
1557
1559 getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF,
1560 const APInt &DemandedDstElts,
1561 TTI::TargetCostKind CostKind) const override {
1562 assert(DemandedDstElts.getBitWidth() == (unsigned)VF * ReplicationFactor &&
1563 "Unexpected size of DemandedDstElts.");
1564
1566
1567 auto *SrcVT = FixedVectorType::get(EltTy, VF);
1568 auto *ReplicatedVT = FixedVectorType::get(EltTy, VF * ReplicationFactor);
1569
1570 // The Mask shuffling cost is extract all the elements of the Mask
1571 // and insert each of them Factor times into the wide vector:
1572 //
1573 // E.g. an interleaved group with factor 3:
1574 // %mask = icmp ult <8 x i32> %vec1, %vec2
1575 // %interleaved.mask = shufflevector <8 x i1> %mask, <8 x i1> undef,
1576 // <24 x i32> <0,0,0,1,1,1,2,2,2,3,3,3,4,4,4,5,5,5,6,6,6,7,7,7>
1577 // The cost is estimated as extract all mask elements from the <8xi1> mask
1578 // vector and insert them factor times into the <24xi1> shuffled mask
1579 // vector.
1580 APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedDstElts, VF);
1581 Cost += thisT()->getScalarizationOverhead(SrcVT, DemandedSrcElts,
1582 /*Insert*/ false,
1583 /*Extract*/ true, CostKind);
1584 Cost += thisT()->getScalarizationOverhead(ReplicatedVT, DemandedDstElts,
1585 /*Insert*/ true,
1586 /*Extract*/ false, CostKind);
1587
1588 return Cost;
1589 }
1590
1592 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1595 const Instruction *I = nullptr) const override {
1596 assert(!Src->isVoidTy() && "Invalid type");
1597 // Assume types, such as structs, are expensive.
1598 if (getTLI()->getValueType(DL, Src, true) == MVT::Other)
1599 return 4;
1600 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Src);
1601
1602 // FIXME: Arbitrary cost
1603 if (Opcode == Instruction::Load && CostKind == TTI::TCK_Latency)
1604 return 4;
1605
1606 // Assuming that all loads of legal types cost 1.
1607 InstructionCost Cost = LT.first;
1609 return Cost;
1610
1611 const DataLayout &DL = this->getDataLayout();
1612 if (Src->isVectorTy() &&
1613 // In practice it's not currently possible to have a change in lane
1614 // length for extending loads or truncating stores so both types should
1615 // have the same scalable property.
1616 TypeSize::isKnownLT(DL.getTypeStoreSizeInBits(Src),
1617 LT.second.getSizeInBits())) {
1618 // This is a vector load that legalizes to a larger type than the vector
1619 // itself. Unless the corresponding extending load or truncating store is
1620 // legal, then this will scalarize.
1622 EVT MemVT = getTLI()->getValueType(DL, Src);
1623 if (Opcode == Instruction::Store)
1624 LA = getTLI()->getTruncStoreAction(LT.second, MemVT, Alignment,
1625 AddressSpace);
1626 else
1627 LA = getTLI()->getLoadAction(LT.second, MemVT, Alignment, AddressSpace,
1628 ISD::EXTLOAD, false);
1629
1630 if (LA != TargetLowering::Legal && LA != TargetLowering::Custom) {
1631 // This is a vector load/store for some illegal type that is scalarized.
1632 // We must account for the cost of building or decomposing the vector.
1634 cast<VectorType>(Src), Opcode != Instruction::Store,
1635 Opcode == Instruction::Store, CostKind);
1636 }
1637 }
1638
1639 return Cost;
1640 }
1641
1643 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1644 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1645 bool UseMaskForCond = false, bool UseMaskForGaps = false) const override {
1646
1647 // We cannot scalarize scalable vectors, so return Invalid.
1648 if (isa<ScalableVectorType>(VecTy))
1650
1651 auto *VT = cast<FixedVectorType>(VecTy);
1652
1653 unsigned NumElts = VT->getNumElements();
1654 assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor");
1655
1656 unsigned NumSubElts = NumElts / Factor;
1657 auto *SubVT = FixedVectorType::get(VT->getElementType(), NumSubElts);
1658
1659 // Firstly, the cost of load/store operation.
1661 if (UseMaskForCond || UseMaskForGaps) {
1662 unsigned IID = Opcode == Instruction::Load ? Intrinsic::masked_load
1663 : Intrinsic::masked_store;
1664 Cost = thisT()->getMemIntrinsicInstrCost(
1665 MemIntrinsicCostAttributes(IID, VecTy, Alignment, AddressSpace),
1666 CostKind);
1667 } else
1668 Cost = thisT()->getMemoryOpCost(Opcode, VecTy, Alignment, AddressSpace,
1669 CostKind);
1670
1671 // Legalize the vector type, and get the legalized and unlegalized type
1672 // sizes.
1673 MVT VecTyLT = getTypeLegalizationCost(VecTy).second;
1674 unsigned VecTySize = thisT()->getDataLayout().getTypeStoreSize(VecTy);
1675 unsigned VecTyLTSize = VecTyLT.getStoreSize();
1676
1677 // Scale the cost of the memory operation by the fraction of legalized
1678 // instructions that will actually be used. We shouldn't account for the
1679 // cost of dead instructions since they will be removed.
1680 //
1681 // E.g., An interleaved load of factor 8:
1682 // %vec = load <16 x i64>, <16 x i64>* %ptr
1683 // %v0 = shufflevector %vec, undef, <0, 8>
1684 //
1685 // If <16 x i64> is legalized to 8 v2i64 loads, only 2 of the loads will be
1686 // used (those corresponding to elements [0:1] and [8:9] of the unlegalized
1687 // type). The other loads are unused.
1688 //
1689 // TODO: Note that legalization can turn masked loads/stores into unmasked
1690 // (legalized) loads/stores. This can be reflected in the cost.
1691 if (Cost.isValid() && VecTySize > VecTyLTSize) {
1692 // The number of loads of a legal type it will take to represent a load
1693 // of the unlegalized vector type.
1694 unsigned NumLegalInsts = divideCeil(VecTySize, VecTyLTSize);
1695
1696 // The number of elements of the unlegalized type that correspond to a
1697 // single legal instruction.
1698 unsigned NumEltsPerLegalInst = divideCeil(NumElts, NumLegalInsts);
1699
1700 // Determine which legal instructions will be used.
1701 BitVector UsedInsts(NumLegalInsts, false);
1702 for (unsigned Index : Indices)
1703 for (unsigned Elt = 0; Elt < NumSubElts; ++Elt)
1704 UsedInsts.set((Index + Elt * Factor) / NumEltsPerLegalInst);
1705
1706 // Scale the cost of the load by the fraction of legal instructions that
1707 // will be used.
1708 Cost = divideCeil(UsedInsts.count() * Cost.getValue(), NumLegalInsts);
1709 }
1710
1711 // Then plus the cost of interleave operation.
1712 assert(Indices.size() <= Factor &&
1713 "Interleaved memory op has too many members");
1714
1715 const APInt DemandedAllSubElts = APInt::getAllOnes(NumSubElts);
1716 const APInt DemandedAllResultElts = APInt::getAllOnes(NumElts);
1717
1718 APInt DemandedLoadStoreElts = APInt::getZero(NumElts);
1719 for (unsigned Index : Indices) {
1720 assert(Index < Factor && "Invalid index for interleaved memory op");
1721 for (unsigned Elm = 0; Elm < NumSubElts; Elm++)
1722 DemandedLoadStoreElts.setBit(Index + Elm * Factor);
1723 }
1724
1725 if (Opcode == Instruction::Load) {
1726 // The interleave cost is similar to extract sub vectors' elements
1727 // from the wide vector, and insert them into sub vectors.
1728 //
1729 // E.g. An interleaved load of factor 2 (with one member of index 0):
1730 // %vec = load <8 x i32>, <8 x i32>* %ptr
1731 // %v0 = shuffle %vec, undef, <0, 2, 4, 6> ; Index 0
1732 // The cost is estimated as extract elements at 0, 2, 4, 6 from the
1733 // <8 x i32> vector and insert them into a <4 x i32> vector.
1734 InstructionCost InsSubCost = thisT()->getScalarizationOverhead(
1735 SubVT, DemandedAllSubElts,
1736 /*Insert*/ true, /*Extract*/ false, CostKind);
1737 Cost += Indices.size() * InsSubCost;
1738 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1739 /*Insert*/ false,
1740 /*Extract*/ true, CostKind);
1741 } else {
1742 // The interleave cost is extract elements from sub vectors, and
1743 // insert them into the wide vector.
1744 //
1745 // E.g. An interleaved store of factor 3 with 2 members at indices 0,1:
1746 // (using VF=4):
1747 // %v0_v1 = shuffle %v0, %v1, <0,4,undef,1,5,undef,2,6,undef,3,7,undef>
1748 // %gaps.mask = <true, true, false, true, true, false,
1749 // true, true, false, true, true, false>
1750 // call llvm.masked.store <12 x i32> %v0_v1, <12 x i32>* %ptr,
1751 // i32 Align, <12 x i1> %gaps.mask
1752 // The cost is estimated as extract all elements (of actual members,
1753 // excluding gaps) from both <4 x i32> vectors and insert into the <12 x
1754 // i32> vector.
1755 InstructionCost ExtSubCost = thisT()->getScalarizationOverhead(
1756 SubVT, DemandedAllSubElts,
1757 /*Insert*/ false, /*Extract*/ true, CostKind);
1758 Cost += ExtSubCost * Indices.size();
1759 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1760 /*Insert*/ true,
1761 /*Extract*/ false, CostKind);
1762 }
1763
1764 if (!UseMaskForCond)
1765 return Cost;
1766
1767 Type *I8Type = Type::getInt8Ty(VT->getContext());
1768
1769 Cost += thisT()->getReplicationShuffleCost(
1770 I8Type, Factor, NumSubElts,
1771 UseMaskForGaps ? DemandedLoadStoreElts : DemandedAllResultElts,
1772 CostKind);
1773
1774 // The Gaps mask is invariant and created outside the loop, therefore the
1775 // cost of creating it is not accounted for here. However if we have both
1776 // a MaskForGaps and some other mask that guards the execution of the
1777 // memory access, we need to account for the cost of And-ing the two masks
1778 // inside the loop.
1779 if (UseMaskForGaps) {
1780 auto *MaskVT = FixedVectorType::get(I8Type, NumElts);
1781 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::And, MaskVT,
1782 CostKind);
1783 }
1784
1785 return Cost;
1786 }
1787
1788 /// Get intrinsic cost based on arguments.
1791 TTI::TargetCostKind CostKind) const override {
1792 // Check for generically free intrinsics.
1794 return 0;
1795
1796 // Assume that target intrinsics are cheap.
1797 Intrinsic::ID IID = ICA.getID();
1800
1801 // VP Intrinsics should have the same cost as their non-vp counterpart.
1802 // TODO: Adjust the cost to make the vp intrinsic cheaper than its non-vp
1803 // counterpart when the vector length argument is smaller than the maximum
1804 // vector length.
1805 // TODO: Support other kinds of VPIntrinsics
1806 if (VPIntrinsic::isVPIntrinsic(ICA.getID())) {
1807 std::optional<unsigned> FOp =
1809 if (FOp) {
1810 if (ICA.getID() == Intrinsic::vp_load) {
1811 Align Alignment;
1812 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1813 Alignment = VPI->getPointerAlignment().valueOrOne();
1814 unsigned AS = 0;
1815 if (ICA.getArgTypes().size() > 1)
1816 if (auto *PtrTy = dyn_cast<PointerType>(ICA.getArgTypes()[0]))
1817 AS = PtrTy->getAddressSpace();
1818 return thisT()->getMemoryOpCost(*FOp, ICA.getReturnType(), Alignment,
1819 AS, CostKind);
1820 }
1821 if (ICA.getID() == Intrinsic::vp_store) {
1822 Align Alignment;
1823 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1824 Alignment = VPI->getPointerAlignment().valueOrOne();
1825 unsigned AS = 0;
1826 if (ICA.getArgTypes().size() >= 2)
1827 if (auto *PtrTy = dyn_cast<PointerType>(ICA.getArgTypes()[1]))
1828 AS = PtrTy->getAddressSpace();
1829 return thisT()->getMemoryOpCost(*FOp, ICA.getArgTypes()[0], Alignment,
1830 AS, CostKind);
1831 }
1832 if (ICA.getID() == Intrinsic::vp_udiv ||
1833 ICA.getID() == Intrinsic::vp_sdiv ||
1834 ICA.getID() == Intrinsic::vp_urem ||
1835 ICA.getID() == Intrinsic::vp_srem) {
1836 return thisT()->getArithmeticInstrCost(*FOp, ICA.getReturnType(),
1837 CostKind);
1838 }
1839 }
1840 if (ICA.getID() == Intrinsic::vp_load_ff) {
1841 Type *RetTy = ICA.getReturnType();
1842 Type *DataTy = cast<StructType>(RetTy)->getElementType(0);
1843 Align Alignment;
1844 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1845 Alignment = VPI->getPointerAlignment().valueOrOne();
1846 return thisT()->getMemIntrinsicInstrCost(
1847 MemIntrinsicCostAttributes(ICA.getID(), DataTy, Alignment),
1848 CostKind);
1849 }
1850 if (ICA.getID() == Intrinsic::vp_scatter) {
1851 if (ICA.isTypeBasedOnly()) {
1852 IntrinsicCostAttributes MaskedScatter(
1855 ICA.getFlags());
1856 return getTypeBasedIntrinsicInstrCost(MaskedScatter, CostKind);
1857 }
1858 Align Alignment;
1859 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1860 Alignment = VPI->getPointerAlignment().valueOrOne();
1861 bool VarMask = isa<Constant>(ICA.getArgs()[2]);
1862 return thisT()->getMemIntrinsicInstrCost(
1863 MemIntrinsicCostAttributes(Intrinsic::vp_scatter,
1864 ICA.getArgTypes()[0], ICA.getArgs()[1],
1865 VarMask, Alignment, nullptr),
1866 CostKind);
1867 }
1868 if (ICA.getID() == Intrinsic::vp_gather) {
1869 if (ICA.isTypeBasedOnly()) {
1870 IntrinsicCostAttributes MaskedGather(
1873 ICA.getFlags());
1874 return getTypeBasedIntrinsicInstrCost(MaskedGather, CostKind);
1875 }
1876 Align Alignment;
1877 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1878 Alignment = VPI->getPointerAlignment().valueOrOne();
1879 bool VarMask = isa<Constant>(ICA.getArgs()[1]);
1880 return thisT()->getMemIntrinsicInstrCost(
1881 MemIntrinsicCostAttributes(Intrinsic::vp_gather,
1882 ICA.getReturnType(), ICA.getArgs()[0],
1883 VarMask, Alignment, nullptr),
1884 CostKind);
1885 }
1886
1887 if (ICA.getID() == Intrinsic::vp_merge) {
1888 TTI::OperandValueInfo OpInfoX, OpInfoY;
1889 if (!ICA.isTypeBasedOnly()) {
1890 OpInfoX = TTI::getOperandInfo(ICA.getArgs()[0]);
1891 OpInfoY = TTI::getOperandInfo(ICA.getArgs()[1]);
1892 }
1893 return getCmpSelInstrCost(
1894 Instruction::Select, ICA.getReturnType(), ICA.getArgTypes()[0],
1895 CmpInst::BAD_ICMP_PREDICATE, CostKind, OpInfoX, OpInfoY);
1896 }
1897
1898 std::optional<Intrinsic::ID> FID =
1900
1901 // Not functionally equivalent but close enough for cost modelling.
1902 if (ICA.getID() == Intrinsic::experimental_vp_reverse)
1903 FID = Intrinsic::vector_reverse;
1904
1905 if (FID) {
1906 // Non-vp version will have same arg types except mask and vector
1907 // length.
1908 assert(ICA.getArgTypes().size() >= 2 &&
1909 "Expected VPIntrinsic to have Mask and Vector Length args and "
1910 "types");
1911
1912 ArrayRef<const Value *> NewArgs = ArrayRef(ICA.getArgs());
1913 if (!ICA.isTypeBasedOnly())
1914 NewArgs = NewArgs.drop_back(2);
1916
1917 // VPReduction intrinsics have a start value argument that their non-vp
1918 // counterparts do not have, except for the fadd and fmul non-vp
1919 // counterpart.
1921 *FID != Intrinsic::vector_reduce_fadd &&
1922 *FID != Intrinsic::vector_reduce_fmul) {
1923 if (!ICA.isTypeBasedOnly())
1924 NewArgs = NewArgs.drop_front();
1925 NewTys = NewTys.drop_front();
1926 }
1927
1928 IntrinsicCostAttributes NewICA(*FID, ICA.getReturnType(), NewArgs,
1929 NewTys, ICA.getFlags());
1930 return thisT()->getIntrinsicInstrCost(NewICA, CostKind);
1931 }
1932 }
1933
1934 if (ICA.isTypeBasedOnly())
1936
1937 Type *RetTy = ICA.getReturnType();
1938
1939 ElementCount RetVF = isVectorizedTy(RetTy) ? getVectorizedTypeVF(RetTy)
1941
1942 const IntrinsicInst *I = ICA.getInst();
1943 const SmallVectorImpl<const Value *> &Args = ICA.getArgs();
1944 FastMathFlags FMF = ICA.getFlags();
1945 switch (IID) {
1946 default:
1947 break;
1948
1949 case Intrinsic::powi:
1950 if (auto *RHSC = dyn_cast<ConstantInt>(Args[1])) {
1951 bool ShouldOptForSize = I->getParent()->getParent()->hasOptSize();
1952 if (getTLI()->isBeneficialToExpandPowI(RHSC->getSExtValue(),
1953 ShouldOptForSize)) {
1954 // The cost is modeled on the expansion performed by ExpandPowI in
1955 // SelectionDAGBuilder.
1956 APInt Exponent = RHSC->getValue().abs();
1957 unsigned ActiveBits = Exponent.getActiveBits();
1958 unsigned PopCount = Exponent.popcount();
1959 InstructionCost Cost = (ActiveBits + PopCount - 2) *
1960 thisT()->getArithmeticInstrCost(
1961 Instruction::FMul, RetTy, CostKind);
1962 if (RHSC->isNegative())
1963 Cost += thisT()->getArithmeticInstrCost(Instruction::FDiv, RetTy,
1964 CostKind);
1965 return Cost;
1966 }
1967 }
1968 break;
1969 case Intrinsic::cttz:
1970 // FIXME: If necessary, this should go in target-specific overrides.
1971 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCttz(RetTy))
1973 break;
1974
1975 case Intrinsic::ctlz:
1976 // FIXME: If necessary, this should go in target-specific overrides.
1977 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCtlz(RetTy))
1979 break;
1980
1981 case Intrinsic::memcpy:
1982 return thisT()->getMemcpyCost(ICA.getInst());
1983
1984 case Intrinsic::masked_scatter: {
1985 const Value *Mask = Args[2];
1986 bool VarMask = !isa<Constant>(Mask);
1987 Align Alignment = I->getParamAlign(1).valueOrOne();
1988 return thisT()->getMemIntrinsicInstrCost(
1989 MemIntrinsicCostAttributes(Intrinsic::masked_scatter,
1990 ICA.getArgTypes()[0], Args[1], VarMask,
1991 Alignment, I),
1992 CostKind);
1993 }
1994 case Intrinsic::masked_gather: {
1995 const Value *Mask = Args[1];
1996 bool VarMask = !isa<Constant>(Mask);
1997 Align Alignment = I->getParamAlign(0).valueOrOne();
1998 return thisT()->getMemIntrinsicInstrCost(
1999 MemIntrinsicCostAttributes(Intrinsic::masked_gather, RetTy, Args[0],
2000 VarMask, Alignment, I),
2001 CostKind);
2002 }
2003 case Intrinsic::masked_compressstore: {
2004 const Value *Data = Args[0];
2005 const Value *Mask = Args[2];
2006 Align Alignment = I->getParamAlign(1).valueOrOne();
2007 return thisT()->getMemIntrinsicInstrCost(
2008 MemIntrinsicCostAttributes(IID, Data->getType(), !isa<Constant>(Mask),
2009 Alignment, I),
2010 CostKind);
2011 }
2012 case Intrinsic::masked_expandload: {
2013 const Value *Mask = Args[1];
2014 Align Alignment = I->getParamAlign(0).valueOrOne();
2015 return thisT()->getMemIntrinsicInstrCost(
2016 MemIntrinsicCostAttributes(IID, RetTy, !isa<Constant>(Mask),
2017 Alignment, I),
2018 CostKind);
2019 }
2020 case Intrinsic::experimental_vp_strided_store: {
2021 const Value *Data = Args[0];
2022 const Value *Ptr = Args[1];
2023 const Value *Mask = Args[3];
2024 const Value *EVL = Args[4];
2025 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
2026 Type *EltTy = cast<VectorType>(Data->getType())->getElementType();
2027 Align Alignment =
2028 I->getParamAlign(1).value_or(thisT()->DL.getABITypeAlign(EltTy));
2029 return thisT()->getMemIntrinsicInstrCost(
2030 MemIntrinsicCostAttributes(IID, Data->getType(), Ptr, VarMask,
2031 Alignment, I),
2032 CostKind);
2033 }
2034 case Intrinsic::experimental_vp_strided_load: {
2035 const Value *Ptr = Args[0];
2036 const Value *Mask = Args[2];
2037 const Value *EVL = Args[3];
2038 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
2039 Type *EltTy = cast<VectorType>(RetTy)->getElementType();
2040 Align Alignment =
2041 I->getParamAlign(0).value_or(thisT()->DL.getABITypeAlign(EltTy));
2042 return thisT()->getMemIntrinsicInstrCost(
2043 MemIntrinsicCostAttributes(IID, RetTy, Ptr, VarMask, Alignment, I),
2044 CostKind);
2045 }
2046 case Intrinsic::stepvector: {
2047 if (isa<ScalableVectorType>(RetTy))
2049 // The cost of materialising a constant integer vector.
2051 }
2052 case Intrinsic::vector_extract: {
2053 // FIXME: Handle case where a scalable vector is extracted from a scalable
2054 // vector
2055 if (isa<ScalableVectorType>(RetTy))
2057 unsigned Index = cast<ConstantInt>(Args[1])->getZExtValue();
2058 return thisT()->getShuffleCost(
2060 cast<VectorType>(Args[0]->getType()), CostKind, {}, Index,
2061 cast<VectorType>(RetTy));
2062 }
2063 case Intrinsic::vector_insert: {
2064 // FIXME: Handle case where a scalable vector is inserted into a scalable
2065 // vector
2066 if (isa<ScalableVectorType>(Args[1]->getType()))
2068 unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
2069 return thisT()->getShuffleCost(
2071 cast<VectorType>(Args[0]->getType()), CostKind, {}, Index,
2072 cast<VectorType>(Args[1]->getType()));
2073 }
2074 case Intrinsic::vector_splice_left:
2075 case Intrinsic::vector_splice_right: {
2076 auto *COffset = dyn_cast<ConstantInt>(Args[2]);
2077 if (!COffset)
2078 break;
2079 unsigned Index = COffset->getZExtValue();
2080 return thisT()->getShuffleCost(
2082 cast<VectorType>(Args[0]->getType()), CostKind, {},
2083 IID == Intrinsic::vector_splice_left ? Index : -Index,
2084 cast<VectorType>(RetTy));
2085 }
2086 case Intrinsic::vector_reduce_add:
2087 case Intrinsic::vector_reduce_mul:
2088 case Intrinsic::vector_reduce_and:
2089 case Intrinsic::vector_reduce_or:
2090 case Intrinsic::vector_reduce_xor:
2091 case Intrinsic::vector_reduce_smax:
2092 case Intrinsic::vector_reduce_smin:
2093 case Intrinsic::vector_reduce_fmax:
2094 case Intrinsic::vector_reduce_fmin:
2095 case Intrinsic::vector_reduce_fmaximum:
2096 case Intrinsic::vector_reduce_fminimum:
2097 case Intrinsic::vector_reduce_fmaximumnum:
2098 case Intrinsic::vector_reduce_fminimumnum:
2099 case Intrinsic::vector_reduce_umax:
2100 case Intrinsic::vector_reduce_umin: {
2101 IntrinsicCostAttributes Attrs(IID, RetTy, Args[0]->getType(), FMF, I, 1);
2103 }
2104 case Intrinsic::vector_reduce_fadd:
2105 case Intrinsic::vector_reduce_fmul: {
2107 IID, RetTy, {Args[0]->getType(), Args[1]->getType()}, FMF, I, 1);
2109 }
2110 case Intrinsic::fshl:
2111 case Intrinsic::fshr: {
2112 const Value *X = Args[0];
2113 const Value *Y = Args[1];
2114 const Value *Z = Args[2];
2117 const TTI::OperandValueInfo OpInfoZ = TTI::getOperandInfo(Z);
2118
2119 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
2120 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
2122 Cost +=
2123 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2124 Cost += thisT()->getArithmeticInstrCost(
2125 BinaryOperator::Shl, RetTy, CostKind, OpInfoX,
2126 {OpInfoZ.Kind, TTI::OP_None});
2127 Cost += thisT()->getArithmeticInstrCost(
2128 BinaryOperator::LShr, RetTy, CostKind, OpInfoY,
2129 {OpInfoZ.Kind, TTI::OP_None});
2130
2131 if (!OpInfoZ.isConstant()) {
2132 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy,
2133 CostKind);
2134 // Non-constant shift amounts requires a modulo. If the typesize is a
2135 // power-2 then this will be converted to an and, otherwise it will use
2136 // a urem.
2137 Cost += thisT()->getArithmeticInstrCost(
2138 isPowerOf2_32(RetTy->getScalarSizeInBits()) ? BinaryOperator::And
2139 : BinaryOperator::URem,
2140 RetTy, CostKind, OpInfoZ,
2141 {TTI::OK_UniformConstantValue, TTI::OP_None});
2142 // For non-rotates (X != Y) we must add shift-by-zero handling costs.
2143 if (X != Y) {
2144 Type *CondTy = RetTy->getWithNewBitWidth(1);
2145 Cost += thisT()->getCmpSelInstrCost(
2146 BinaryOperator::ICmp, RetTy, CondTy, CmpInst::ICMP_EQ, CostKind);
2147 Cost +=
2148 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2150 }
2151 }
2152 return Cost;
2153 }
2154 case Intrinsic::experimental_cttz_elts: {
2155 EVT ArgType = getTLI()->getValueType(DL, ICA.getArgTypes()[0], true);
2156
2157 // TODO: The costs below reflect the expansion code in
2158 // TargetLowering::expandCttzElts, but we may want to sacrifice some
2159 // accuracy in favour of compile time.
2160
2161 // Find the smallest "sensible" element type to use for the expansion.
2162 bool ZeroIsPoison = !cast<ConstantInt>(Args[1])->isZero();
2163 ConstantRange VScaleRange(APInt(64, 1), APInt::getZero(64));
2164 if (isa<ScalableVectorType>(ICA.getArgTypes()[0]) && I && I->getCaller())
2165 VScaleRange = getVScaleRange(I->getCaller(), 64);
2166
2167 unsigned EltWidth = getTLI()->getBitWidthForCttzElements(
2168 getTLI()->getValueType(DL, RetTy), ArgType.getVectorElementCount(),
2169 ZeroIsPoison, &VScaleRange);
2170 Type *NewEltTy = IntegerType::getIntNTy(RetTy->getContext(), EltWidth);
2171
2172 // Create the new vector type & get the vector length
2173 Type *NewVecTy = VectorType::get(
2174 NewEltTy, cast<VectorType>(Args[0]->getType())->getElementCount());
2175
2176 IntrinsicCostAttributes StepVecAttrs(Intrinsic::stepvector, NewVecTy, {},
2177 FMF);
2179 thisT()->getIntrinsicInstrCost(StepVecAttrs, CostKind);
2180
2181 Cost +=
2182 thisT()->getArithmeticInstrCost(Instruction::Sub, NewVecTy, CostKind);
2183 Cost += thisT()->getCastInstrCost(Instruction::SExt, NewVecTy,
2184 Args[0]->getType(),
2186 Cost +=
2187 thisT()->getArithmeticInstrCost(Instruction::And, NewVecTy, CostKind);
2188
2189 IntrinsicCostAttributes ReducAttrs(Intrinsic::vector_reduce_umax,
2190 NewEltTy, NewVecTy, FMF, I, 1);
2191 Cost += thisT()->getTypeBasedIntrinsicInstrCost(ReducAttrs, CostKind);
2192 Cost +=
2193 thisT()->getArithmeticInstrCost(Instruction::Sub, NewEltTy, CostKind);
2194
2195 return Cost;
2196 }
2197 case Intrinsic::get_active_lane_mask:
2198 case Intrinsic::experimental_vector_match:
2199 case Intrinsic::experimental_vector_histogram_add:
2200 case Intrinsic::experimental_vector_histogram_uadd_sat:
2201 case Intrinsic::experimental_vector_histogram_umax:
2202 case Intrinsic::experimental_vector_histogram_umin:
2203 case Intrinsic::masked_udiv:
2204 case Intrinsic::masked_sdiv:
2205 case Intrinsic::masked_urem:
2206 case Intrinsic::masked_srem:
2207 return thisT()->getTypeBasedIntrinsicInstrCost(ICA, CostKind);
2208 case Intrinsic::modf:
2209 case Intrinsic::sincos:
2210 case Intrinsic::sincospi: {
2211 std::optional<unsigned> CallRetElementIndex;
2212 // The first element of the modf result is returned by value in the
2213 // libcall.
2214 if (ICA.getID() == Intrinsic::modf)
2215 CallRetElementIndex = 0;
2216
2217 if (auto Cost = getMultipleResultIntrinsicVectorLibCallCost(
2218 ICA, CostKind, CallRetElementIndex))
2219 return *Cost;
2220 // Otherwise, fallback to default scalarization cost.
2221 break;
2222 }
2223 case Intrinsic::loop_dependence_war_mask:
2224 case Intrinsic::loop_dependence_raw_mask: {
2225 // Compute the cost of the expanded version of these intrinsics:
2226 //
2227 // The possible expansions are...
2228 //
2229 // loop_dependence_war_mask:
2230 // diff = (addrB - addrA) / eltSize
2231 // cmp = icmp sle diff, 0
2232 // upper_bound = select cmp, -1, diff
2233 // mask = get_active_lane_mask 0, upper_bound
2234 //
2235 // loop_dependence_raw_mask:
2236 // diff = (abs(addrB - addrA)) / eltSize
2237 // cmp = icmp eq diff, 0
2238 // upper_bound = select cmp, -1, diff
2239 // mask = get_active_lane_mask 0, upper_bound
2240 //
2241 Type *AddrTy = ICA.getArgTypes()[0];
2242 bool IsReadAfterWrite = IID == Intrinsic::loop_dependence_raw_mask;
2243
2245 thisT()->getArithmeticInstrCost(Instruction::Sub, AddrTy, CostKind);
2246 if (IsReadAfterWrite) {
2247 IntrinsicCostAttributes AbsAttrs(Intrinsic::abs, AddrTy, {AddrTy}, {});
2248 Cost += thisT()->getIntrinsicInstrCost(AbsAttrs, CostKind);
2249 }
2250
2251 TTI::OperandValueInfo EltSizeOpInfo =
2252 TTI::getOperandInfo(ICA.getArgs()[2]);
2253 Cost += thisT()->getArithmeticInstrCost(Instruction::SDiv, AddrTy,
2254 CostKind, {}, EltSizeOpInfo);
2255
2256 Type *CondTy = IntegerType::getInt1Ty(RetTy->getContext());
2257 CmpInst::Predicate Pred =
2258 IsReadAfterWrite ? CmpInst::ICMP_EQ : CmpInst::ICMP_SLE;
2259 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CondTy, AddrTy,
2260 Pred, CostKind);
2261 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, AddrTy,
2262 CondTy, Pred, CostKind);
2263
2264 IntrinsicCostAttributes Attrs(Intrinsic::get_active_lane_mask, RetTy,
2265 {AddrTy, AddrTy}, FMF);
2266 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2267 return Cost;
2268 }
2269 }
2270
2271 // Assume that we need to scalarize this intrinsic.)
2272 // Compute the scalarization overhead based on Args for a vector
2273 // intrinsic.
2274 InstructionCost ScalarizationCost = InstructionCost::getInvalid();
2275 if (RetVF.isVector() && !RetVF.isScalable()) {
2276 ScalarizationCost = 0;
2277 if (!RetTy->isVoidTy()) {
2278 for (Type *VectorTy : getContainedTypes(RetTy)) {
2279 ScalarizationCost += getScalarizationOverhead(
2280 cast<VectorType>(VectorTy),
2281 /*Insert=*/true, /*Extract=*/false, CostKind);
2282 }
2283 }
2284 ScalarizationCost += getOperandsScalarizationOverhead(
2285 filterConstantAndDuplicatedOperands(Args, ICA.getArgTypes()),
2286 CostKind);
2287 }
2288
2289 IntrinsicCostAttributes Attrs(IID, RetTy, ICA.getArgTypes(), FMF, I,
2290 ScalarizationCost);
2291 return thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
2292 }
2293
2294 /// Get intrinsic cost based on argument types.
2295 /// If ScalarizationCostPassed is std::numeric_limits<unsigned>::max(), the
2296 /// cost of scalarizing the arguments and the return value will be computed
2297 /// based on types.
2301 Intrinsic::ID IID = ICA.getID();
2302 Type *RetTy = ICA.getReturnType();
2303 const SmallVectorImpl<Type *> &Tys = ICA.getArgTypes();
2304 FastMathFlags FMF = ICA.getFlags();
2305 InstructionCost ScalarizationCostPassed = ICA.getScalarizationCost();
2306 bool SkipScalarizationCost = ICA.skipScalarizationCost();
2307
2308 VectorType *VecOpTy = nullptr;
2309 if (!Tys.empty()) {
2310 // The vector reduction operand is operand 0 except for fadd/fmul.
2311 // Their operand 0 is a scalar start value, so the vector op is operand 1.
2312 unsigned VecTyIndex = 0;
2313 if (IID == Intrinsic::vector_reduce_fadd ||
2314 IID == Intrinsic::vector_reduce_fmul)
2315 VecTyIndex = 1;
2316 assert(Tys.size() > VecTyIndex && "Unexpected IntrinsicCostAttributes");
2317 VecOpTy = dyn_cast<VectorType>(Tys[VecTyIndex]);
2318 }
2319
2320 // Library call cost - other than size, make it expensive.
2321 unsigned SingleCallCost = CostKind == TTI::TCK_CodeSize ? 1 : 10;
2322 unsigned ISD = 0;
2323 switch (IID) {
2324 default: {
2325 // Scalable vectors cannot be scalarized, so return Invalid.
2326 if (isa<ScalableVectorType>(RetTy) || any_of(Tys, [](const Type *Ty) {
2327 return isa<ScalableVectorType>(Ty);
2328 }))
2330
2331 // Assume that we need to scalarize this intrinsic.
2332 InstructionCost ScalarizationCost =
2333 SkipScalarizationCost ? ScalarizationCostPassed : 0;
2334 unsigned ScalarCalls = 1;
2335 Type *ScalarRetTy = RetTy;
2336 if (auto *RetVTy = dyn_cast<VectorType>(RetTy)) {
2337 if (!SkipScalarizationCost)
2338 ScalarizationCost = getScalarizationOverhead(
2339 RetVTy, /*Insert*/ true, /*Extract*/ false, CostKind);
2340 ScalarCalls = std::max(ScalarCalls,
2341 cast<FixedVectorType>(RetVTy)->getNumElements());
2342 ScalarRetTy = RetTy->getScalarType();
2343 }
2344 SmallVector<Type *, 4> ScalarTys;
2345 for (Type *Ty : Tys) {
2346 if (auto *VTy = dyn_cast<VectorType>(Ty)) {
2347 if (!SkipScalarizationCost)
2348 ScalarizationCost += getScalarizationOverhead(
2349 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
2350 ScalarCalls = std::max(ScalarCalls,
2351 cast<FixedVectorType>(VTy)->getNumElements());
2352 Ty = Ty->getScalarType();
2353 }
2354 ScalarTys.push_back(Ty);
2355 }
2356 if (ScalarCalls == 1)
2357 return 1; // Return cost of a scalar intrinsic. Assume it to be cheap.
2358
2359 IntrinsicCostAttributes ScalarAttrs(IID, ScalarRetTy, ScalarTys, FMF);
2360 InstructionCost ScalarCost =
2361 thisT()->getIntrinsicInstrCost(ScalarAttrs, CostKind);
2362
2363 return ScalarCalls * ScalarCost + ScalarizationCost;
2364 }
2365 // Look for intrinsics that can be lowered directly or turned into a scalar
2366 // intrinsic call.
2367 case Intrinsic::sqrt:
2368 ISD = ISD::FSQRT;
2369 break;
2370 case Intrinsic::sin:
2371 ISD = ISD::FSIN;
2372 break;
2373 case Intrinsic::cos:
2374 ISD = ISD::FCOS;
2375 break;
2376 case Intrinsic::sincos:
2377 ISD = ISD::FSINCOS;
2378 break;
2379 case Intrinsic::sincospi:
2381 break;
2382 case Intrinsic::modf:
2383 ISD = ISD::FMODF;
2384 break;
2385 case Intrinsic::tan:
2386 ISD = ISD::FTAN;
2387 break;
2388 case Intrinsic::asin:
2389 ISD = ISD::FASIN;
2390 break;
2391 case Intrinsic::acos:
2392 ISD = ISD::FACOS;
2393 break;
2394 case Intrinsic::atan:
2395 ISD = ISD::FATAN;
2396 break;
2397 case Intrinsic::atan2:
2398 ISD = ISD::FATAN2;
2399 break;
2400 case Intrinsic::sinh:
2401 ISD = ISD::FSINH;
2402 break;
2403 case Intrinsic::cosh:
2404 ISD = ISD::FCOSH;
2405 break;
2406 case Intrinsic::tanh:
2407 ISD = ISD::FTANH;
2408 break;
2409 case Intrinsic::exp:
2410 ISD = ISD::FEXP;
2411 break;
2412 case Intrinsic::exp2:
2413 ISD = ISD::FEXP2;
2414 break;
2415 case Intrinsic::exp10:
2416 ISD = ISD::FEXP10;
2417 break;
2418 case Intrinsic::log:
2419 ISD = ISD::FLOG;
2420 break;
2421 case Intrinsic::log10:
2422 ISD = ISD::FLOG10;
2423 break;
2424 case Intrinsic::log2:
2425 ISD = ISD::FLOG2;
2426 break;
2427 case Intrinsic::ldexp:
2428 ISD = ISD::FLDEXP;
2429 break;
2430 case Intrinsic::fabs:
2431 ISD = ISD::FABS;
2432 break;
2433 case Intrinsic::canonicalize:
2435 break;
2436 case Intrinsic::minnum:
2437 ISD = ISD::FMINNUM;
2438 break;
2439 case Intrinsic::maxnum:
2440 ISD = ISD::FMAXNUM;
2441 break;
2442 case Intrinsic::minimum:
2444 break;
2445 case Intrinsic::maximum:
2447 break;
2448 case Intrinsic::minimumnum:
2450 break;
2451 case Intrinsic::maximumnum:
2453 break;
2454 case Intrinsic::copysign:
2456 break;
2457 case Intrinsic::floor:
2458 ISD = ISD::FFLOOR;
2459 break;
2460 case Intrinsic::ceil:
2461 ISD = ISD::FCEIL;
2462 break;
2463 case Intrinsic::trunc:
2464 ISD = ISD::FTRUNC;
2465 break;
2466 case Intrinsic::nearbyint:
2468 break;
2469 case Intrinsic::rint:
2470 ISD = ISD::FRINT;
2471 break;
2472 case Intrinsic::lrint:
2473 ISD = ISD::LRINT;
2474 break;
2475 case Intrinsic::llrint:
2476 ISD = ISD::LLRINT;
2477 break;
2478 case Intrinsic::round:
2479 ISD = ISD::FROUND;
2480 break;
2481 case Intrinsic::roundeven:
2483 break;
2484 case Intrinsic::lround:
2485 ISD = ISD::LROUND;
2486 break;
2487 case Intrinsic::llround:
2488 ISD = ISD::LLROUND;
2489 break;
2490 case Intrinsic::pow:
2491 ISD = ISD::FPOW;
2492 break;
2493 case Intrinsic::fma:
2494 ISD = ISD::FMA;
2495 break;
2496 case Intrinsic::fmuladd:
2497 ISD = ISD::FMA;
2498 break;
2499 case Intrinsic::experimental_constrained_fmuladd:
2501 break;
2502 // FIXME: We should return 0 whenever getIntrinsicCost == TCC_Free.
2503 case Intrinsic::lifetime_start:
2504 case Intrinsic::lifetime_end:
2505 case Intrinsic::sideeffect:
2506 case Intrinsic::pseudoprobe:
2507 case Intrinsic::arithmetic_fence:
2508 return 0;
2509 case Intrinsic::masked_store: {
2510 Type *Ty = Tys[0];
2511 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2512 return thisT()->getMemIntrinsicInstrCost(
2513 MemIntrinsicCostAttributes(IID, Ty, TyAlign, 0), CostKind);
2514 }
2515 case Intrinsic::masked_load: {
2516 Type *Ty = RetTy;
2517 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2518 return thisT()->getMemIntrinsicInstrCost(
2519 MemIntrinsicCostAttributes(IID, Ty, TyAlign, 0), CostKind);
2520 }
2521 case Intrinsic::experimental_vp_strided_store: {
2522 auto *Ty = cast<VectorType>(ICA.getArgTypes()[0]);
2523 Align Alignment = thisT()->DL.getABITypeAlign(Ty->getElementType());
2524 return thisT()->getMemIntrinsicInstrCost(
2525 MemIntrinsicCostAttributes(IID, Ty, /*Ptr=*/nullptr,
2526 /*VariableMask=*/true, Alignment,
2527 ICA.getInst()),
2528 CostKind);
2529 }
2530 case Intrinsic::experimental_vp_strided_load: {
2531 auto *Ty = cast<VectorType>(ICA.getReturnType());
2532 Align Alignment = thisT()->DL.getABITypeAlign(Ty->getElementType());
2533 return thisT()->getMemIntrinsicInstrCost(
2534 MemIntrinsicCostAttributes(IID, Ty, /*Ptr=*/nullptr,
2535 /*VariableMask=*/true, Alignment,
2536 ICA.getInst()),
2537 CostKind);
2538 }
2539 case Intrinsic::vector_reduce_add:
2540 case Intrinsic::vector_reduce_mul:
2541 case Intrinsic::vector_reduce_and:
2542 case Intrinsic::vector_reduce_or:
2543 case Intrinsic::vector_reduce_xor:
2544 return thisT()->getArithmeticReductionCost(
2545 getArithmeticReductionInstruction(IID), VecOpTy, std::nullopt,
2546 CostKind);
2547 case Intrinsic::vector_reduce_fadd:
2548 case Intrinsic::vector_reduce_fmul:
2549 return thisT()->getArithmeticReductionCost(
2550 getArithmeticReductionInstruction(IID), VecOpTy, FMF, CostKind);
2551 case Intrinsic::vector_reduce_smax:
2552 case Intrinsic::vector_reduce_smin:
2553 case Intrinsic::vector_reduce_umax:
2554 case Intrinsic::vector_reduce_umin:
2555 case Intrinsic::vector_reduce_fmax:
2556 case Intrinsic::vector_reduce_fmin:
2557 case Intrinsic::vector_reduce_fmaximum:
2558 case Intrinsic::vector_reduce_fminimum:
2559 case Intrinsic::vector_reduce_fmaximumnum:
2560 case Intrinsic::vector_reduce_fminimumnum:
2561 return thisT()->getMinMaxReductionCost(getMinMaxReductionIntrinsicOp(IID),
2562 VecOpTy, ICA.getFlags(), CostKind);
2563 case Intrinsic::experimental_vector_match: {
2564 auto *SearchTy = cast<VectorType>(ICA.getArgTypes()[0]);
2565 auto *NeedleTy = cast<FixedVectorType>(ICA.getArgTypes()[1]);
2566 unsigned SearchSize = NeedleTy->getNumElements();
2567
2568 // Approximate the cost based on the expansion code in
2569 // TargetLowering::expandVectorMatch.
2571 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, NeedleTy,
2572 CostKind, 1, nullptr, nullptr);
2573 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SearchTy,
2574 CostKind, 0, nullptr, nullptr);
2575 Cost += thisT()->getShuffleCost(TTI::SK_Broadcast, SearchTy, SearchTy,
2576 CostKind, {}, 0, nullptr);
2577 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SearchTy, RetTy,
2579 Cost +=
2580 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2581 Cost *= SearchSize;
2582 Cost +=
2583 thisT()->getArithmeticInstrCost(BinaryOperator::And, RetTy, CostKind);
2584 return Cost;
2585 }
2586 case Intrinsic::vector_reverse:
2587 return thisT()->getShuffleCost(TTI::SK_Reverse, cast<VectorType>(RetTy),
2588 cast<VectorType>(ICA.getArgTypes()[0]),
2589 CostKind, {}, 0, cast<VectorType>(RetTy));
2590 case Intrinsic::experimental_vector_histogram_add:
2591 case Intrinsic::experimental_vector_histogram_uadd_sat:
2592 case Intrinsic::experimental_vector_histogram_umax:
2593 case Intrinsic::experimental_vector_histogram_umin: {
2595 Type *EltTy = ICA.getArgTypes()[1];
2596
2597 // Targets with scalable vectors must handle this on their own.
2598 if (!PtrsTy)
2600
2601 Align Alignment = thisT()->DL.getABITypeAlign(EltTy);
2603 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, PtrsTy,
2604 CostKind, 1, nullptr, nullptr);
2605 Cost += thisT()->getMemoryOpCost(Instruction::Load, EltTy, Alignment, 0,
2606 CostKind);
2607 switch (IID) {
2608 default:
2609 llvm_unreachable("Unhandled histogram update operation.");
2610 case Intrinsic::experimental_vector_histogram_add:
2611 Cost +=
2612 thisT()->getArithmeticInstrCost(Instruction::Add, EltTy, CostKind);
2613 break;
2614 case Intrinsic::experimental_vector_histogram_uadd_sat: {
2615 IntrinsicCostAttributes UAddSat(Intrinsic::uadd_sat, EltTy, {EltTy});
2616 Cost += thisT()->getIntrinsicInstrCost(UAddSat, CostKind);
2617 break;
2618 }
2619 case Intrinsic::experimental_vector_histogram_umax: {
2620 IntrinsicCostAttributes UMax(Intrinsic::umax, EltTy, {EltTy});
2621 Cost += thisT()->getIntrinsicInstrCost(UMax, CostKind);
2622 break;
2623 }
2624 case Intrinsic::experimental_vector_histogram_umin: {
2625 IntrinsicCostAttributes UMin(Intrinsic::umin, EltTy, {EltTy});
2626 Cost += thisT()->getIntrinsicInstrCost(UMin, CostKind);
2627 break;
2628 }
2629 }
2630 Cost += thisT()->getMemoryOpCost(Instruction::Store, EltTy, Alignment, 0,
2631 CostKind);
2632 Cost *= PtrsTy->getNumElements();
2633 return Cost;
2634 }
2635 case Intrinsic::get_active_lane_mask: {
2636 Type *ArgTy = ICA.getArgTypes()[0];
2637 EVT ResVT = getTLI()->getValueType(DL, RetTy, true);
2638 EVT ArgVT = getTLI()->getValueType(DL, ArgTy, true);
2639
2640 // If we're not expanding the intrinsic then we assume this is cheap
2641 // to implement.
2642 if (!getTLI()->shouldExpandGetActiveLaneMask(ResVT, ArgVT))
2643 return getTypeLegalizationCost(RetTy).first;
2644
2645 // Create the expanded types that will be used to calculate the uadd_sat
2646 // operation.
2647 Type *ExpRetTy =
2648 VectorType::get(ArgTy, cast<VectorType>(RetTy)->getElementCount());
2649 IntrinsicCostAttributes Attrs(Intrinsic::uadd_sat, ExpRetTy, {}, FMF);
2651 thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
2652 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, ExpRetTy, RetTy,
2654 return Cost;
2655 }
2656 case Intrinsic::experimental_memset_pattern:
2657 // This cost is set to match the cost of the memset_pattern16 libcall.
2658 // It should likely be re-evaluated after migration to this intrinsic
2659 // is complete.
2660 return TTI::TCC_Basic * 4;
2661 case Intrinsic::abs:
2662 ISD = ISD::ABS;
2663 break;
2664 case Intrinsic::fshl:
2665 ISD = ISD::FSHL;
2666 break;
2667 case Intrinsic::fshr:
2668 ISD = ISD::FSHR;
2669 break;
2670 case Intrinsic::smax:
2671 ISD = ISD::SMAX;
2672 break;
2673 case Intrinsic::smin:
2674 ISD = ISD::SMIN;
2675 break;
2676 case Intrinsic::umax:
2677 ISD = ISD::UMAX;
2678 break;
2679 case Intrinsic::umin:
2680 ISD = ISD::UMIN;
2681 break;
2682 case Intrinsic::sadd_sat:
2683 ISD = ISD::SADDSAT;
2684 break;
2685 case Intrinsic::ssub_sat:
2686 ISD = ISD::SSUBSAT;
2687 break;
2688 case Intrinsic::uadd_sat:
2689 ISD = ISD::UADDSAT;
2690 break;
2691 case Intrinsic::usub_sat:
2692 ISD = ISD::USUBSAT;
2693 break;
2694 case Intrinsic::smul_fix:
2695 ISD = ISD::SMULFIX;
2696 break;
2697 case Intrinsic::umul_fix:
2698 ISD = ISD::UMULFIX;
2699 break;
2700 case Intrinsic::sadd_with_overflow:
2701 ISD = ISD::SADDO;
2702 break;
2703 case Intrinsic::ssub_with_overflow:
2704 ISD = ISD::SSUBO;
2705 break;
2706 case Intrinsic::uadd_with_overflow:
2707 ISD = ISD::UADDO;
2708 break;
2709 case Intrinsic::usub_with_overflow:
2710 ISD = ISD::USUBO;
2711 break;
2712 case Intrinsic::smul_with_overflow:
2713 ISD = ISD::SMULO;
2714 break;
2715 case Intrinsic::umul_with_overflow:
2716 ISD = ISD::UMULO;
2717 break;
2718 case Intrinsic::fptosi_sat:
2719 case Intrinsic::fptoui_sat: {
2720 std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Tys[0]);
2721 std::pair<InstructionCost, MVT> RetLT = getTypeLegalizationCost(RetTy);
2722
2723 // For cast instructions, types are different between source and
2724 // destination. Also need to check if the source type can be legalize.
2725 if (!SrcLT.first.isValid() || !RetLT.first.isValid())
2727 ISD = IID == Intrinsic::fptosi_sat ? ISD::FP_TO_SINT_SAT
2729 break;
2730 }
2731 case Intrinsic::ctpop:
2732 ISD = ISD::CTPOP;
2733 // In case of legalization use TCC_Expensive. This is cheaper than a
2734 // library call but still not a cheap instruction.
2735 SingleCallCost = TargetTransformInfo::TCC_Expensive;
2736 break;
2737 case Intrinsic::ctlz:
2738 ISD = ISD::CTLZ;
2739 break;
2740 case Intrinsic::cttz:
2741 ISD = ISD::CTTZ;
2742 break;
2743 case Intrinsic::bswap:
2744 ISD = ISD::BSWAP;
2745 break;
2746 case Intrinsic::bitreverse:
2748 break;
2749 case Intrinsic::ucmp:
2750 ISD = ISD::UCMP;
2751 break;
2752 case Intrinsic::scmp:
2753 ISD = ISD::SCMP;
2754 break;
2755 case Intrinsic::clmul:
2756 ISD = ISD::CLMUL;
2757 break;
2758 case Intrinsic::smulh:
2759 ISD = ISD::MULHS;
2760 break;
2761 case Intrinsic::umulh:
2762 ISD = ISD::MULHU;
2763 break;
2764 case Intrinsic::masked_udiv:
2765 case Intrinsic::masked_sdiv:
2766 case Intrinsic::masked_urem:
2767 case Intrinsic::masked_srem: {
2768 unsigned UnmaskedOpc;
2769 switch (IID) {
2770 case Intrinsic::masked_udiv:
2772 UnmaskedOpc = Instruction::UDiv;
2773 break;
2774 case Intrinsic::masked_sdiv:
2776 UnmaskedOpc = Instruction::SDiv;
2777 break;
2778 case Intrinsic::masked_urem:
2780 UnmaskedOpc = Instruction::URem;
2781 break;
2782 case Intrinsic::masked_srem:
2784 UnmaskedOpc = Instruction::SRem;
2785 break;
2786 default:
2787 llvm_unreachable("Unexpected intrinsic ID");
2788 }
2790 thisT()->getArithmeticInstrCost(UnmaskedOpc, RetTy, CostKind);
2791
2792 // Expansion generates a (select %mask, %rhs, 1) for the divisor.
2793 MVT LT = getTypeLegalizationCost(RetTy).second;
2794 if (!getTLI()->isOperationLegalOrCustom(ISD, LT)) {
2795 Type *CondTy = cast<VectorType>(RetTy)->getWithNewType(
2797 Cost += thisT()->getCmpSelInstrCost(
2798 BinaryOperator::Select, RetTy, CondTy, CmpInst::BAD_ICMP_PREDICATE,
2800 }
2801
2802 return Cost;
2803 }
2804 }
2805
2806 auto *ST = dyn_cast<StructType>(RetTy);
2807 Type *LegalizeTy = ST ? ST->getContainedType(0) : RetTy;
2808 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(LegalizeTy);
2809
2810 const TargetLoweringBase *TLI = getTLI();
2811
2812 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
2813 if (IID == Intrinsic::fabs && LT.second.isFloatingPoint() &&
2814 TLI->isFAbsFree(LT.second)) {
2815 return 0;
2816 }
2817
2818 // The operation is legal. Assume it costs 1.
2819 // If the type is split to multiple registers, assume that there is some
2820 // overhead to this.
2821 // TODO: Once we have extract/insert subvector cost we need to use them.
2822 if (LT.first > 1)
2823 return (LT.first * 2);
2824 else
2825 return (LT.first * 1);
2826 } else if (TLI->isOperationCustom(ISD, LT.second)) {
2827 // If the operation is custom lowered then assume
2828 // that the code is twice as expensive.
2829 return (LT.first * 2);
2830 }
2831
2832 switch (IID) {
2833 case Intrinsic::fmuladd: {
2834 // If we can't lower fmuladd into an FMA estimate the cost as a floating
2835 // point mul followed by an add.
2836
2837 return thisT()->getArithmeticInstrCost(BinaryOperator::FMul, RetTy,
2838 CostKind) +
2839 thisT()->getArithmeticInstrCost(BinaryOperator::FAdd, RetTy,
2840 CostKind);
2841 }
2842 case Intrinsic::experimental_constrained_fmuladd: {
2843 IntrinsicCostAttributes FMulAttrs(
2844 Intrinsic::experimental_constrained_fmul, RetTy, Tys);
2845 IntrinsicCostAttributes FAddAttrs(
2846 Intrinsic::experimental_constrained_fadd, RetTy, Tys);
2847 return thisT()->getIntrinsicInstrCost(FMulAttrs, CostKind) +
2848 thisT()->getIntrinsicInstrCost(FAddAttrs, CostKind);
2849 }
2850 case Intrinsic::smin:
2851 case Intrinsic::smax:
2852 case Intrinsic::umin:
2853 case Intrinsic::umax: {
2854 // minmax(X,Y) = select(icmp(X,Y),X,Y)
2855 Type *CondTy = RetTy->getWithNewBitWidth(1);
2856 bool IsUnsigned = IID == Intrinsic::umax || IID == Intrinsic::umin;
2857 CmpInst::Predicate Pred =
2858 IsUnsigned ? CmpInst::ICMP_UGT : CmpInst::ICMP_SGT;
2860 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2861 Pred, CostKind);
2862 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2863 Pred, CostKind);
2864 return Cost;
2865 }
2866 case Intrinsic::sadd_with_overflow:
2867 case Intrinsic::ssub_with_overflow: {
2868 Type *SumTy = RetTy->getContainedType(0);
2869 Type *OverflowTy = RetTy->getContainedType(1);
2870 unsigned Opcode = IID == Intrinsic::sadd_with_overflow
2871 ? BinaryOperator::Add
2872 : BinaryOperator::Sub;
2873
2874 // Add:
2875 // Overflow -> (Result < LHS) ^ (RHS < 0)
2876 // Sub:
2877 // Overflow -> (Result < LHS) ^ (RHS > 0)
2879 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2880 Cost +=
2881 2 * thisT()->getCmpSelInstrCost(Instruction::ICmp, SumTy, OverflowTy,
2883 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Xor, OverflowTy,
2884 CostKind);
2885 return Cost;
2886 }
2887 case Intrinsic::uadd_with_overflow:
2888 case Intrinsic::usub_with_overflow: {
2889 Type *SumTy = RetTy->getContainedType(0);
2890 Type *OverflowTy = RetTy->getContainedType(1);
2891 unsigned Opcode = IID == Intrinsic::uadd_with_overflow
2892 ? BinaryOperator::Add
2893 : BinaryOperator::Sub;
2894 CmpInst::Predicate Pred = IID == Intrinsic::uadd_with_overflow
2897
2899 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2900 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SumTy,
2901 OverflowTy, Pred, CostKind);
2902 return Cost;
2903 }
2904 case Intrinsic::smul_with_overflow:
2905 case Intrinsic::umul_with_overflow: {
2906 Type *MulTy = RetTy->getContainedType(0);
2907 Type *OverflowTy = RetTy->getContainedType(1);
2908 unsigned ExtSize = MulTy->getScalarSizeInBits() * 2;
2909 Type *ExtTy = MulTy->getWithNewBitWidth(ExtSize);
2910 bool IsSigned = IID == Intrinsic::smul_with_overflow;
2911
2912 unsigned ExtOp = IsSigned ? Instruction::SExt : Instruction::ZExt;
2914
2916 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, MulTy, CCH, CostKind);
2917 Cost +=
2918 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2919 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, MulTy, ExtTy,
2920 CCH, CostKind);
2921 Cost += thisT()->getArithmeticInstrCost(
2922 Instruction::LShr, ExtTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2924
2925 if (IsSigned)
2926 Cost += thisT()->getArithmeticInstrCost(
2927 Instruction::AShr, MulTy, CostKind,
2930
2931 Cost += thisT()->getCmpSelInstrCost(
2932 BinaryOperator::ICmp, MulTy, OverflowTy, CmpInst::ICMP_NE, CostKind);
2933 return Cost;
2934 }
2935 case Intrinsic::sadd_sat:
2936 case Intrinsic::ssub_sat: {
2937 // Assume a default expansion.
2938 Type *CondTy = RetTy->getWithNewBitWidth(1);
2939
2940 Type *OpTy = StructType::create({RetTy, CondTy});
2941 Intrinsic::ID OverflowOp = IID == Intrinsic::sadd_sat
2942 ? Intrinsic::sadd_with_overflow
2943 : Intrinsic::ssub_with_overflow;
2945
2946 // SatMax -> Overflow && SumDiff < 0
2947 // SatMin -> Overflow && SumDiff >= 0
2949 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2950 nullptr, ScalarizationCostPassed);
2951 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2952 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2953 Pred, CostKind);
2954 Cost += 2 * thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy,
2955 CondTy, Pred, CostKind);
2956 return Cost;
2957 }
2958 case Intrinsic::uadd_sat:
2959 case Intrinsic::usub_sat: {
2960 Type *CondTy = RetTy->getWithNewBitWidth(1);
2961
2962 Type *OpTy = StructType::create({RetTy, CondTy});
2963 Intrinsic::ID OverflowOp = IID == Intrinsic::uadd_sat
2964 ? Intrinsic::uadd_with_overflow
2965 : Intrinsic::usub_with_overflow;
2966
2968 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2969 nullptr, ScalarizationCostPassed);
2970 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2971 Cost +=
2972 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2974 return Cost;
2975 }
2976 case Intrinsic::smul_fix:
2977 case Intrinsic::umul_fix: {
2978 unsigned ExtSize = RetTy->getScalarSizeInBits() * 2;
2979 Type *ExtTy = RetTy->getWithNewBitWidth(ExtSize);
2980
2981 unsigned ExtOp =
2982 IID == Intrinsic::smul_fix ? Instruction::SExt : Instruction::ZExt;
2984
2986 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, RetTy, CCH, CostKind);
2987 Cost +=
2988 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2989 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, RetTy, ExtTy,
2990 CCH, CostKind);
2991 Cost += thisT()->getArithmeticInstrCost(
2992 Instruction::LShr, RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2994 Cost += thisT()->getArithmeticInstrCost(
2995 Instruction::Shl, RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2997 Cost += thisT()->getArithmeticInstrCost(Instruction::Or, RetTy, CostKind);
2998 return Cost;
2999 }
3000 case Intrinsic::abs: {
3001 // abs(X) = select(icmp(X,0),X,sub(0,X))
3002 Type *CondTy = RetTy->getWithNewBitWidth(1);
3005 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
3006 Pred, CostKind);
3007 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
3008 Pred, CostKind);
3009 // TODO: Should we add an OperandValueProperties::OP_Zero property?
3010 Cost += thisT()->getArithmeticInstrCost(
3011 BinaryOperator::Sub, RetTy, CostKind,
3013 return Cost;
3014 }
3015 case Intrinsic::fshl:
3016 case Intrinsic::fshr: {
3017 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
3018 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
3019 Type *CondTy = RetTy->getWithNewBitWidth(1);
3021 Cost +=
3022 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
3023 Cost +=
3024 thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy, CostKind);
3025 Cost +=
3026 thisT()->getArithmeticInstrCost(BinaryOperator::Shl, RetTy, CostKind);
3027 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::LShr, RetTy,
3028 CostKind);
3029 // Non-constant shift amounts requires a modulo. If the typesize is a
3030 // power-2 then this will be converted to an and, otherwise it will use a
3031 // urem.
3032 Cost += thisT()->getArithmeticInstrCost(
3033 isPowerOf2_32(RetTy->getScalarSizeInBits()) ? BinaryOperator::And
3034 : BinaryOperator::URem,
3035 RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
3036 {TTI::OK_UniformConstantValue, TTI::OP_None});
3037 // Shift-by-zero handling.
3038 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
3040 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
3042 return Cost;
3043 }
3044 case Intrinsic::fptosi_sat:
3045 case Intrinsic::fptoui_sat: {
3046 if (Tys.empty())
3047 break;
3048 Type *FromTy = Tys[0];
3049 bool IsSigned = IID == Intrinsic::fptosi_sat;
3050
3052 IntrinsicCostAttributes Attrs1(Intrinsic::minnum, FromTy,
3053 {FromTy, FromTy});
3054 Cost += thisT()->getIntrinsicInstrCost(Attrs1, CostKind);
3055 IntrinsicCostAttributes Attrs2(Intrinsic::maxnum, FromTy,
3056 {FromTy, FromTy});
3057 Cost += thisT()->getIntrinsicInstrCost(Attrs2, CostKind);
3058 Cost += thisT()->getCastInstrCost(
3059 IsSigned ? Instruction::FPToSI : Instruction::FPToUI, RetTy, FromTy,
3061 if (IsSigned) {
3062 Type *CondTy = RetTy->getWithNewBitWidth(1);
3063 Cost += thisT()->getCmpSelInstrCost(
3064 BinaryOperator::FCmp, FromTy, CondTy, CmpInst::FCMP_UNO, CostKind);
3065 Cost += thisT()->getCmpSelInstrCost(
3066 BinaryOperator::Select, RetTy, CondTy, CmpInst::FCMP_UNO, CostKind);
3067 }
3068 return Cost;
3069 }
3070 case Intrinsic::ucmp:
3071 case Intrinsic::scmp: {
3072 Type *CmpTy = Tys[0];
3073 Type *CondTy = RetTy->getWithNewBitWidth(1);
3075 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CmpTy, CondTy,
3077 CostKind) +
3078 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CmpTy, CondTy,
3080 CostKind);
3081
3082 EVT VT = TLI->getValueType(DL, CmpTy, true);
3084 // x < y ? -1 : (x > y ? 1 : 0)
3085 Cost += 2 * thisT()->getCmpSelInstrCost(
3086 BinaryOperator::Select, RetTy, CondTy,
3088 } else {
3089 // zext(x > y) - zext(x < y)
3090 Cost +=
3091 2 * thisT()->getCastInstrCost(CastInst::ZExt, RetTy, CondTy,
3093 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy,
3094 CostKind);
3095 }
3096 return Cost;
3097 }
3098 case Intrinsic::maximumnum:
3099 case Intrinsic::minimumnum: {
3100 // On platform that support FMAXNUM_IEEE/FMINNUM_IEEE, we expand
3101 // maximumnum/minimumnum to
3102 // ARG0 = fcanonicalize ARG0, ARG0 // to quiet ARG0
3103 // ARG1 = fcanonicalize ARG1, ARG1 // to quiet ARG1
3104 // RESULT = MAXNUM_IEEE ARG0, ARG1 // or MINNUM_IEEE
3105 // FIXME: In LangRef, we claimed FMAXNUM has the same behaviour of
3106 // FMAXNUM_IEEE, while the backend hasn't migrated the code yet.
3107 // Finally, we will remove FMAXNUM_IEEE and FMINNUM_IEEE.
3108 int IeeeISD =
3109 IID == Intrinsic::maximumnum ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE;
3110 if (TLI->isOperationLegal(IeeeISD, LT.second)) {
3111 IntrinsicCostAttributes FCanonicalizeAttrs(Intrinsic::canonicalize,
3112 RetTy, Tys[0]);
3113 InstructionCost FCanonicalizeCost =
3114 thisT()->getIntrinsicInstrCost(FCanonicalizeAttrs, CostKind);
3115 return LT.first + FCanonicalizeCost * 2;
3116 }
3117 break;
3118 }
3119 case Intrinsic::clmul: {
3120 // This cost model should match the expansion in
3121 // TargetLowering::expandCLMUL.
3122 unsigned BW = RetTy->getScalarSizeInBits();
3123 InstructionCost AndCost =
3124 thisT()->getArithmeticInstrCost(Instruction::And, RetTy, CostKind);
3125 InstructionCost OrCost =
3126 thisT()->getArithmeticInstrCost(Instruction::Or, RetTy, CostKind);
3127 InstructionCost XorCost =
3128 thisT()->getArithmeticInstrCost(Instruction::Xor, RetTy, CostKind);
3129 InstructionCost MulCost =
3130 thisT()->getArithmeticInstrCost(Instruction::Mul, RetTy, CostKind);
3131
3132 // When the multiplication with holes approach is used, that emits 16
3133 // MULs, 8 + 4 ANDs, 12 XORs and 3 ORs.
3134 if (BW >= 32 && BW <= 64 &&
3136 TLI->getValueType(DL, RetTy))) {
3137 return 16 * MulCost + 12 * AndCost + 12 * XorCost + 3 * OrCost;
3138 }
3139
3140 InstructionCost PerBitCostMul = AndCost + MulCost + XorCost;
3141 InstructionCost PerBitCostBittest =
3142 AndCost +
3143 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, RetTy,
3145 thisT()->getCmpSelInstrCost(Instruction::ICmp, RetTy, RetTy,
3147 InstructionCost PerBitCost = std::min(PerBitCostMul, PerBitCostBittest);
3148 return BW * PerBitCost;
3149 }
3150 case Intrinsic::smulh:
3151 case Intrinsic::umulh: {
3152 unsigned BW = RetTy->getScalarSizeInBits();
3153 Type *WideTy = RetTy->getWithNewBitWidth(BW * 2);
3154 bool IsSigned = IID == Intrinsic::smulh;
3155 unsigned ExtOp = IsSigned ? Instruction::SExt : Instruction::ZExt;
3157 Cost +=
3158 2 * thisT()->getCastInstrCost(ExtOp, WideTy, RetTy,
3160 Cost +=
3161 thisT()->getArithmeticInstrCost(Instruction::Mul, WideTy, CostKind);
3162 Cost += thisT()->getArithmeticInstrCost(
3163 Instruction::LShr, WideTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
3165 Cost += thisT()->getCastInstrCost(Instruction::Trunc, RetTy, WideTy,
3167 return Cost;
3168 }
3169 default:
3170 break;
3171 }
3172
3173 // Else, assume that we need to scalarize this intrinsic. For math builtins
3174 // this will emit a costly libcall, adding call overhead and spills. Make it
3175 // very expensive.
3176 if (isVectorizedTy(RetTy)) {
3177 ArrayRef<Type *> RetVTys = getContainedTypes(RetTy);
3178
3179 // Scalable vectors cannot be scalarized, so return Invalid.
3180 if (any_of(concat<Type *const>(RetVTys, Tys),
3181 [](Type *Ty) { return isa<ScalableVectorType>(Ty); }))
3183
3184 InstructionCost ScalarizationCost = ScalarizationCostPassed;
3185 if (!SkipScalarizationCost) {
3186 ScalarizationCost = 0;
3187 for (Type *RetVTy : RetVTys) {
3188 ScalarizationCost += getScalarizationOverhead(
3189 cast<VectorType>(RetVTy), /*Insert=*/true,
3190 /*Extract=*/false, CostKind);
3191 }
3192 }
3193
3194 unsigned ScalarCalls = getVectorizedTypeVF(RetTy).getFixedValue();
3195 SmallVector<Type *, 4> ScalarTys;
3196 for (Type *Ty : Tys) {
3197 if (Ty->isVectorTy())
3198 Ty = Ty->getScalarType();
3199 ScalarTys.push_back(Ty);
3200 }
3201 IntrinsicCostAttributes Attrs(IID, toScalarizedTy(RetTy), ScalarTys, FMF);
3202 InstructionCost ScalarCost =
3203 thisT()->getIntrinsicInstrCost(Attrs, CostKind);
3204 for (Type *Ty : Tys) {
3205 if (auto *VTy = dyn_cast<VectorType>(Ty)) {
3206 if (!ICA.skipScalarizationCost())
3207 ScalarizationCost += getScalarizationOverhead(
3208 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
3209 ScalarCalls = std::max(ScalarCalls,
3210 cast<FixedVectorType>(VTy)->getNumElements());
3211 }
3212 }
3213 return ScalarCalls * ScalarCost + ScalarizationCost;
3214 }
3215
3216 // This is going to be turned into a library call, make it expensive.
3217 return SingleCallCost;
3218 }
3219
3220 /// Get memory intrinsic cost based on arguments.
3223 TTI::TargetCostKind CostKind) const override {
3224 unsigned Id = MICA.getID();
3225 Type *DataTy = MICA.getDataType();
3226 bool VariableMask = MICA.getVariableMask();
3227 Align Alignment = MICA.getAlignment();
3228
3229 switch (Id) {
3230 case Intrinsic::experimental_vp_strided_load:
3231 case Intrinsic::experimental_vp_strided_store: {
3232 unsigned Opcode = Id == Intrinsic::experimental_vp_strided_load
3233 ? Instruction::Load
3234 : Instruction::Store;
3235 // For a target without strided memory operations (or for an illegal
3236 // operation type on one which does), assume we lower to a gather/scatter
3237 // operation. (Which may in turn be scalarized.)
3238 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3239 VariableMask, true, CostKind);
3240 }
3241 case Intrinsic::masked_scatter:
3242 case Intrinsic::masked_gather:
3243 case Intrinsic::vp_scatter:
3244 case Intrinsic::vp_gather: {
3245 unsigned Opcode = (MICA.getID() == Intrinsic::masked_gather ||
3246 MICA.getID() == Intrinsic::vp_gather)
3247 ? Instruction::Load
3248 : Instruction::Store;
3249
3250 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3251 VariableMask, true, CostKind);
3252 }
3253 case Intrinsic::vp_load:
3254 case Intrinsic::vp_store:
3256 case Intrinsic::masked_load:
3257 case Intrinsic::masked_store: {
3258 unsigned Opcode =
3259 Id == Intrinsic::masked_load ? Instruction::Load : Instruction::Store;
3260 // TODO: Pass on AddressSpace when we have test coverage.
3261 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment, true, false,
3262 CostKind);
3263 }
3264 case Intrinsic::masked_compressstore:
3265 case Intrinsic::masked_expandload: {
3266 unsigned Opcode = MICA.getID() == Intrinsic::masked_expandload
3267 ? Instruction::Load
3268 : Instruction::Store;
3269 // Treat expand load/compress store as gather/scatter operation.
3270 // TODO: implement more precise cost estimation for these intrinsics.
3271 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3272 VariableMask,
3273 /*IsGatherScatter*/ true, CostKind);
3274 }
3275 case Intrinsic::vp_load_ff:
3277 default:
3278 llvm_unreachable("unexpected intrinsic");
3279 }
3280 }
3281
3282 /// Compute a cost of the given call instruction.
3283 ///
3284 /// Compute the cost of calling function F with return type RetTy and
3285 /// argument types Tys. F might be nullptr, in this case the cost of an
3286 /// arbitrary call with the specified signature will be returned.
3287 /// This is used, for instance, when we estimate call of a vector
3288 /// counterpart of the given function.
3289 /// \param F Called function, might be nullptr.
3290 /// \param RetTy Return value types.
3291 /// \param Tys Argument types.
3292 /// \returns The cost of Call instruction.
3295 TTI::TargetCostKind CostKind) const override {
3296 return 10;
3297 }
3298
3299 unsigned getNumberOfParts(Type *Tp) const override {
3300 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Tp);
3301 if (!LT.first.isValid())
3302 return 0;
3303 // Try to find actual number of parts for non-power-of-2 elements as
3304 // ceil(num-of-elements/num-of-subtype-elements).
3305 if (auto *FTp = dyn_cast<FixedVectorType>(Tp);
3306 FTp && LT.second.isFixedLengthVector() &&
3307 !has_single_bit(FTp->getNumElements())) {
3308 if (auto *SubTp = dyn_cast_if_present<FixedVectorType>(
3309 EVT(LT.second).getTypeForEVT(Tp->getContext()));
3310 SubTp && SubTp->getElementType() == FTp->getElementType())
3311 return divideCeil(FTp->getNumElements(), SubTp->getNumElements());
3312 }
3313 return LT.first.getValue();
3314 }
3315
3318 TTI::TargetCostKind) const override {
3319 return 0;
3320 }
3321
3322 /// Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
3323 /// We're assuming that reduction operation are performing the following way:
3324 ///
3325 /// %val1 = shufflevector<n x t> %val, <n x t> %undef,
3326 /// <n x i32> <i32 n/2, i32 n/2 + 1, ..., i32 n, i32 undef, ..., i32 undef>
3327 /// \----------------v-------------/ \----------v------------/
3328 /// n/2 elements n/2 elements
3329 /// %red1 = op <n x t> %val, <n x t> val1
3330 /// After this operation we have a vector %red1 where only the first n/2
3331 /// elements are meaningful, the second n/2 elements are undefined and can be
3332 /// dropped. All other operations are actually working with the vector of
3333 /// length n/2, not n, though the real vector length is still n.
3334 /// %val2 = shufflevector<n x t> %red1, <n x t> %undef,
3335 /// <n x i32> <i32 n/4, i32 n/4 + 1, ..., i32 n/2, i32 undef, ..., i32 undef>
3336 /// \----------------v-------------/ \----------v------------/
3337 /// n/4 elements 3*n/4 elements
3338 /// %red2 = op <n x t> %red1, <n x t> val2 - working with the vector of
3339 /// length n/2, the resulting vector has length n/4 etc.
3340 ///
3341 /// The cost model should take into account that the actual length of the
3342 /// vector is reduced on each iteration.
3345 // Targets must implement a default value for the scalable case, since
3346 // we don't know how many lanes the vector has.
3349
3350 Type *ScalarTy = Ty->getElementType();
3351 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
3352 if ((Opcode == Instruction::Or || Opcode == Instruction::And) &&
3353 ScalarTy == IntegerType::getInt1Ty(Ty->getContext()) &&
3354 NumVecElts >= 2) {
3355 // Or reduction for i1 is represented as:
3356 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
3357 // %res = cmp ne iReduxWidth %val, 0
3358 // And reduction for i1 is represented as:
3359 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
3360 // %res = cmp eq iReduxWidth %val, 11111
3361 Type *ValTy = IntegerType::get(Ty->getContext(), NumVecElts);
3362 return thisT()->getCastInstrCost(Instruction::BitCast, ValTy, Ty,
3364 thisT()->getCmpSelInstrCost(Instruction::ICmp, ValTy,
3367 }
3368 unsigned NumReduxLevels = Log2_32(NumVecElts);
3369 InstructionCost ArithCost = 0;
3370 InstructionCost ShuffleCost = 0;
3371 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
3372 unsigned LongVectorCount = 0;
3373 unsigned MVTLen =
3374 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
3375 while (NumVecElts > MVTLen) {
3376 NumVecElts /= 2;
3377 VectorType *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
3378 ShuffleCost += thisT()->getShuffleCost(
3379 TTI::SK_ExtractSubvector, SubTy, Ty, CostKind, {}, NumVecElts, SubTy);
3380 ArithCost += thisT()->getArithmeticInstrCost(Opcode, SubTy, CostKind);
3381 Ty = SubTy;
3382 ++LongVectorCount;
3383 }
3384
3385 NumReduxLevels -= LongVectorCount;
3386
3387 // The minimal length of the vector is limited by the real length of vector
3388 // operations performed on the current platform. That's why several final
3389 // reduction operations are performed on the vectors with the same
3390 // architecture-dependent length.
3391
3392 // By default reductions need one shuffle per reduction level.
3393 ShuffleCost +=
3394 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
3395 Ty, CostKind, {}, 0, Ty);
3396 ArithCost +=
3397 NumReduxLevels * thisT()->getArithmeticInstrCost(Opcode, Ty, CostKind);
3398 return ShuffleCost + ArithCost +
3399 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
3400 CostKind, 0, nullptr, nullptr);
3401 }
3402
3403 /// Try to calculate the cost of performing strict (in-order) reductions,
3404 /// which involves doing a sequence of floating point additions in lane
3405 /// order, starting with an initial value. For example, consider a scalar
3406 /// initial value 'InitVal' of type float and a vector of type <4 x float>:
3407 ///
3408 /// Vector = <float %v0, float %v1, float %v2, float %v3>
3409 ///
3410 /// %add1 = %InitVal + %v0
3411 /// %add2 = %add1 + %v1
3412 /// %add3 = %add2 + %v2
3413 /// %add4 = %add3 + %v3
3414 ///
3415 /// As a simple estimate we can say the cost of such a reduction is 4 times
3416 /// the cost of a scalar FP addition. We can only estimate the costs for
3417 /// fixed-width vectors here because for scalable vectors we do not know the
3418 /// runtime number of operations.
3421 // Targets must implement a default value for the scalable case, since
3422 // we don't know how many lanes the vector has.
3425
3426 auto *VTy = cast<FixedVectorType>(Ty);
3428 VTy, /*Insert=*/false, /*Extract=*/true, CostKind);
3429 InstructionCost ArithCost = thisT()->getArithmeticInstrCost(
3430 Opcode, VTy->getElementType(), CostKind);
3431 ArithCost *= VTy->getNumElements();
3432
3433 return ExtractCost + ArithCost;
3434 }
3435
3438 std::optional<FastMathFlags> FMF,
3439 TTI::TargetCostKind CostKind) const override {
3440 assert(Ty && "Unknown reduction vector type");
3442 return getOrderedReductionCost(Opcode, Ty, CostKind);
3443 return getTreeReductionCost(Opcode, Ty, CostKind);
3444 }
3445
3446 /// Try to calculate op costs for min/max reduction operations.
3447 /// \param CondTy Conditional type for the Select instruction.
3450 TTI::TargetCostKind CostKind) const override {
3451 // Targets must implement a default value for the scalable case, since
3452 // we don't know how many lanes the vector has.
3455
3456 Type *ScalarTy = Ty->getElementType();
3457 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
3458 unsigned NumReduxLevels = Log2_32(NumVecElts);
3459 InstructionCost MinMaxCost = 0;
3460 InstructionCost ShuffleCost = 0;
3461 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
3462 unsigned LongVectorCount = 0;
3463 unsigned MVTLen =
3464 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
3465 while (NumVecElts > MVTLen) {
3466 NumVecElts /= 2;
3467 auto *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
3468
3469 ShuffleCost += thisT()->getShuffleCost(
3470 TTI::SK_ExtractSubvector, SubTy, Ty, CostKind, {}, NumVecElts, SubTy);
3471
3472 IntrinsicCostAttributes Attrs(IID, SubTy, {SubTy, SubTy}, FMF);
3473 MinMaxCost += getIntrinsicInstrCost(Attrs, CostKind);
3474 Ty = SubTy;
3475 ++LongVectorCount;
3476 }
3477
3478 NumReduxLevels -= LongVectorCount;
3479
3480 // The minimal length of the vector is limited by the real length of vector
3481 // operations performed on the current platform. That's why several final
3482 // reduction opertions are perfomed on the vectors with the same
3483 // architecture-dependent length.
3484 ShuffleCost +=
3485 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
3486 Ty, CostKind, {}, 0, Ty);
3487 IntrinsicCostAttributes Attrs(IID, Ty, {Ty, Ty}, FMF);
3488 MinMaxCost += NumReduxLevels * getIntrinsicInstrCost(Attrs, CostKind);
3489 // The last min/max should be in vector registers and we counted it above.
3490 // So just need a single extractelement.
3491 return ShuffleCost + MinMaxCost +
3492 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
3493 CostKind, 0, nullptr, nullptr);
3494 }
3495
3497 getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy,
3498 VectorType *Ty, std::optional<FastMathFlags> FMF,
3499 TTI::TargetCostKind CostKind) const override {
3500 if (auto *FTy = dyn_cast<FixedVectorType>(Ty);
3501 FTy && IsUnsigned && Opcode == Instruction::Add &&
3502 FTy->getElementType() == IntegerType::getInt1Ty(Ty->getContext())) {
3503 // Represent vector_reduce_add(ZExt(<n x i1>)) as
3504 // ZExtOrTrunc(ctpop(bitcast <n x i1> to in)).
3505 auto *IntTy =
3506 IntegerType::get(ResTy->getContext(), FTy->getNumElements());
3507 IntrinsicCostAttributes ICA(Intrinsic::ctpop, IntTy, {IntTy},
3508 FMF ? *FMF : FastMathFlags());
3509 return thisT()->getCastInstrCost(Instruction::BitCast, IntTy, FTy,
3511 thisT()->getIntrinsicInstrCost(ICA, CostKind);
3512 }
3513 // Without any native support, this is equivalent to the cost of
3514 // vecreduce.opcode(ext(Ty A)).
3515 VectorType *ExtTy = VectorType::get(ResTy, Ty);
3516 InstructionCost RedCost =
3517 thisT()->getArithmeticReductionCost(Opcode, ExtTy, FMF, CostKind);
3518 InstructionCost ExtCost = thisT()->getCastInstrCost(
3519 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
3521
3522 return RedCost + ExtCost;
3523 }
3524
3526 getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy,
3527 VectorType *Ty,
3528 TTI::TargetCostKind CostKind) const override {
3529 // Without any native support, this is equivalent to the cost of
3530 // vecreduce.add(mul(ext(Ty A), ext(Ty B))) or
3531 // vecreduce.add(mul(A, B)).
3532 assert((RedOpcode == Instruction::Add || RedOpcode == Instruction::Sub) &&
3533 "The reduction opcode is expected to be Add or Sub.");
3534 VectorType *ExtTy = VectorType::get(ResTy, Ty);
3535 InstructionCost RedCost = thisT()->getArithmeticReductionCost(
3536 RedOpcode, ExtTy, std::nullopt, CostKind);
3537 InstructionCost ExtCost = thisT()->getCastInstrCost(
3538 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
3540
3541 InstructionCost MulCost =
3542 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
3543
3544 return RedCost + MulCost + 2 * ExtCost;
3545 }
3546
3548 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
3550 TTI::PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
3552 std::optional<FastMathFlags> FMF) const override {
3553 unsigned EltSizeAcc = AccumType->getScalarSizeInBits();
3554 unsigned EltSizeInA = InputTypeA->getScalarSizeInBits();
3555 unsigned Ratio = EltSizeAcc / EltSizeInA;
3556 if (VF.getKnownMinValue() <= Ratio || VF.getKnownMinValue() % Ratio != 0 ||
3557 EltSizeAcc % EltSizeInA != 0 || (BinOp && InputTypeA != InputTypeB))
3559
3560 Type *InputVectorType = VectorType::get(InputTypeA, VF);
3561 Type *ExtInputVectorType = VectorType::get(AccumType, VF);
3562 Type *AccumVectorType =
3563 VectorType::get(AccumType, VF.divideCoefficientBy(Ratio));
3564
3565 InstructionCost ExtendCostA = 0;
3567 ExtendCostA = getCastInstrCost(
3569 ExtInputVectorType, InputVectorType, TTI::CastContextHint::None,
3570 CostKind);
3571
3572 // TODO: add cost of extracting subvectors from the source vector that
3573 // is to be partially reduced.
3574 InstructionCost ReductionOpCost =
3575 Ratio * getArithmeticInstrCost(Opcode, AccumVectorType, CostKind);
3576
3577 if (!BinOp)
3578 return ExtendCostA + ReductionOpCost;
3579
3580 InstructionCost ExtendCostB = 0;
3582 ExtendCostB = getCastInstrCost(
3584 ExtInputVectorType, InputVectorType, TTI::CastContextHint::None,
3585 CostKind);
3586 return ExtendCostA + ExtendCostB + ReductionOpCost +
3587 getArithmeticInstrCost(*BinOp, ExtInputVectorType, CostKind);
3588 }
3589
3591
3592 /// @}
3593};
3594
3595/// Concrete BasicTTIImpl that can be used if no further customization
3596/// is needed.
3597class BasicTTIImpl : public BasicTTIImplBase<BasicTTIImpl> {
3598 using BaseT = BasicTTIImplBase<BasicTTIImpl>;
3599
3600 friend class BasicTTIImplBase<BasicTTIImpl>;
3601
3602 const TargetSubtargetInfo *ST;
3603 const TargetLoweringBase *TLI;
3604
3605 const TargetSubtargetInfo *getST() const { return ST; }
3606 const TargetLoweringBase *getTLI() const { return TLI; }
3607
3608public:
3609 LLVM_ABI explicit BasicTTIImpl(const TargetMachine *TM, const Function &F);
3610};
3611
3612} // end namespace llvm
3613
3614#endif // LLVM_CODEGEN_BASICTTIIMPL_H
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
unsigned Imm
unsigned uint64_t
This file implements a class to represent arbitrary precision integral constant values and operations...
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
#define X(NUM, ENUM, NAME)
Definition ELF.h:857
This file implements the BitVector class.
static GCRegistry::Add< ShadowStackGC > C("shadow-stack", "Very portable GC for uncooperative code generators")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
#define LLVM_ABI
Definition Compiler.h:215
This file contains the declarations for the subclasses of Constant, which represent the different fla...
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]
#define F(x, y, z)
Definition MD5.cpp:54
#define I(x, y, z)
Definition MD5.cpp:57
static const Function * getCalledFunction(const Value *V)
#define T
ConstantRange Range(APInt(BitWidth, Low), APInt(BitWidth, High))
uint64_t IntrinsicInst * II
#define P(N)
SI Fold Operands
This file contains some templates that are useful if you are working with the STL at all.
This file defines the SmallPtrSet class.
This file defines the SmallVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static SymbolRef::Type getType(const Symbol *Sym)
Definition TapiFile.cpp:39
This file describes how to lower LLVM code to machine code.
This file provides helpers for the implementation of a TargetTransformInfo-conforming class.
This pass exposes codegen information to IR-level passes.
Class for arbitrary precision integers.
Definition APInt.h:78
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
Definition APInt.h:230
void setBit(unsigned BitPosition)
Set the given bit to 1 whose position is given as "bitPosition".
Definition APInt.h:1350
bool sgt(const APInt &RHS) const
Signed greater than comparison.
Definition APInt.h:1205
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition APInt.h:1508
bool slt(const APInt &RHS) const
Signed less than comparison.
Definition APInt.h:1134
static APInt getZero(unsigned numBits)
Get the '0' value for the specified bit-width.
Definition APInt.h:196
an instruction to allocate memory on the stack
Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition ArrayRef.h:40
ArrayRef< T > drop_front(size_t N=1) const
Drop the first N elements of the array.
Definition ArrayRef.h:194
size_t size() const
Get the array size.
Definition ArrayRef.h:141
ArrayRef< T > drop_back(size_t N=1) const
Drop the last N elements of the array.
Definition ArrayRef.h:200
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
Definition BasicBlock.h:62
InstructionCost getFPOpCost(Type *Ty) const override
bool preferToKeepConstantsAttached(const Instruction &Inst, const Function &Fn) const override
InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false) const override
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind) const override
Try to calculate op costs for min/max reduction operations.
bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty) const override
unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const override
InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const override
bool shouldBuildLookupTables() const override
bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override
bool isProfitableToHoist(Instruction *I) const override
unsigned getNumberOfParts(Type *Tp) const override
unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const override
bool useAA() const override
unsigned getPrefetchDistance() const override
TTI::ShuffleKind improveShuffleKindFromMask(TTI::ShuffleKind Kind, ArrayRef< int > Mask, VectorType *SrcTy, int &Index, VectorType *&SubTy) const
InstructionCost getOperandsScalarizationOverhead(ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
Estimate the overhead of scalarizing an instruction's operands.
bool isLegalAddScalableImmediate(int64_t Imm) const override
bool haveFastClmul(IntegerType *Ty) const override
unsigned getAssumedAddrSpace(const Value *V) const override
std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const override
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace, Instruction *I=nullptr, int64_t ScalableOffset=0) const override
bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override
bool areInlineCompatible(const Function *Caller, const Function *Callee) const override
bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty) const override
bool haveFastSqrt(Type *Ty) const override
bool collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const override
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const override
unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy, Align Alignment, unsigned AddrSpace) const override
Value * rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const override
unsigned adjustInliningThreshold(const CallBase *CB) const override
unsigned getInliningThresholdMultiplier() const override
InstructionCost getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
Estimate the overhead of scalarizing an instruction.
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Scalar, ArrayRef< std::tuple< Value *, User *, int > > ScalarUserAndIdx, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset)
bool shouldBuildRelLookupTables() const override
bool isTargetIntrinsicWithStructReturnOverloadAtField(Intrinsic::ID ID, int RetIdx) const override
InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
InstructionCost getVectorInstrCost(const Instruction &I, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace) const override
unsigned getEpilogueVectorizationMinVF() const override
InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index, TTI::TargetCostKind CostKind) const override
InstructionCost getVectorSplitCost() const
bool isTruncateFree(Type *Ty1, Type *Ty2) const override
unsigned getFlatAddressSpace() const override
InstructionCost getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const override
Compute a cost of the given call instruction.
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const override
InstructionCost getTreeReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
~BasicTTIImplBase() override=default
std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const override
unsigned getMaxPrefetchIterationsAhead() const override
unsigned getMaxInterleaveFactor(ElementCount VF, bool HasUnorderedReductions) const override
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP) const override
InstructionCost getTypeBasedIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
Get intrinsic cost based on argument types.
bool hasBranchDivergence(const Function *F=nullptr) const override
InstructionCost getOrderedReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate the cost of performing strict (in-order) reductions, which involves doing a sequence...
std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const override
bool shouldPrefetchAddressSpace(unsigned AS) const override
bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace, Align Alignment, unsigned *Fast) const override
unsigned getCacheLineSize() const override
std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const override
bool shouldDropLSRSolutionIfLessProfitable() const override
int getInlinerVectorBonusPercent() const override
InstructionCost getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind) const override
InstructionCost getIndexedVectorInstrCostFromEnd(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index) const override
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
std::pair< InstructionCost, MVT > getTypeLegalizationCost(Type *Ty) const
Estimate the cost of type-legalization and the legalized type.
InstructionCost getPartialReductionCost(unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, ElementCount VF, TTI::PartialReductionExtendKind OpAExtend, TTI::PartialReductionExtendKind OpBExtend, std::optional< unsigned > BinOp, TTI::TargetCostKind CostKind, std::optional< FastMathFlags > FMF) const override
bool isLegalAddImmediate(int64_t imm) const override
InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind) const override
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, const Value *Op0, const Value *Op1, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
bool isProfitableLSRChainElement(Instruction *I) const override
bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override
bool isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID, int OpdIdx) const override
bool isTargetIntrinsicWithScalarOpAtArg(Intrinsic::ID ID, unsigned ScalarOpdIdx) const override
std::optional< unsigned > getVScaleForTuning() const override
InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const override
Get intrinsic cost based on arguments.
bool preferTailFoldingOverEpilogue(TailFoldingInfo *TFI) const override
std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const override
InstructionCost getAddressComputationCost(Type *PtrTy, ScalarEvolution *, const SCEV *, TTI::TargetCostKind) const override
bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const override
InstructionCost getScalarizationOverhead(VectorType *RetTy, ArrayRef< const Value * > Args, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const
Estimate the overhead of scalarizing the inputs and outputs of an instruction, with return type RetTy...
TailFoldingStyle getPreferredTailFoldingStyle() const override
std::optional< unsigned > getCacheSize(TargetTransformInfo::CacheLevel Level) const override
bool isLegalICmpImmediate(int64_t imm) const override
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind, Type *AccessType) const override
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const override
unsigned getRegUsageForType(Type *Ty) const override
InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, TTI::TargetCostKind CostKind, ArrayRef< int > Mask, int Index, VectorType *SubTp, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
InstructionCost getMemIntrinsicInstrCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const override
Get memory intrinsic cost based on arguments.
BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
bool isTypeLegal(Type *Ty) const override
bool enableWritePrefetching() const override
bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const override
InstructionCost getScalarizationOverhead(VectorType *InTy, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const
Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
InstructionCost getBranchMispredictPenalty() const override
bool isNumRegsMajorCostOfLSR() const override
LLVM_ABI BasicTTIImpl(const TargetMachine *TM, const Function &F)
size_type count() const
Returns the number of bits which are set.
Definition BitVector.h:181
BitVector & set()
Set all bits in the bitvector.
Definition BitVector.h:366
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
static Type * makeCmpResultType(Type *opnd_type)
Create a result type for fcmp/icmp.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition InstrTypes.h:740
@ ICMP_SLE
signed less or equal
Definition InstrTypes.h:770
@ ICMP_UGT
unsigned greater than
Definition InstrTypes.h:763
@ ICMP_SGT
signed greater than
Definition InstrTypes.h:767
@ ICMP_ULT
unsigned less than
Definition InstrTypes.h:765
@ ICMP_NE
not equal
Definition InstrTypes.h:762
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition InstrTypes.h:750
static CmpInst::Predicate getGTPredicate(Intrinsic::ID ID)
static CmpInst::Predicate getLTPredicate(Intrinsic::ID ID)
This class represents a range of values.
A parsed version of the target data layout string in and methods for querying it.
Definition DataLayout.h:64
constexpr bool isVector() const
One or more elements.
Definition TypeSize.h:320
static constexpr ElementCount getFixed(ScalarTy MinVal)
Definition TypeSize.h:305
constexpr bool isScalar() const
Exactly one element.
Definition TypeSize.h:316
Convenience struct for specifying and reasoning about fast-math flags.
Definition FMF.h:23
Container class for subtarget features.
Class to represent fixed width SIMD vectors.
unsigned getNumElements() const
static LLVM_ABI FixedVectorType * get(Type *ElementType, unsigned NumElts)
Definition Type.cpp:843
AttributeList getAttributes() const
Return the attribute list for this Function.
Definition Function.h:329
The core instruction combiner logic.
static InstructionCost getInvalid(CostType Val=0)
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
Class to represent integer types.
static LLVM_ABI IntegerType * get(LLVMContext &C, unsigned NumBits)
This static method is the primary way of constructing an IntegerType.
Definition Type.cpp:338
unsigned getBitWidth() const
Get the number of bits in this IntegerType.
const SmallVectorImpl< Type * > & getArgTypes() const
const SmallVectorImpl< const Value * > & getArgs() const
InstructionCost getScalarizationCost() const
const IntrinsicInst * getInst() const
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
Represents a single loop in the control flow graph.
Definition LoopInfo.h:40
const FeatureBitset & getFeatureBits() const
Machine Value Type.
TypeSize getStoreSize() const
Return the number of bytes overwritten by a store of the specified value type.
Information for memory intrinsic cost model.
The optimization diagnostic interface.
LLVM_ABI void emit(DiagnosticInfoOptimizationBase &OptDiag)
Output the remark via the diagnostic handler and to the optimization record file.
Diagnostic information for applied optimization remarks.
static LLVM_ABI PointerType * get(LLVMContext &C, unsigned AddressSpace)
This constructs an opaque pointer to an object in a numbered address space.
Definition Type.cpp:887
Analysis providing profile information.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
static LLVM_ABI bool isZeroEltSplatMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses all elements with the same value as the first element of exa...
static LLVM_ABI bool isSpliceMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is a splice mask, concatenating the two inputs together and then ext...
static LLVM_ABI bool isSelectMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses elements from its source vectors without lane crossings.
static LLVM_ABI bool isExtractSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is an extract subvector mask.
static LLVM_ABI bool isReverseMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask swaps the order of elements from exactly one source vector.
static LLVM_ABI bool isTransposeMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask is a transpose mask.
static LLVM_ABI bool isInsertSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &NumSubElts, int &Index)
Return true if this shuffle mask is an insert subvector mask.
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
Definition TypeSize.h:30
static StackOffset getScalable(int64_t Scalable)
Definition TypeSize.h:40
static StackOffset getFixed(int64_t Fixed)
Definition TypeSize.h:39
static LLVM_ABI StructType * create(LLVMContext &Context, StringRef Name)
This creates an identified struct.
Definition Type.cpp:662
Multiway switch.
Provides information about what library functions are available for the current target.
This base class for TargetLowering contains the SelectionDAG-independent parts that can be used from ...
bool isOperationExpand(unsigned Op, EVT VT) const
Return true if the specified operation is illegal on this target or unlikely to be made legal with cu...
int InstructionOpcodeToISD(unsigned Opcode) const
Get the ISD node that corresponds to the Instruction class opcode.
EVT getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const
Return the EVT corresponding to this LLVM type.
LegalizeAction
This enum indicates whether operations are valid for a target, and if not, what action should be used...
virtual bool preferSelectsOverBooleanArithmetic(EVT VT) const
Should we prefer selects to doing arithmetic on boolean types.
virtual bool isZExtFree(Type *FromTy, Type *ToTy) const
Return true if any actual instruction that defines a value of type FromTy implicitly zero-extends the...
virtual bool isSuitableForJumpTable(const SwitchInst *SI, uint64_t NumCases, uint64_t Range, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const
Return true if lowering to a jump table is suitable for a set of case clusters which may contain NumC...
virtual bool areJTsAllowed(const Function *Fn) const
Return true if lowering to a jump table is allowed.
bool isOperationLegalOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal using promotion.
LegalizeAction getTruncStoreAction(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace) const
Return how this store with truncation should be treated: either it is legal, needs to be promoted to ...
bool isOperationCustom(unsigned Op, EVT VT) const
Return true if the operation uses custom lowering, regardless of whether the type is legal or not.
bool isSuitableForBitTests(const DenseMap< const BasicBlock *, unsigned int > &DestCmps, const APInt &Low, const APInt &High, const DataLayout &DL) const
Return true if lowering to a bit test is suitable for a set of case clusters which contains NumDests ...
virtual bool isTruncateFree(Type *FromTy, Type *ToTy) const
Return true if it's free to truncate a value of type FromTy to type ToTy.
bool isTypeLegal(EVT VT) const
Return true if the target has native support for the specified value type.
virtual bool isFreeAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const
Returns true if a cast from SrcAS to DestAS is "cheap", such that e.g.
bool isOperationLegal(unsigned Op, EVT VT) const
Return true if the specified operation is legal on this target.
bool isOperationLegalOrCustom(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
LegalizeAction getLoadAction(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace, unsigned ExtType, bool Atomic) const
Return how this load with extension should be treated: either it is legal, needs to be promoted to a ...
LegalizeKind getTypeConversion(LLVMContext &Context, EVT VT) const
Return pair that represents the legalization kind (first) that needs to happen to EVT (second) in ord...
LegalizeTypeAction getTypeAction(LLVMContext &Context, EVT VT) const
Return how we should legalize values of this type, either it is already legal (return 'Legal') or we ...
bool isLoadLegal(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace, unsigned ExtType, bool Atomic) const
Return true if the specified load with extension is legal on this target.
virtual bool isFAbsFree(EVT VT) const
Return true if an fabs operation is free to the point where it is never worthwhile to replace it with...
bool isOperationLegalOrCustomOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
std::pair< LegalizeTypeAction, EVT > LegalizeKind
LegalizeKind holds the legalization kind that needs to happen to EVT in order to type-legalize it.
Primary interface to the complete machine description for the target machine.
bool isPositionIndependent() const
const Triple & getTargetTriple() const
virtual const TargetSubtargetInfo * getSubtargetImpl(const Function &) const
Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInf...
CodeModel::Model getCodeModel() const
Returns the code model.
TargetSubtargetInfo - Generic base class for all target subtargets.
virtual const FeatureBitset & getInlineMustMatchFeatures() const =0
Target features where all mismatches prevent inlining.
virtual const FeatureBitset & getInlineInverseFeatures() const =0
Target features where the callee may have an additional feature, instead of the caller.
virtual const FeatureBitset & getInlineIgnoreFeatures() const =0
Target features to ignore for inline compatibility check.
virtual bool isProfitableLSRChainElement(Instruction *I) const
virtual TailFoldingStyle getPreferredTailFoldingStyle() const
virtual const DataLayout & getDataLayout() const
virtual std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const
virtual std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const
virtual bool shouldDropLSRSolutionIfLessProfitable() const
virtual bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const
virtual std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const
virtual bool preferTailFoldingOverEpilogue(TailFoldingInfo *TFI) const
virtual std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
virtual unsigned getEpilogueVectorizationMinVF() const
virtual InstructionCost getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const
virtual bool isLoweredToCall(const Function *F) const
virtual InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info, TTI::OperandValueInfo Opd2Info, ArrayRef< const Value * > Args, const Instruction *CxtI=nullptr) const
virtual InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const
virtual bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const
virtual InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I) const
virtual InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
virtual InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info, TTI::OperandValueInfo Op2Info, const Instruction *I) const
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind, Type *AccessType) const override
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
static LLVM_ABI OperandValueInfo getOperandInfo(const Value *V)
Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
TargetCostKind
The kind of cost model.
@ TCK_RecipThroughput
Reciprocal throughput.
@ TCK_CodeSize
Instruction code size.
@ TCK_Latency
The latency of instruction.
static bool requiresOrderedReduction(std::optional< FastMathFlags > FMF)
A helper function to determine the type of reduction algorithm used for a given Opcode and set of Fas...
llvm::VectorInstrContext VectorInstrContext
@ TCC_Expensive
The cost of a 'div' instruction on x86.
@ TCC_Basic
The cost of a typical 'add' instruction.
static LLVM_ABI Instruction::CastOps getOpcodeForPartialReductionExtendKind(PartialReductionExtendKind Kind)
Get the cast opcode for an extension kind.
MemIndexedMode
The type of load/store indexing.
static LLVM_ABI VectorInstrContext getVectorInstrContextHint(const Instruction *I)
Calculates a VectorInstrContext from I.
ShuffleKind
The various kinds of shuffle patterns for vector queries.
@ SK_InsertSubvector
InsertSubvector. Index indicates start offset.
@ SK_Select
Selects elements from the corresponding lane of either source operand.
@ SK_PermuteSingleSrc
Shuffle elements of single source vector with any shuffle mask.
@ SK_Transpose
Transpose two vectors.
@ SK_Splice
Concatenates elements from the first input vector with elements of the second input vector.
@ SK_Broadcast
Broadcast element 0 to all other elements.
@ SK_PermuteTwoSrc
Merge elements from two source vectors into one with any shuffle mask.
@ SK_Reverse
Reverse the order of the vector.
@ SK_ExtractSubvector
ExtractSubvector Index indicates start offset.
CastContextHint
Represents a hint about the context in which a cast is used.
@ None
The cast is not used with a load/store of any kind.
@ Normal
The cast is used with a normal load/store.
CacheLevel
The possible cache levels.
Triple - Helper class for working with autoconf configuration names.
Definition Triple.h:48
ArchType getArch() const
Get the parsed architecture type of this triple.
Definition Triple.h:514
LLVM_ABI bool isArch64Bit() const
Test whether the architecture is 64-bit.
Definition Triple.cpp:1827
bool isOSDarwin() const
Is this a "Darwin" OS (macOS, iOS, tvOS, watchOS, DriverKit, XROS, or bridgeOS).
Definition Triple.h:723
static constexpr TypeSize getFixed(ScalarTy ExactSize)
Definition TypeSize.h:339
The instances of the Type class are immutable: once they are created, they are never changed.
Definition Type.h:46
bool isVectorTy() const
True if this is an instance of VectorType.
Definition Type.h:283
bool isPointerTy() const
True if this is an instance of PointerType.
Definition Type.h:277
LLVM_ABI unsigned getPointerAddressSpace() const
Get the address space of this pointer or pointer vector type.
static LLVM_ABI IntegerType * getInt8Ty(LLVMContext &C)
Definition Type.cpp:297
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
Definition Type.h:363
LLVM_ABI Type * getWithNewBitWidth(unsigned NewBitWidth) const
Given an integer or vector type, change the lane bitwidth to NewBitwidth, whilst keeping the old numb...
LLVM_ABI Type * getWithNewType(Type *EltTy) const
Given vector type, change the element type, whilst keeping the old number of elements.
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition Type.h:130
LLVM_ABI unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
Definition Type.cpp:222
static LLVM_ABI IntegerType * getInt1Ty(LLVMContext &C)
Definition Type.cpp:296
static LLVM_ABI IntegerType * getIntNTy(LLVMContext &C, unsigned N)
Definition Type.cpp:303
bool isFPOrFPVectorTy() const
Return true if this is a FP type or a vector of FP.
Definition Type.h:222
Type * getContainedType(unsigned i) const
This method is used to implement the type iterator (defined at the end of the file).
Definition Type.h:392
bool isVoidTy() const
Return true if this is 'void'.
Definition Type.h:141
Value * getOperand(unsigned i) const
Definition User.h:207
static LLVM_ABI std::optional< unsigned > getFunctionalOpcodeForVP(Intrinsic::ID ID)
static LLVM_ABI std::optional< Intrinsic::ID > getFunctionalIntrinsicIDForVP(Intrinsic::ID ID)
static LLVM_ABI bool isVPIntrinsic(Intrinsic::ID)
static LLVM_ABI bool isVPReduction(Intrinsic::ID ID)
LLVM Value Representation.
Definition Value.h:75
Type * getType() const
All values are typed, get the type of this value.
Definition Value.h:257
Base class of all SIMD vector types.
static VectorType * getHalfElementsVectorType(VectorType *VTy)
This static method returns a VectorType with half as many elements as the input type and the same ele...
static LLVM_ABI VectorType * get(Type *ElementType, ElementCount EC)
This static method is the primary way to construct an VectorType.
Type * getElementType() const
constexpr ScalarTy getFixedValue() const
Definition TypeSize.h:200
static constexpr bool isKnownLT(const FixedOrScalableQuantity &LHS, const FixedOrScalableQuantity &RHS)
Definition TypeSize.h:216
constexpr bool isScalable() const
Returns whether the quantity is scaled by a runtime quantity (vscale).
Definition TypeSize.h:168
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
Definition TypeSize.h:165
constexpr LeafTy divideCoefficientBy(ScalarTy RHS) const
We do not provide the '/' operator here because division for polynomial types does not work in the sa...
Definition TypeSize.h:252
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
LLVM_ABI APInt ScaleBitMask(const APInt &A, unsigned NewBitWidth, bool MatchAllBits=false)
Splat/Merge neighboring bits to widen/narrow the bitmask represented by.
Definition APInt.cpp:3043
ISD namespace - This namespace contains an enum which represents all of the SelectionDAG node types a...
Definition ISDOpcodes.h:24
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:790
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:395
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:521
@ FMODF
FMODF - Decomposes the operand into integral and fractional parts, each having the same type and sign...
@ FATAN2
FATAN2 - atan2, inspired by libm.
@ FSINCOSPI
FSINCOSPI - Compute both the sine and cosine times pi more accurately than FSINCOS(pi*x),...
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:418
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:750
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:280
@ CLMUL
Carry-less multiplication operations.
Definition ISDOpcodes.h:781
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:353
@ BRIND
BRIND - Indirect branch.
@ BR_JT
BR_JT - Jumptable branch.
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:544
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:375
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:807
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:349
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition ISDOpcodes.h:707
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or maximumNumber on two values,...
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum maximum on two values, following IEEE-754 definition...
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:357
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:730
@ MASKED_UDIV
Masked vector arithmetic that returns poison on disabled lanes.
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:816
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:738
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:956
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:537
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:366
@ FMINIMUMNUM
FMINIMUMNUM/FMAXIMUMNUM - minimumnum/maximumnum that is same with FMINNUM_IEEE and FMAXNUM_IEEE besid...
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
LLVM_ABI bool isTargetIntrinsic(ID IID)
isTargetIntrinsic - Returns true if IID is an intrinsic specific to a certain target.
DiagnosticInfoOptimizationBase::Argument NV
friend class Instruction
Iterator for Instructions in a `BasicBlock.
Definition BasicBlock.h:73
This is an optimization pass for GlobalISel generic memory operations.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1755
LLVM_ABI Intrinsic::ID getMinMaxReductionIntrinsicOp(Intrinsic::ID RdxID)
Returns the min/max intrinsic used when expanding a min/max reduction.
detail::zippy< detail::zip_first, T, U, Args... > zip_equal(T &&t, U &&u, Args &&...args)
zip iterator that assumes that all iteratees have the same length.
Definition STLExtras.h:856
InstructionCost Cost
@ Known
Known to have no common set bits.
auto enumerate(FirstRange &&First, RestRanges &&...Rest)
Given two or more input ranges, returns a new range whose values are tuples (A, B,...
Definition STLExtras.h:2570
Type * toScalarizedTy(Type *Ty)
A helper for converting vectorized types to scalarized (non-vector) types.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
auto dyn_cast_if_present(const Y &Val)
dyn_cast_if_present<X> - Functionally identical to dyn_cast, except that a null (or none in the case ...
Definition Casting.h:732
LLVM_ABI unsigned getArithmeticReductionInstruction(Intrinsic::ID RdxID)
Returns the arithmetic instruction opcode used when expanding a reduction.
bool isVectorizedTy(Type *Ty)
Returns true if Ty is a vector type or a struct of vector types where all vector types share the same...
detail::concat_range< ValueT, RangeTs... > concat(RangeTs &&...Ranges)
Returns a concatenated range across two or more ranges.
Definition STLExtras.h:1167
auto dyn_cast_or_null(const Y &Val)
Definition Casting.h:753
constexpr bool has_single_bit(T Value) noexcept
Definition bit.h:149
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1762
unsigned Log2_32(uint32_t Value)
Return the floor log base 2 of the specified value, -1 if the value is zero.
Definition MathExtras.h:326
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition MathExtras.h:280
ElementCount getVectorizedTypeVF(Type *Ty)
Returns the number of vector elements for a vectorized type.
LLVM_ABI ConstantRange getVScaleRange(const Function *F, unsigned BitWidth)
Determine the possible constant range of vscale with the given bit width, based on the vscale_range f...
class LLVM_GSL_OWNER SmallVector
Forward declaration of SmallVector so that calculateSmallVectorDefaultInlinedElements can reference s...
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
constexpr int PoisonMaskElem
constexpr T divideCeil(U Numerator, V Denominator)
Returns the integer ceil(Numerator / Denominator).
Definition MathExtras.h:389
@ UMin
Unsigned integer min implemented in terms of select(cmp()).
@ UMax
Unsigned integer max implemented in terms of select(cmp()).
@ Fast
Assign the register banks as fast as possible (default).
DWARFExpression::Operation Op
ArrayRef(const T &OneElt) -> ArrayRef< T >
constexpr unsigned BitWidth
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
ArrayRef< Type * > getContainedTypes(Type *const &Ty)
Returns the types contained in Ty.
LLVM_ABI cl::opt< unsigned > PartialUnrollingThreshold
LLVM_ABI bool isVectorizedStructTy(StructType *StructTy)
Returns true if StructTy is an unpacked literal struct where all elements are vectors of matching ele...
#define N
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition Alignment.h:39
Extended Value Type.
Definition ValueTypes.h:35
bool isSimple() const
Test if the given EVT is simple (as opposed to being extended).
Definition ValueTypes.h:145
ElementCount getVectorElementCount() const
Definition ValueTypes.h:373
static LLVM_ABI EVT getEVT(Type *Ty, bool HandleUnknown=false)
Return the value type corresponding to the specified type.
MVT getSimpleVT() const
Return the SimpleValueType held in the specified simple EVT.
Definition ValueTypes.h:339
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
Returns the EVT that represents an integer with the given number of bits.
Definition ValueTypes.h:61
LLVM_ABI Type * getTypeForEVT(LLVMContext &Context) const
This method returns an LLVM type corresponding to the specified EVT.
Attributes of a target dependent hardware loop.
static LLVM_ABI bool hasVectorMaskArgument(RTLIB::LibcallImpl Impl)
Returns true if the function has a vector mask argument, which is assumed to be the last argument.
This represents an addressing mode of: BaseGV + BaseOffs + BaseReg + Scale*ScaleReg + ScalableOffset*...
bool AllowPeeling
Allow peeling off loop iterations.
bool AllowLoopNestsPeeling
Allow peeling off loop iterations for loop nests.
bool PeelProfiledIterations
Allow peeling basing on profile.
unsigned PeelCount
A forced peeling factor (the number of bodied of the original loop that should be peeled off before t...
Parameters that control the generic loop unrolling transformation.
bool UpperBound
Allow using trip count upper bound to unroll loops.
unsigned PartialOptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size, like OptSizeThreshold,...
unsigned PartialThreshold
The cost threshold for the unrolled loop, like Threshold, but used for partial/runtime unrolling (set...
bool Runtime
Allow runtime unrolling (unrolling of loops to expand the size of the loop body even when the number ...
bool Partial
Allow partial unrolling (unrolling of loops to expand the size of the loop body, not only to eliminat...
unsigned OptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size (set to UINT_MAX to disable).