LLVM  13.0.0git
ARCISelLowering.h
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1 //===- ARCISelLowering.h - ARC DAG Lowering Interface -----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the interfaces that ARC uses to lower LLVM code into a
10 // selection DAG.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H
15 #define LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H
16 
17 #include "ARC.h"
20 
21 namespace llvm {
22 
23 // Forward delcarations
24 class ARCSubtarget;
25 class ARCTargetMachine;
26 
27 namespace ARCISD {
28 
29 enum NodeType : unsigned {
30  // Start the numbering where the builtin ops and target ops leave off.
32 
33  // Branch and link (call)
34  BL,
35 
36  // Jump and link (indirect call)
37  JL,
38 
39  // CMP
40  CMP,
41 
42  // CMOV
44 
45  // BRcc
47 
48  // Global Address Wrapper
50 
51  // return, (j_s [blink])
53 };
54 
55 } // end namespace ARCISD
56 
57 //===--------------------------------------------------------------------===//
58 // TargetLowering Implementation
59 //===--------------------------------------------------------------------===//
61 public:
62  explicit ARCTargetLowering(const TargetMachine &TM,
63  const ARCSubtarget &Subtarget);
64 
65  /// Provide custom lowering hooks for some operations.
66  SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
67 
68  /// This method returns the name of a target specific DAG node.
69  const char *getTargetNodeName(unsigned Opcode) const override;
70 
71  /// Return true if the addressing mode represented by AM is legal for this
72  /// target, for a load/store of the specified type.
73  bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
74  unsigned AS,
75  Instruction *I = nullptr) const override;
76 
77 private:
78  const ARCSubtarget &Subtarget;
79 
80  // Lower Operand helpers
81  SDValue LowerCallArguments(SDValue Chain, CallingConv::ID CallConv,
82  bool isVarArg,
84  SDLoc dl, SelectionDAG &DAG,
85  SmallVectorImpl<SDValue> &InVals) const;
86  // Lower Operand specifics
87  SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
88  SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
89  SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
90  SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
91  SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
92  SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
93  SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
94 
95  SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
96  bool isVarArg,
98  const SDLoc &dl, SelectionDAG &DAG,
99  SmallVectorImpl<SDValue> &InVals) const override;
100 
102  SmallVectorImpl<SDValue> &InVals) const override;
103 
104  SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
106  const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
107  SelectionDAG &DAG) const override;
108 
109  bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
110  bool isVarArg,
111  const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
112  LLVMContext &Context) const override;
113 
114  bool mayBeEmittedAsTailCall(const CallInst *CI) const override;
115 };
116 
117 } // end namespace llvm
118 
119 #endif // LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H
llvm
Definition: AllocatorList.h:23
llvm::SDLoc
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Definition: SelectionDAGNodes.h:1078
llvm::DataLayout
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:112
llvm::ARCISD::GAWRAPPER
@ GAWRAPPER
Definition: ARCISelLowering.h:49
llvm::ARCISD::BRcc
@ BRcc
Definition: ARCISelLowering.h:46
llvm::SDNode
Represents one node in the SelectionDAG.
Definition: SelectionDAGNodes.h:455
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:46
llvm::ARCISD::FIRST_NUMBER
@ FIRST_NUMBER
Definition: ARCISelLowering.h:31
SelectionDAG.h
llvm::ARCTargetLowering
Definition: ARCISelLowering.h:60
llvm::ARCISD::BL
@ BL
Definition: ARCISelLowering.h:34
Context
LLVMContext & Context
Definition: NVVMIntrRange.cpp:66
TargetLowering.h
llvm::ARCISD::NodeType
NodeType
Definition: ARCISelLowering.h:29
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:216
llvm::ARCTargetLowering::LowerOperation
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override
Provide custom lowering hooks for some operations.
Definition: ARCISelLowering.cpp:748
llvm::ARCSubtarget
Definition: ARCSubtarget.h:31
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition: TargetLowering.h:3141
llvm::TargetLowering::DAGCombinerInfo
Definition: TargetLowering.h:3489
llvm::Instruction
Definition: Instruction.h:45
llvm::ARCISD::JL
@ JL
Definition: ARCISelLowering.h:37
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::ARCTargetLowering::isLegalAddressingMode
bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AS, Instruction *I=nullptr) const override
Return true if the addressing mode represented by AM is legal for this target, for a load/store of th...
Definition: ARCISelLowering.cpp:698
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:68
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::TargetLowering::CallLoweringInfo
This structure contains all information that is necessary for lowering calls.
Definition: TargetLowering.h:3692
llvm::TargetMachine
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:77
llvm::ARCISD::CMOV
@ CMOV
Definition: ARCISelLowering.h:43
llvm::MachineFunction
Definition: MachineFunction.h:227
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::ISD::BUILTIN_OP_END
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
Definition: ISDOpcodes.h:1235
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:314
llvm::ARCISD::RET
@ RET
Definition: ARCISelLowering.h:52
llvm::ARCTargetLowering::getTargetNodeName
const char * getTargetNodeName(unsigned Opcode) const override
This method returns the name of a target specific DAG node.
Definition: ARCISelLowering.cpp:140
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition: SelectionDAGNodes.h:138
llvm::ARCTargetLowering::ARCTargetLowering
ARCTargetLowering(const TargetMachine &TM, const ARCSubtarget &Subtarget)
Definition: ARCISelLowering.cpp:71
llvm::ARCISD::CMP
@ CMP
Definition: ARCISelLowering.h:40
N
#define N
ARC.h
llvm::TargetLoweringBase::AddrMode
This represents an addressing mode of: BaseGV + BaseOffs + BaseReg + Scale*ScaleReg If BaseGV is null...
Definition: TargetLowering.h:2321
llvm::MipsISD::Ins
@ Ins
Definition: MipsISelLowering.h:157
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:43
llvm::CallInst
This class represents a function call, abstracting a target machine's calling convention.
Definition: Instructions.h:1450