LLVM 17.0.0git
ARCISelLowering.h
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1//===- ARCISelLowering.h - ARC DAG Lowering Interface -----------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines the interfaces that ARC uses to lower LLVM code into a
10// selection DAG.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H
15#define LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H
16
17#include "ARC.h"
20
21namespace llvm {
22
23// Forward delcarations
24class ARCSubtarget;
25class ARCTargetMachine;
26
27namespace ARCISD {
28
29enum NodeType : unsigned {
30 // Start the numbering where the builtin ops and target ops leave off.
32
33 // Branch and link (call)
35
36 // Jump and link (indirect call)
38
39 // CMP
41
42 // CMOV
44
45 // BRcc
47
48 // Global Address Wrapper
50
51 // return, (j_s [blink])
52 RET
53};
54
55} // end namespace ARCISD
56
57//===--------------------------------------------------------------------===//
58// TargetLowering Implementation
59//===--------------------------------------------------------------------===//
61public:
62 explicit ARCTargetLowering(const TargetMachine &TM,
63 const ARCSubtarget &Subtarget);
64
65 /// Provide custom lowering hooks for some operations.
66 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
67
68 /// This method returns the name of a target specific DAG node.
69 const char *getTargetNodeName(unsigned Opcode) const override;
70
71 /// Return true if the addressing mode represented by AM is legal for this
72 /// target, for a load/store of the specified type.
73 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
74 unsigned AS,
75 Instruction *I = nullptr) const override;
76
77private:
78 const ARCSubtarget &Subtarget;
79
80 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
81 SelectionDAG &DAG) const override;
82
83 // Lower Operand helpers
84 SDValue LowerCallArguments(SDValue Chain, CallingConv::ID CallConv,
85 bool isVarArg,
87 SDLoc dl, SelectionDAG &DAG,
88 SmallVectorImpl<SDValue> &InVals) const;
89 // Lower Operand specifics
90 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
91 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
92 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
93 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
94 SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
95 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
96 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
97
98 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
99 bool isVarArg,
101 const SDLoc &dl, SelectionDAG &DAG,
102 SmallVectorImpl<SDValue> &InVals) const override;
103
105 SmallVectorImpl<SDValue> &InVals) const override;
106
107 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
109 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
110 SelectionDAG &DAG) const override;
111
112 bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
113 bool isVarArg,
114 const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
115 LLVMContext &Context) const override;
116
117 bool mayBeEmittedAsTailCall(const CallInst *CI) const override;
118};
119
120} // end namespace llvm
121
122#endif // LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Function Alias Analysis Results
#define I(x, y, z)
Definition: MD5.cpp:58
LLVMContext & Context
const char LLVMTargetMachineRef TM
This file describes how to lower LLVM code to machine code.
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override
Provide custom lowering hooks for some operations.
bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AS, Instruction *I=nullptr) const override
Return true if the addressing mode represented by AM is legal for this target, for a load/store of th...
const char * getTargetNodeName(unsigned Opcode) const override
This method returns the name of a target specific DAG node.
This class represents a function call, abstracting a target machine's calling convention.
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:114
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Represents one node in the SelectionDAG.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:221
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:577
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:78
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
Definition: ISDOpcodes.h:1311
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
#define N
This represents an addressing mode of: BaseGV + BaseOffs + BaseReg + Scale*ScaleReg If BaseGV is null...
This structure contains all information that is necessary for lowering calls.