LLVM  15.0.0git
SelectionDAGNodes.h
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1 //===- llvm/CodeGen/SelectionDAGNodes.h - SelectionDAG Nodes ----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares the SDNode class and derived classes, which are used to
10 // represent the nodes and operations present in a SelectionDAG. These nodes
11 // and operations are machine code level operations, with some similarities to
12 // the GCC RTL representation.
13 //
14 // Clients should include the SelectionDAG.h file instead of this file directly.
15 //
16 //===----------------------------------------------------------------------===//
17 
18 #ifndef LLVM_CODEGEN_SELECTIONDAGNODES_H
19 #define LLVM_CODEGEN_SELECTIONDAGNODES_H
20 
21 #include "llvm/ADT/APFloat.h"
22 #include "llvm/ADT/ArrayRef.h"
23 #include "llvm/ADT/BitVector.h"
24 #include "llvm/ADT/FoldingSet.h"
25 #include "llvm/ADT/GraphTraits.h"
26 #include "llvm/ADT/SmallPtrSet.h"
27 #include "llvm/ADT/SmallVector.h"
28 #include "llvm/ADT/ilist_node.h"
29 #include "llvm/ADT/iterator.h"
33 #include "llvm/CodeGen/Register.h"
35 #include "llvm/IR/Constants.h"
36 #include "llvm/IR/DebugLoc.h"
37 #include "llvm/IR/Instruction.h"
38 #include "llvm/IR/Instructions.h"
39 #include "llvm/IR/Metadata.h"
40 #include "llvm/IR/Operator.h"
41 #include "llvm/Support/AlignOf.h"
43 #include "llvm/Support/Casting.h"
46 #include "llvm/Support/TypeSize.h"
47 #include <algorithm>
48 #include <cassert>
49 #include <climits>
50 #include <cstddef>
51 #include <cstdint>
52 #include <cstring>
53 #include <iterator>
54 #include <string>
55 #include <tuple>
56 
57 namespace llvm {
58 
59 class APInt;
60 class Constant;
61 class GlobalValue;
62 class MachineBasicBlock;
63 class MachineConstantPoolValue;
64 class MCSymbol;
65 class raw_ostream;
66 class SDNode;
67 class SelectionDAG;
68 class Type;
69 class Value;
70 
71 void checkForCycles(const SDNode *N, const SelectionDAG *DAG = nullptr,
72  bool force = false);
73 
74 /// This represents a list of ValueType's that has been intern'd by
75 /// a SelectionDAG. Instances of this simple value class are returned by
76 /// SelectionDAG::getVTList(...).
77 ///
78 struct SDVTList {
79  const EVT *VTs;
80  unsigned int NumVTs;
81 };
82 
83 namespace ISD {
84 
85  /// Node predicates
86 
87 /// If N is a BUILD_VECTOR or SPLAT_VECTOR node whose elements are all the
88 /// same constant or undefined, return true and return the constant value in
89 /// \p SplatValue.
90 bool isConstantSplatVector(const SDNode *N, APInt &SplatValue);
91 
92 /// Return true if the specified node is a BUILD_VECTOR or SPLAT_VECTOR where
93 /// all of the elements are ~0 or undef. If \p BuildVectorOnly is set to
94 /// true, it only checks BUILD_VECTOR.
96  bool BuildVectorOnly = false);
97 
98 /// Return true if the specified node is a BUILD_VECTOR or SPLAT_VECTOR where
99 /// all of the elements are 0 or undef. If \p BuildVectorOnly is set to true, it
100 /// only checks BUILD_VECTOR.
102  bool BuildVectorOnly = false);
103 
104 /// Return true if the specified node is a BUILD_VECTOR where all of the
105 /// elements are ~0 or undef.
106 bool isBuildVectorAllOnes(const SDNode *N);
107 
108 /// Return true if the specified node is a BUILD_VECTOR where all of the
109 /// elements are 0 or undef.
110 bool isBuildVectorAllZeros(const SDNode *N);
111 
112 /// Return true if the specified node is a BUILD_VECTOR node of all
113 /// ConstantSDNode or undef.
115 
116 /// Return true if the specified node is a BUILD_VECTOR node of all
117 /// ConstantFPSDNode or undef.
119 
120 /// Return true if the node has at least one operand and all operands of the
121 /// specified node are ISD::UNDEF.
122 bool allOperandsUndef(const SDNode *N);
123 
124 } // end namespace ISD
125 
126 //===----------------------------------------------------------------------===//
127 /// Unlike LLVM values, Selection DAG nodes may return multiple
128 /// values as the result of a computation. Many nodes return multiple values,
129 /// from loads (which define a token and a return value) to ADDC (which returns
130 /// a result and a carry value), to calls (which may return an arbitrary number
131 /// of values).
132 ///
133 /// As such, each use of a SelectionDAG computation must indicate the node that
134 /// computes it as well as which return value to use from that node. This pair
135 /// of information is represented with the SDValue value type.
136 ///
137 class SDValue {
138  friend struct DenseMapInfo<SDValue>;
139 
140  SDNode *Node = nullptr; // The node defining the value we are using.
141  unsigned ResNo = 0; // Which return value of the node we are using.
142 
143 public:
144  SDValue() = default;
145  SDValue(SDNode *node, unsigned resno);
146 
147  /// get the index which selects a specific result in the SDNode
148  unsigned getResNo() const { return ResNo; }
149 
150  /// get the SDNode which holds the desired result
151  SDNode *getNode() const { return Node; }
152 
153  /// set the SDNode
154  void setNode(SDNode *N) { Node = N; }
155 
156  inline SDNode *operator->() const { return Node; }
157 
158  bool operator==(const SDValue &O) const {
159  return Node == O.Node && ResNo == O.ResNo;
160  }
161  bool operator!=(const SDValue &O) const {
162  return !operator==(O);
163  }
164  bool operator<(const SDValue &O) const {
165  return std::tie(Node, ResNo) < std::tie(O.Node, O.ResNo);
166  }
167  explicit operator bool() const {
168  return Node != nullptr;
169  }
170 
171  SDValue getValue(unsigned R) const {
172  return SDValue(Node, R);
173  }
174 
175  /// Return true if this node is an operand of N.
176  bool isOperandOf(const SDNode *N) const;
177 
178  /// Return the ValueType of the referenced return value.
179  inline EVT getValueType() const;
180 
181  /// Return the simple ValueType of the referenced return value.
183  return getValueType().getSimpleVT();
184  }
185 
186  /// Returns the size of the value in bits.
187  ///
188  /// If the value type is a scalable vector type, the scalable property will
189  /// be set and the runtime size will be a positive integer multiple of the
190  /// base size.
192  return getValueType().getSizeInBits();
193  }
194 
197  }
198 
199  // Forwarding methods - These forward to the corresponding methods in SDNode.
200  inline unsigned getOpcode() const;
201  inline unsigned getNumOperands() const;
202  inline const SDValue &getOperand(unsigned i) const;
203  inline uint64_t getConstantOperandVal(unsigned i) const;
204  inline const APInt &getConstantOperandAPInt(unsigned i) const;
205  inline bool isTargetMemoryOpcode() const;
206  inline bool isTargetOpcode() const;
207  inline bool isMachineOpcode() const;
208  inline bool isUndef() const;
209  inline unsigned getMachineOpcode() const;
210  inline const DebugLoc &getDebugLoc() const;
211  inline void dump() const;
212  inline void dump(const SelectionDAG *G) const;
213  inline void dumpr() const;
214  inline void dumpr(const SelectionDAG *G) const;
215 
216  /// Return true if this operand (which must be a chain) reaches the
217  /// specified operand without crossing any side-effecting instructions.
218  /// In practice, this looks through token factors and non-volatile loads.
219  /// In order to remain efficient, this only
220  /// looks a couple of nodes in, it does not do an exhaustive search.
222  unsigned Depth = 2) const;
223 
224  /// Return true if there are no nodes using value ResNo of Node.
225  inline bool use_empty() const;
226 
227  /// Return true if there is exactly one node using value ResNo of Node.
228  inline bool hasOneUse() const;
229 };
230 
231 template<> struct DenseMapInfo<SDValue> {
232  static inline SDValue getEmptyKey() {
233  SDValue V;
234  V.ResNo = -1U;
235  return V;
236  }
237 
238  static inline SDValue getTombstoneKey() {
239  SDValue V;
240  V.ResNo = -2U;
241  return V;
242  }
243 
244  static unsigned getHashValue(const SDValue &Val) {
245  return ((unsigned)((uintptr_t)Val.getNode() >> 4) ^
246  (unsigned)((uintptr_t)Val.getNode() >> 9)) + Val.getResNo();
247  }
248 
249  static bool isEqual(const SDValue &LHS, const SDValue &RHS) {
250  return LHS == RHS;
251  }
252 };
253 
254 /// Allow casting operators to work directly on
255 /// SDValues as if they were SDNode*'s.
256 template<> struct simplify_type<SDValue> {
257  using SimpleType = SDNode *;
258 
260  return Val.getNode();
261  }
262 };
263 template<> struct simplify_type<const SDValue> {
264  using SimpleType = /*const*/ SDNode *;
265 
266  static SimpleType getSimplifiedValue(const SDValue &Val) {
267  return Val.getNode();
268  }
269 };
270 
271 /// Represents a use of a SDNode. This class holds an SDValue,
272 /// which records the SDNode being used and the result number, a
273 /// pointer to the SDNode using the value, and Next and Prev pointers,
274 /// which link together all the uses of an SDNode.
275 ///
276 class SDUse {
277  /// Val - The value being used.
278  SDValue Val;
279  /// User - The user of this value.
280  SDNode *User = nullptr;
281  /// Prev, Next - Pointers to the uses list of the SDNode referred by
282  /// this operand.
283  SDUse **Prev = nullptr;
284  SDUse *Next = nullptr;
285 
286 public:
287  SDUse() = default;
288  SDUse(const SDUse &U) = delete;
289  SDUse &operator=(const SDUse &) = delete;
290 
291  /// Normally SDUse will just implicitly convert to an SDValue that it holds.
292  operator const SDValue&() const { return Val; }
293 
294  /// If implicit conversion to SDValue doesn't work, the get() method returns
295  /// the SDValue.
296  const SDValue &get() const { return Val; }
297 
298  /// This returns the SDNode that contains this Use.
299  SDNode *getUser() { return User; }
300 
301  /// Get the next SDUse in the use list.
302  SDUse *getNext() const { return Next; }
303 
304  /// Convenience function for get().getNode().
305  SDNode *getNode() const { return Val.getNode(); }
306  /// Convenience function for get().getResNo().
307  unsigned getResNo() const { return Val.getResNo(); }
308  /// Convenience function for get().getValueType().
309  EVT getValueType() const { return Val.getValueType(); }
310 
311  /// Convenience function for get().operator==
312  bool operator==(const SDValue &V) const {
313  return Val == V;
314  }
315 
316  /// Convenience function for get().operator!=
317  bool operator!=(const SDValue &V) const {
318  return Val != V;
319  }
320 
321  /// Convenience function for get().operator<
322  bool operator<(const SDValue &V) const {
323  return Val < V;
324  }
325 
326 private:
327  friend class SelectionDAG;
328  friend class SDNode;
329  // TODO: unfriend HandleSDNode once we fix its operand handling.
330  friend class HandleSDNode;
331 
332  void setUser(SDNode *p) { User = p; }
333 
334  /// Remove this use from its existing use list, assign it the
335  /// given value, and add it to the new value's node's use list.
336  inline void set(const SDValue &V);
337  /// Like set, but only supports initializing a newly-allocated
338  /// SDUse with a non-null value.
339  inline void setInitial(const SDValue &V);
340  /// Like set, but only sets the Node portion of the value,
341  /// leaving the ResNo portion unmodified.
342  inline void setNode(SDNode *N);
343 
344  void addToList(SDUse **List) {
345  Next = *List;
346  if (Next) Next->Prev = &Next;
347  Prev = List;
348  *List = this;
349  }
350 
351  void removeFromList() {
352  *Prev = Next;
353  if (Next) Next->Prev = Prev;
354  }
355 };
356 
357 /// simplify_type specializations - Allow casting operators to work directly on
358 /// SDValues as if they were SDNode*'s.
359 template<> struct simplify_type<SDUse> {
360  using SimpleType = SDNode *;
361 
363  return Val.getNode();
364  }
365 };
366 
367 /// These are IR-level optimization flags that may be propagated to SDNodes.
368 /// TODO: This data structure should be shared by the IR optimizer and the
369 /// the backend.
370 struct SDNodeFlags {
371 private:
372  bool NoUnsignedWrap : 1;
373  bool NoSignedWrap : 1;
374  bool Exact : 1;
375  bool NoNaNs : 1;
376  bool NoInfs : 1;
377  bool NoSignedZeros : 1;
378  bool AllowReciprocal : 1;
379  bool AllowContract : 1;
380  bool ApproximateFuncs : 1;
381  bool AllowReassociation : 1;
382 
383  // We assume instructions do not raise floating-point exceptions by default,
384  // and only those marked explicitly may do so. We could choose to represent
385  // this via a positive "FPExcept" flags like on the MI level, but having a
386  // negative "NoFPExcept" flag here (that defaults to true) makes the flag
387  // intersection logic more straightforward.
388  bool NoFPExcept : 1;
389 
390 public:
391  /// Default constructor turns off all optimization flags.
393  : NoUnsignedWrap(false), NoSignedWrap(false), Exact(false), NoNaNs(false),
394  NoInfs(false), NoSignedZeros(false), AllowReciprocal(false),
395  AllowContract(false), ApproximateFuncs(false),
396  AllowReassociation(false), NoFPExcept(false) {}
397 
398  /// Propagate the fast-math-flags from an IR FPMathOperator.
399  void copyFMF(const FPMathOperator &FPMO) {
400  setNoNaNs(FPMO.hasNoNaNs());
401  setNoInfs(FPMO.hasNoInfs());
407  }
408 
409  // These are mutators for each flag.
410  void setNoUnsignedWrap(bool b) { NoUnsignedWrap = b; }
411  void setNoSignedWrap(bool b) { NoSignedWrap = b; }
412  void setExact(bool b) { Exact = b; }
413  void setNoNaNs(bool b) { NoNaNs = b; }
414  void setNoInfs(bool b) { NoInfs = b; }
415  void setNoSignedZeros(bool b) { NoSignedZeros = b; }
416  void setAllowReciprocal(bool b) { AllowReciprocal = b; }
417  void setAllowContract(bool b) { AllowContract = b; }
418  void setApproximateFuncs(bool b) { ApproximateFuncs = b; }
419  void setAllowReassociation(bool b) { AllowReassociation = b; }
420  void setNoFPExcept(bool b) { NoFPExcept = b; }
421 
422  // These are accessors for each flag.
423  bool hasNoUnsignedWrap() const { return NoUnsignedWrap; }
424  bool hasNoSignedWrap() const { return NoSignedWrap; }
425  bool hasExact() const { return Exact; }
426  bool hasNoNaNs() const { return NoNaNs; }
427  bool hasNoInfs() const { return NoInfs; }
428  bool hasNoSignedZeros() const { return NoSignedZeros; }
429  bool hasAllowReciprocal() const { return AllowReciprocal; }
430  bool hasAllowContract() const { return AllowContract; }
431  bool hasApproximateFuncs() const { return ApproximateFuncs; }
432  bool hasAllowReassociation() const { return AllowReassociation; }
433  bool hasNoFPExcept() const { return NoFPExcept; }
434 
435  /// Clear any flags in this flag set that aren't also set in Flags. All
436  /// flags will be cleared if Flags are undefined.
437  void intersectWith(const SDNodeFlags Flags) {
438  NoUnsignedWrap &= Flags.NoUnsignedWrap;
439  NoSignedWrap &= Flags.NoSignedWrap;
440  Exact &= Flags.Exact;
441  NoNaNs &= Flags.NoNaNs;
442  NoInfs &= Flags.NoInfs;
443  NoSignedZeros &= Flags.NoSignedZeros;
444  AllowReciprocal &= Flags.AllowReciprocal;
445  AllowContract &= Flags.AllowContract;
446  ApproximateFuncs &= Flags.ApproximateFuncs;
447  AllowReassociation &= Flags.AllowReassociation;
448  NoFPExcept &= Flags.NoFPExcept;
449  }
450 };
451 
452 /// Represents one node in the SelectionDAG.
453 ///
454 class SDNode : public FoldingSetNode, public ilist_node<SDNode> {
455 private:
456  /// The operation that this node performs.
457  int16_t NodeType;
458 
459 protected:
460  // We define a set of mini-helper classes to help us interpret the bits in our
461  // SubclassData. These are designed to fit within a uint16_t so they pack
462  // with NodeType.
463 
464 #if defined(_AIX) && (!defined(__GNUC__) || defined(__clang__))
465 // Except for GCC; by default, AIX compilers store bit-fields in 4-byte words
466 // and give the `pack` pragma push semantics.
467 #define BEGIN_TWO_BYTE_PACK() _Pragma("pack(2)")
468 #define END_TWO_BYTE_PACK() _Pragma("pack(pop)")
469 #else
470 #define BEGIN_TWO_BYTE_PACK()
471 #define END_TWO_BYTE_PACK()
472 #endif
473 
476  friend class SDNode;
477  friend class MemIntrinsicSDNode;
478  friend class MemSDNode;
479  friend class SelectionDAG;
480 
481  uint16_t HasDebugValue : 1;
482  uint16_t IsMemIntrinsic : 1;
483  uint16_t IsDivergent : 1;
484  };
485  enum { NumSDNodeBits = 3 };
486 
488  friend class ConstantSDNode;
489 
491 
492  uint16_t IsOpaque : 1;
493  };
494 
496  friend class MemSDNode;
497  friend class MemIntrinsicSDNode;
498  friend class AtomicSDNode;
499 
501 
502  uint16_t IsVolatile : 1;
503  uint16_t IsNonTemporal : 1;
504  uint16_t IsDereferenceable : 1;
505  uint16_t IsInvariant : 1;
506  };
508 
510  friend class LSBaseSDNode;
511  friend class VPBaseLoadStoreSDNode;
512  friend class MaskedLoadStoreSDNode;
514  friend class VPGatherScatterSDNode;
515 
517 
518  // This storage is shared between disparate class hierarchies to hold an
519  // enumeration specific to the class hierarchy in use.
520  // LSBaseSDNode => enum ISD::MemIndexedMode
521  // VPLoadStoreBaseSDNode => enum ISD::MemIndexedMode
522  // MaskedLoadStoreBaseSDNode => enum ISD::MemIndexedMode
523  // VPGatherScatterSDNode => enum ISD::MemIndexType
524  // MaskedGatherScatterSDNode => enum ISD::MemIndexType
526  };
528 
530  friend class LoadSDNode;
531  friend class VPLoadSDNode;
532  friend class VPStridedLoadSDNode;
533  friend class MaskedLoadSDNode;
534  friend class MaskedGatherSDNode;
535  friend class VPGatherSDNode;
536 
538 
539  uint16_t ExtTy : 2; // enum ISD::LoadExtType
540  uint16_t IsExpanding : 1;
541  };
542 
544  friend class StoreSDNode;
545  friend class VPStoreSDNode;
546  friend class VPStridedStoreSDNode;
547  friend class MaskedStoreSDNode;
548  friend class MaskedScatterSDNode;
549  friend class VPScatterSDNode;
550 
552 
553  uint16_t IsTruncating : 1;
554  uint16_t IsCompressing : 1;
555  };
556 
557  union {
558  char RawSDNodeBits[sizeof(uint16_t)];
565  };
567 #undef BEGIN_TWO_BYTE_PACK
568 #undef END_TWO_BYTE_PACK
569 
570  // RawSDNodeBits must cover the entirety of the union. This means that all of
571  // the union's members must have size <= RawSDNodeBits. We write the RHS as
572  // "2" instead of sizeof(RawSDNodeBits) because MSVC can't handle the latter.
573  static_assert(sizeof(SDNodeBitfields) <= 2, "field too wide");
574  static_assert(sizeof(ConstantSDNodeBitfields) <= 2, "field too wide");
575  static_assert(sizeof(MemSDNodeBitfields) <= 2, "field too wide");
576  static_assert(sizeof(LSBaseSDNodeBitfields) <= 2, "field too wide");
577  static_assert(sizeof(LoadSDNodeBitfields) <= 2, "field too wide");
578  static_assert(sizeof(StoreSDNodeBitfields) <= 2, "field too wide");
579 
580 private:
581  friend class SelectionDAG;
582  // TODO: unfriend HandleSDNode once we fix its operand handling.
583  friend class HandleSDNode;
584 
585  /// Unique id per SDNode in the DAG.
586  int NodeId = -1;
587 
588  /// The values that are used by this operation.
589  SDUse *OperandList = nullptr;
590 
591  /// The types of the values this node defines. SDNode's may
592  /// define multiple values simultaneously.
593  const EVT *ValueList;
594 
595  /// List of uses for this SDNode.
596  SDUse *UseList = nullptr;
597 
598  /// The number of entries in the Operand/Value list.
599  unsigned short NumOperands = 0;
600  unsigned short NumValues;
601 
602  // The ordering of the SDNodes. It roughly corresponds to the ordering of the
603  // original LLVM instructions.
604  // This is used for turning off scheduling, because we'll forgo
605  // the normal scheduling algorithms and output the instructions according to
606  // this ordering.
607  unsigned IROrder;
608 
609  /// Source line information.
610  DebugLoc debugLoc;
611 
612  /// Return a pointer to the specified value type.
613  static const EVT *getValueTypeList(EVT VT);
614 
615  SDNodeFlags Flags;
616 
617 public:
618  /// Unique and persistent id per SDNode in the DAG. Used for debug printing.
619  /// We do not place that under `#if LLVM_ENABLE_ABI_BREAKING_CHECKS`
620  /// intentionally because it adds unneeded complexity without noticeable
621  /// benefits (see discussion with @thakis in D120714).
623 
624  //===--------------------------------------------------------------------===//
625  // Accessors
626  //
627 
628  /// Return the SelectionDAG opcode value for this node. For
629  /// pre-isel nodes (those for which isMachineOpcode returns false), these
630  /// are the opcode values in the ISD and <target>ISD namespaces. For
631  /// post-isel opcodes, see getMachineOpcode.
632  unsigned getOpcode() const { return (unsigned short)NodeType; }
633 
634  /// Test if this node has a target-specific opcode (in the
635  /// <target>ISD namespace).
636  bool isTargetOpcode() const { return NodeType >= ISD::BUILTIN_OP_END; }
637 
638  /// Test if this node has a target-specific opcode that may raise
639  /// FP exceptions (in the <target>ISD namespace and greater than
640  /// FIRST_TARGET_STRICTFP_OPCODE). Note that all target memory
641  /// opcode are currently automatically considered to possibly raise
642  /// FP exceptions as well.
643  bool isTargetStrictFPOpcode() const {
645  }
646 
647  /// Test if this node has a target-specific
648  /// memory-referencing opcode (in the <target>ISD namespace and
649  /// greater than FIRST_TARGET_MEMORY_OPCODE).
650  bool isTargetMemoryOpcode() const {
652  }
653 
654  /// Return true if the type of the node type undefined.
655  bool isUndef() const { return NodeType == ISD::UNDEF; }
656 
657  /// Test if this node is a memory intrinsic (with valid pointer information).
658  /// INTRINSIC_W_CHAIN and INTRINSIC_VOID nodes are sometimes created for
659  /// non-memory intrinsics (with chains) that are not really instances of
660  /// MemSDNode. For such nodes, we need some extra state to determine the
661  /// proper classof relationship.
662  bool isMemIntrinsic() const {
663  return (NodeType == ISD::INTRINSIC_W_CHAIN ||
665  SDNodeBits.IsMemIntrinsic;
666  }
667 
668  /// Test if this node is a strict floating point pseudo-op.
670  switch (NodeType) {
671  default:
672  return false;
675 #define DAG_INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC, DAGN) \
676  case ISD::STRICT_##DAGN:
677 #include "llvm/IR/ConstrainedOps.def"
678  return true;
679  }
680  }
681 
682  /// Test if this node is a vector predication operation.
683  bool isVPOpcode() const { return ISD::isVPOpcode(getOpcode()); }
684 
685  /// Test if this node has a post-isel opcode, directly
686  /// corresponding to a MachineInstr opcode.
687  bool isMachineOpcode() const { return NodeType < 0; }
688 
689  /// This may only be called if isMachineOpcode returns
690  /// true. It returns the MachineInstr opcode value that the node's opcode
691  /// corresponds to.
692  unsigned getMachineOpcode() const {
693  assert(isMachineOpcode() && "Not a MachineInstr opcode!");
694  return ~NodeType;
695  }
696 
697  bool getHasDebugValue() const { return SDNodeBits.HasDebugValue; }
698  void setHasDebugValue(bool b) { SDNodeBits.HasDebugValue = b; }
699 
700  bool isDivergent() const { return SDNodeBits.IsDivergent; }
701 
702  /// Return true if there are no uses of this node.
703  bool use_empty() const { return UseList == nullptr; }
704 
705  /// Return true if there is exactly one use of this node.
706  bool hasOneUse() const { return hasSingleElement(uses()); }
707 
708  /// Return the number of uses of this node. This method takes
709  /// time proportional to the number of uses.
710  size_t use_size() const { return std::distance(use_begin(), use_end()); }
711 
712  /// Return the unique node id.
713  int getNodeId() const { return NodeId; }
714 
715  /// Set unique node id.
716  void setNodeId(int Id) { NodeId = Id; }
717 
718  /// Return the node ordering.
719  unsigned getIROrder() const { return IROrder; }
720 
721  /// Set the node ordering.
722  void setIROrder(unsigned Order) { IROrder = Order; }
723 
724  /// Return the source location info.
725  const DebugLoc &getDebugLoc() const { return debugLoc; }
726 
727  /// Set source location info. Try to avoid this, putting
728  /// it in the constructor is preferable.
729  void setDebugLoc(DebugLoc dl) { debugLoc = std::move(dl); }
730 
731  /// This class provides iterator support for SDUse
732  /// operands that use a specific SDNode.
733  class use_iterator {
734  friend class SDNode;
735 
736  SDUse *Op = nullptr;
737 
738  explicit use_iterator(SDUse *op) : Op(op) {}
739 
740  public:
741  using iterator_category = std::forward_iterator_tag;
742  using value_type = SDUse;
743  using difference_type = std::ptrdiff_t;
744  using pointer = value_type *;
746 
747  use_iterator() = default;
748  use_iterator(const use_iterator &I) = default;
749 
750  bool operator==(const use_iterator &x) const { return Op == x.Op; }
751  bool operator!=(const use_iterator &x) const {
752  return !operator==(x);
753  }
754 
755  /// Return true if this iterator is at the end of uses list.
756  bool atEnd() const { return Op == nullptr; }
757 
758  // Iterator traversal: forward iteration only.
759  use_iterator &operator++() { // Preincrement
760  assert(Op && "Cannot increment end iterator!");
761  Op = Op->getNext();
762  return *this;
763  }
764 
765  use_iterator operator++(int) { // Postincrement
766  use_iterator tmp = *this; ++*this; return tmp;
767  }
768 
769  /// Retrieve a pointer to the current user node.
770  SDNode *operator*() const {
771  assert(Op && "Cannot dereference end iterator!");
772  return Op->getUser();
773  }
774 
775  SDNode *operator->() const { return operator*(); }
776 
777  SDUse &getUse() const { return *Op; }
778 
779  /// Retrieve the operand # of this use in its user.
780  unsigned getOperandNo() const {
781  assert(Op && "Cannot dereference end iterator!");
782  return (unsigned)(Op - Op->getUser()->OperandList);
783  }
784  };
785 
786  /// Provide iteration support to walk over all uses of an SDNode.
788  return use_iterator(UseList);
789  }
790 
791  static use_iterator use_end() { return use_iterator(nullptr); }
792 
794  return make_range(use_begin(), use_end());
795  }
797  return make_range(use_begin(), use_end());
798  }
799 
800  /// Return true if there are exactly NUSES uses of the indicated value.
801  /// This method ignores uses of other values defined by this operation.
802  bool hasNUsesOfValue(unsigned NUses, unsigned Value) const;
803 
804  /// Return true if there are any use of the indicated value.
805  /// This method ignores uses of other values defined by this operation.
806  bool hasAnyUseOfValue(unsigned Value) const;
807 
808  /// Return true if this node is the only use of N.
809  bool isOnlyUserOf(const SDNode *N) const;
810 
811  /// Return true if this node is an operand of N.
812  bool isOperandOf(const SDNode *N) const;
813 
814  /// Return true if this node is a predecessor of N.
815  /// NOTE: Implemented on top of hasPredecessor and every bit as
816  /// expensive. Use carefully.
817  bool isPredecessorOf(const SDNode *N) const {
818  return N->hasPredecessor(this);
819  }
820 
821  /// Return true if N is a predecessor of this node.
822  /// N is either an operand of this node, or can be reached by recursively
823  /// traversing up the operands.
824  /// NOTE: This is an expensive method. Use it carefully.
825  bool hasPredecessor(const SDNode *N) const;
826 
827  /// Returns true if N is a predecessor of any node in Worklist. This
828  /// helper keeps Visited and Worklist sets externally to allow unions
829  /// searches to be performed in parallel, caching of results across
830  /// queries and incremental addition to Worklist. Stops early if N is
831  /// found but will resume. Remember to clear Visited and Worklists
832  /// if DAG changes. MaxSteps gives a maximum number of nodes to visit before
833  /// giving up. The TopologicalPrune flag signals that positive NodeIds are
834  /// topologically ordered (Operands have strictly smaller node id) and search
835  /// can be pruned leveraging this.
836  static bool hasPredecessorHelper(const SDNode *N,
839  unsigned int MaxSteps = 0,
840  bool TopologicalPrune = false) {
841  SmallVector<const SDNode *, 8> DeferredNodes;
842  if (Visited.count(N))
843  return true;
844 
845  // Node Id's are assigned in three places: As a topological
846  // ordering (> 0), during legalization (results in values set to
847  // 0), new nodes (set to -1). If N has a topolgical id then we
848  // know that all nodes with ids smaller than it cannot be
849  // successors and we need not check them. Filter out all node
850  // that can't be matches. We add them to the worklist before exit
851  // in case of multiple calls. Note that during selection the topological id
852  // may be violated if a node's predecessor is selected before it. We mark
853  // this at selection negating the id of unselected successors and
854  // restricting topological pruning to positive ids.
855 
856  int NId = N->getNodeId();
857  // If we Invalidated the Id, reconstruct original NId.
858  if (NId < -1)
859  NId = -(NId + 1);
860 
861  bool Found = false;
862  while (!Worklist.empty()) {
863  const SDNode *M = Worklist.pop_back_val();
864  int MId = M->getNodeId();
865  if (TopologicalPrune && M->getOpcode() != ISD::TokenFactor && (NId > 0) &&
866  (MId > 0) && (MId < NId)) {
867  DeferredNodes.push_back(M);
868  continue;
869  }
870  for (const SDValue &OpV : M->op_values()) {
871  SDNode *Op = OpV.getNode();
872  if (Visited.insert(Op).second)
873  Worklist.push_back(Op);
874  if (Op == N)
875  Found = true;
876  }
877  if (Found)
878  break;
879  if (MaxSteps != 0 && Visited.size() >= MaxSteps)
880  break;
881  }
882  // Push deferred nodes back on worklist.
883  Worklist.append(DeferredNodes.begin(), DeferredNodes.end());
884  // If we bailed early, conservatively return found.
885  if (MaxSteps != 0 && Visited.size() >= MaxSteps)
886  return true;
887  return Found;
888  }
889 
890  /// Return true if all the users of N are contained in Nodes.
891  /// NOTE: Requires at least one match, but doesn't require them all.
892  static bool areOnlyUsersOf(ArrayRef<const SDNode *> Nodes, const SDNode *N);
893 
894  /// Return the number of values used by this operation.
895  unsigned getNumOperands() const { return NumOperands; }
896 
897  /// Return the maximum number of operands that a SDNode can hold.
898  static constexpr size_t getMaxNumOperands() {
899  return std::numeric_limits<decltype(SDNode::NumOperands)>::max();
900  }
901 
902  /// Helper method returns the integer value of a ConstantSDNode operand.
903  inline uint64_t getConstantOperandVal(unsigned Num) const;
904 
905  /// Helper method returns the APInt of a ConstantSDNode operand.
906  inline const APInt &getConstantOperandAPInt(unsigned Num) const;
907 
908  const SDValue &getOperand(unsigned Num) const {
909  assert(Num < NumOperands && "Invalid child # of SDNode!");
910  return OperandList[Num];
911  }
912 
913  using op_iterator = SDUse *;
914 
915  op_iterator op_begin() const { return OperandList; }
916  op_iterator op_end() const { return OperandList+NumOperands; }
917  ArrayRef<SDUse> ops() const { return makeArrayRef(op_begin(), op_end()); }
918 
919  /// Iterator for directly iterating over the operand SDValue's.
921  : iterator_adaptor_base<value_op_iterator, op_iterator,
922  std::random_access_iterator_tag, SDValue,
923  ptrdiff_t, value_op_iterator *,
924  value_op_iterator *> {
925  explicit value_op_iterator(SDUse *U = nullptr)
926  : iterator_adaptor_base(U) {}
927 
928  const SDValue &operator*() const { return I->get(); }
929  };
930 
934  }
935 
936  SDVTList getVTList() const {
937  SDVTList X = { ValueList, NumValues };
938  return X;
939  }
940 
941  /// If this node has a glue operand, return the node
942  /// to which the glue operand points. Otherwise return NULL.
943  SDNode *getGluedNode() const {
944  if (getNumOperands() != 0 &&
946  return getOperand(getNumOperands()-1).getNode();
947  return nullptr;
948  }
949 
950  /// If this node has a glue value with a user, return
951  /// the user (there is at most one). Otherwise return NULL.
952  SDNode *getGluedUser() const {
953  for (use_iterator UI = use_begin(), UE = use_end(); UI != UE; ++UI)
954  if (UI.getUse().get().getValueType() == MVT::Glue)
955  return *UI;
956  return nullptr;
957  }
958 
959  SDNodeFlags getFlags() const { return Flags; }
960  void setFlags(SDNodeFlags NewFlags) { Flags = NewFlags; }
961 
962  /// Clear any flags in this node that aren't also set in Flags.
963  /// If Flags is not in a defined state then this has no effect.
964  void intersectFlagsWith(const SDNodeFlags Flags);
965 
966  /// Return the number of values defined/returned by this operator.
967  unsigned getNumValues() const { return NumValues; }
968 
969  /// Return the type of a specified result.
970  EVT getValueType(unsigned ResNo) const {
971  assert(ResNo < NumValues && "Illegal result number!");
972  return ValueList[ResNo];
973  }
974 
975  /// Return the type of a specified result as a simple type.
976  MVT getSimpleValueType(unsigned ResNo) const {
977  return getValueType(ResNo).getSimpleVT();
978  }
979 
980  /// Returns MVT::getSizeInBits(getValueType(ResNo)).
981  ///
982  /// If the value type is a scalable vector type, the scalable property will
983  /// be set and the runtime size will be a positive integer multiple of the
984  /// base size.
985  TypeSize getValueSizeInBits(unsigned ResNo) const {
986  return getValueType(ResNo).getSizeInBits();
987  }
988 
989  using value_iterator = const EVT *;
990 
991  value_iterator value_begin() const { return ValueList; }
992  value_iterator value_end() const { return ValueList+NumValues; }
995  }
996 
997  /// Return the opcode of this operation for printing.
998  std::string getOperationName(const SelectionDAG *G = nullptr) const;
999  static const char* getIndexedModeName(ISD::MemIndexedMode AM);
1000  void print_types(raw_ostream &OS, const SelectionDAG *G) const;
1001  void print_details(raw_ostream &OS, const SelectionDAG *G) const;
1002  void print(raw_ostream &OS, const SelectionDAG *G = nullptr) const;
1003  void printr(raw_ostream &OS, const SelectionDAG *G = nullptr) const;
1004 
1005  /// Print a SelectionDAG node and all children down to
1006  /// the leaves. The given SelectionDAG allows target-specific nodes
1007  /// to be printed in human-readable form. Unlike printr, this will
1008  /// print the whole DAG, including children that appear multiple
1009  /// times.
1010  ///
1011  void printrFull(raw_ostream &O, const SelectionDAG *G = nullptr) const;
1012 
1013  /// Print a SelectionDAG node and children up to
1014  /// depth "depth." The given SelectionDAG allows target-specific
1015  /// nodes to be printed in human-readable form. Unlike printr, this
1016  /// will print children that appear multiple times wherever they are
1017  /// used.
1018  ///
1019  void printrWithDepth(raw_ostream &O, const SelectionDAG *G = nullptr,
1020  unsigned depth = 100) const;
1021 
1022  /// Dump this node, for debugging.
1023  void dump() const;
1024 
1025  /// Dump (recursively) this node and its use-def subgraph.
1026  void dumpr() const;
1027 
1028  /// Dump this node, for debugging.
1029  /// The given SelectionDAG allows target-specific nodes to be printed
1030  /// in human-readable form.
1031  void dump(const SelectionDAG *G) const;
1032 
1033  /// Dump (recursively) this node and its use-def subgraph.
1034  /// The given SelectionDAG allows target-specific nodes to be printed
1035  /// in human-readable form.
1036  void dumpr(const SelectionDAG *G) const;
1037 
1038  /// printrFull to dbgs(). The given SelectionDAG allows
1039  /// target-specific nodes to be printed in human-readable form.
1040  /// Unlike dumpr, this will print the whole DAG, including children
1041  /// that appear multiple times.
1042  void dumprFull(const SelectionDAG *G = nullptr) const;
1043 
1044  /// printrWithDepth to dbgs(). The given
1045  /// SelectionDAG allows target-specific nodes to be printed in
1046  /// human-readable form. Unlike dumpr, this will print children
1047  /// that appear multiple times wherever they are used.
1048  ///
1049  void dumprWithDepth(const SelectionDAG *G = nullptr,
1050  unsigned depth = 100) const;
1051 
1052  /// Gather unique data for the node.
1053  void Profile(FoldingSetNodeID &ID) const;
1054 
1055  /// This method should only be used by the SDUse class.
1056  void addUse(SDUse &U) { U.addToList(&UseList); }
1057 
1058 protected:
1059  static SDVTList getSDVTList(EVT VT) {
1060  SDVTList Ret = { getValueTypeList(VT), 1 };
1061  return Ret;
1062  }
1063 
1064  /// Create an SDNode.
1065  ///
1066  /// SDNodes are created without any operands, and never own the operand
1067  /// storage. To add operands, see SelectionDAG::createOperands.
1068  SDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs)
1069  : NodeType(Opc), ValueList(VTs.VTs), NumValues(VTs.NumVTs),
1070  IROrder(Order), debugLoc(std::move(dl)) {
1071  memset(&RawSDNodeBits, 0, sizeof(RawSDNodeBits));
1072  assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor");
1073  assert(NumValues == VTs.NumVTs &&
1074  "NumValues wasn't wide enough for its operands!");
1075  }
1076 
1077  /// Release the operands and set this node to have zero operands.
1078  void DropOperands();
1079 };
1080 
1081 /// Wrapper class for IR location info (IR ordering and DebugLoc) to be passed
1082 /// into SDNode creation functions.
1083 /// When an SDNode is created from the DAGBuilder, the DebugLoc is extracted
1084 /// from the original Instruction, and IROrder is the ordinal position of
1085 /// the instruction.
1086 /// When an SDNode is created after the DAG is being built, both DebugLoc and
1087 /// the IROrder are propagated from the original SDNode.
1088 /// So SDLoc class provides two constructors besides the default one, one to
1089 /// be used by the DAGBuilder, the other to be used by others.
1090 class SDLoc {
1091 private:
1092  DebugLoc DL;
1093  int IROrder = 0;
1094 
1095 public:
1096  SDLoc() = default;
1097  SDLoc(const SDNode *N) : DL(N->getDebugLoc()), IROrder(N->getIROrder()) {}
1098  SDLoc(const SDValue V) : SDLoc(V.getNode()) {}
1099  SDLoc(const Instruction *I, int Order) : IROrder(Order) {
1100  assert(Order >= 0 && "bad IROrder");
1101  if (I)
1102  DL = I->getDebugLoc();
1103  }
1104 
1105  unsigned getIROrder() const { return IROrder; }
1106  const DebugLoc &getDebugLoc() const { return DL; }
1107 };
1108 
1109 // Define inline functions from the SDValue class.
1110 
1111 inline SDValue::SDValue(SDNode *node, unsigned resno)
1112  : Node(node), ResNo(resno) {
1113  // Explicitly check for !ResNo to avoid use-after-free, because there are
1114  // callers that use SDValue(N, 0) with a deleted N to indicate successful
1115  // combines.
1116  assert((!Node || !ResNo || ResNo < Node->getNumValues()) &&
1117  "Invalid result number for the given node!");
1118  assert(ResNo < -2U && "Cannot use result numbers reserved for DenseMaps.");
1119 }
1120 
1121 inline unsigned SDValue::getOpcode() const {
1122  return Node->getOpcode();
1123 }
1124 
1125 inline EVT SDValue::getValueType() const {
1126  return Node->getValueType(ResNo);
1127 }
1128 
1129 inline unsigned SDValue::getNumOperands() const {
1130  return Node->getNumOperands();
1131 }
1132 
1133 inline const SDValue &SDValue::getOperand(unsigned i) const {
1134  return Node->getOperand(i);
1135 }
1136 
1138  return Node->getConstantOperandVal(i);
1139 }
1140 
1141 inline const APInt &SDValue::getConstantOperandAPInt(unsigned i) const {
1142  return Node->getConstantOperandAPInt(i);
1143 }
1144 
1145 inline bool SDValue::isTargetOpcode() const {
1146  return Node->isTargetOpcode();
1147 }
1148 
1149 inline bool SDValue::isTargetMemoryOpcode() const {
1150  return Node->isTargetMemoryOpcode();
1151 }
1152 
1153 inline bool SDValue::isMachineOpcode() const {
1154  return Node->isMachineOpcode();
1155 }
1156 
1157 inline unsigned SDValue::getMachineOpcode() const {
1158  return Node->getMachineOpcode();
1159 }
1160 
1161 inline bool SDValue::isUndef() const {
1162  return Node->isUndef();
1163 }
1164 
1165 inline bool SDValue::use_empty() const {
1166  return !Node->hasAnyUseOfValue(ResNo);
1167 }
1168 
1169 inline bool SDValue::hasOneUse() const {
1170  return Node->hasNUsesOfValue(1, ResNo);
1171 }
1172 
1173 inline const DebugLoc &SDValue::getDebugLoc() const {
1174  return Node->getDebugLoc();
1175 }
1176 
1177 inline void SDValue::dump() const {
1178  return Node->dump();
1179 }
1180 
1181 inline void SDValue::dump(const SelectionDAG *G) const {
1182  return Node->dump(G);
1183 }
1184 
1185 inline void SDValue::dumpr() const {
1186  return Node->dumpr();
1187 }
1188 
1189 inline void SDValue::dumpr(const SelectionDAG *G) const {
1190  return Node->dumpr(G);
1191 }
1192 
1193 // Define inline functions from the SDUse class.
1194 
1195 inline void SDUse::set(const SDValue &V) {
1196  if (Val.getNode()) removeFromList();
1197  Val = V;
1198  if (V.getNode())
1199  V->addUse(*this);
1200 }
1201 
1202 inline void SDUse::setInitial(const SDValue &V) {
1203  Val = V;
1204  V->addUse(*this);
1205 }
1206 
1207 inline void SDUse::setNode(SDNode *N) {
1208  if (Val.getNode()) removeFromList();
1209  Val.setNode(N);
1210  if (N) N->addUse(*this);
1211 }
1212 
1213 /// This class is used to form a handle around another node that
1214 /// is persistent and is updated across invocations of replaceAllUsesWith on its
1215 /// operand. This node should be directly created by end-users and not added to
1216 /// the AllNodes list.
1217 class HandleSDNode : public SDNode {
1218  SDUse Op;
1219 
1220 public:
1222  : SDNode(ISD::HANDLENODE, 0, DebugLoc(), getSDVTList(MVT::Other)) {
1223  // HandleSDNodes are never inserted into the DAG, so they won't be
1224  // auto-numbered. Use ID 65535 as a sentinel.
1225  PersistentId = 0xffff;
1226 
1227  // Manually set up the operand list. This node type is special in that it's
1228  // always stack allocated and SelectionDAG does not manage its operands.
1229  // TODO: This should either (a) not be in the SDNode hierarchy, or (b) not
1230  // be so special.
1231  Op.setUser(this);
1232  Op.setInitial(X);
1233  NumOperands = 1;
1234  OperandList = &Op;
1235  }
1236  ~HandleSDNode();
1237 
1238  const SDValue &getValue() const { return Op; }
1239 };
1240 
1241 class AddrSpaceCastSDNode : public SDNode {
1242 private:
1243  unsigned SrcAddrSpace;
1244  unsigned DestAddrSpace;
1245 
1246 public:
1247  AddrSpaceCastSDNode(unsigned Order, const DebugLoc &dl, EVT VT,
1248  unsigned SrcAS, unsigned DestAS);
1249 
1250  unsigned getSrcAddressSpace() const { return SrcAddrSpace; }
1251  unsigned getDestAddressSpace() const { return DestAddrSpace; }
1252 
1253  static bool classof(const SDNode *N) {
1254  return N->getOpcode() == ISD::ADDRSPACECAST;
1255  }
1256 };
1257 
1258 /// This is an abstract virtual class for memory operations.
1259 class MemSDNode : public SDNode {
1260 private:
1261  // VT of in-memory value.
1262  EVT MemoryVT;
1263 
1264 protected:
1265  /// Memory reference information.
1267 
1268 public:
1269  MemSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTs,
1270  EVT memvt, MachineMemOperand *MMO);
1271 
1272  bool readMem() const { return MMO->isLoad(); }
1273  bool writeMem() const { return MMO->isStore(); }
1274 
1275  /// Returns alignment and volatility of the memory access
1276  Align getOriginalAlign() const { return MMO->getBaseAlign(); }
1277  Align getAlign() const { return MMO->getAlign(); }
1278  // FIXME: Remove once transition to getAlign is over.
1279  unsigned getAlignment() const { return MMO->getAlign().value(); }
1280 
1281  /// Return the SubclassData value, without HasDebugValue. This contains an
1282  /// encoding of the volatile flag, as well as bits used by subclasses. This
1283  /// function should only be used to compute a FoldingSetNodeID value.
1284  /// The HasDebugValue bit is masked out because CSE map needs to match
1285  /// nodes with debug info with nodes without debug info. Same is about
1286  /// isDivergent bit.
1287  unsigned getRawSubclassData() const {
1288  uint16_t Data;
1289  union {
1290  char RawSDNodeBits[sizeof(uint16_t)];
1292  };
1293  memcpy(&RawSDNodeBits, &this->RawSDNodeBits, sizeof(this->RawSDNodeBits));
1294  SDNodeBits.HasDebugValue = 0;
1295  SDNodeBits.IsDivergent = false;
1296  memcpy(&Data, &RawSDNodeBits, sizeof(RawSDNodeBits));
1297  return Data;
1298  }
1299 
1300  bool isVolatile() const { return MemSDNodeBits.IsVolatile; }
1301  bool isNonTemporal() const { return MemSDNodeBits.IsNonTemporal; }
1302  bool isDereferenceable() const { return MemSDNodeBits.IsDereferenceable; }
1303  bool isInvariant() const { return MemSDNodeBits.IsInvariant; }
1304 
1305  // Returns the offset from the location of the access.
1306  int64_t getSrcValueOffset() const { return MMO->getOffset(); }
1307 
1308  /// Returns the AA info that describes the dereference.
1309  AAMDNodes getAAInfo() const { return MMO->getAAInfo(); }
1310 
1311  /// Returns the Ranges that describes the dereference.
1312  const MDNode *getRanges() const { return MMO->getRanges(); }
1313 
1314  /// Returns the synchronization scope ID for this memory operation.
1316 
1317  /// Return the atomic ordering requirements for this memory operation. For
1318  /// cmpxchg atomic operations, return the atomic ordering requirements when
1319  /// store occurs.
1321  return MMO->getSuccessOrdering();
1322  }
1323 
1324  /// Return a single atomic ordering that is at least as strong as both the
1325  /// success and failure orderings for an atomic operation. (For operations
1326  /// other than cmpxchg, this is equivalent to getSuccessOrdering().)
1328 
1329  /// Return true if the memory operation ordering is Unordered or higher.
1330  bool isAtomic() const { return MMO->isAtomic(); }
1331 
1332  /// Returns true if the memory operation doesn't imply any ordering
1333  /// constraints on surrounding memory operations beyond the normal memory
1334  /// aliasing rules.
1335  bool isUnordered() const { return MMO->isUnordered(); }
1336 
1337  /// Returns true if the memory operation is neither atomic or volatile.
1338  bool isSimple() const { return !isAtomic() && !isVolatile(); }
1339 
1340  /// Return the type of the in-memory value.
1341  EVT getMemoryVT() const { return MemoryVT; }
1342 
1343  /// Return a MachineMemOperand object describing the memory
1344  /// reference performed by operation.
1345  MachineMemOperand *getMemOperand() const { return MMO; }
1346 
1348  return MMO->getPointerInfo();
1349  }
1350 
1351  /// Return the address space for the associated pointer
1352  unsigned getAddressSpace() const {
1353  return getPointerInfo().getAddrSpace();
1354  }
1355 
1356  /// Update this MemSDNode's MachineMemOperand information
1357  /// to reflect the alignment of NewMMO, if it has a greater alignment.
1358  /// This must only be used when the new alignment applies to all users of
1359  /// this MachineMemOperand.
1360  void refineAlignment(const MachineMemOperand *NewMMO) {
1361  MMO->refineAlignment(NewMMO);
1362  }
1363 
1364  const SDValue &getChain() const { return getOperand(0); }
1365 
1366  const SDValue &getBasePtr() const {
1367  switch (getOpcode()) {
1368  case ISD::STORE:
1369  case ISD::VP_STORE:
1370  case ISD::MSTORE:
1371  case ISD::VP_SCATTER:
1372  case ISD::EXPERIMENTAL_VP_STRIDED_STORE:
1373  return getOperand(2);
1374  case ISD::MGATHER:
1375  case ISD::MSCATTER:
1376  return getOperand(3);
1377  default:
1378  return getOperand(1);
1379  }
1380  }
1381 
1382  // Methods to support isa and dyn_cast
1383  static bool classof(const SDNode *N) {
1384  // For some targets, we lower some target intrinsics to a MemIntrinsicNode
1385  // with either an intrinsic or a target opcode.
1386  switch (N->getOpcode()) {
1387  case ISD::LOAD:
1388  case ISD::STORE:
1389  case ISD::PREFETCH:
1390  case ISD::ATOMIC_CMP_SWAP:
1392  case ISD::ATOMIC_SWAP:
1393  case ISD::ATOMIC_LOAD_ADD:
1394  case ISD::ATOMIC_LOAD_SUB:
1395  case ISD::ATOMIC_LOAD_AND:
1396  case ISD::ATOMIC_LOAD_CLR:
1397  case ISD::ATOMIC_LOAD_OR:
1398  case ISD::ATOMIC_LOAD_XOR:
1399  case ISD::ATOMIC_LOAD_NAND:
1400  case ISD::ATOMIC_LOAD_MIN:
1401  case ISD::ATOMIC_LOAD_MAX:
1402  case ISD::ATOMIC_LOAD_UMIN:
1403  case ISD::ATOMIC_LOAD_UMAX:
1404  case ISD::ATOMIC_LOAD_FADD:
1405  case ISD::ATOMIC_LOAD_FSUB:
1406  case ISD::ATOMIC_LOAD:
1407  case ISD::ATOMIC_STORE:
1408  case ISD::MLOAD:
1409  case ISD::MSTORE:
1410  case ISD::MGATHER:
1411  case ISD::MSCATTER:
1412  case ISD::VP_LOAD:
1413  case ISD::VP_STORE:
1414  case ISD::VP_GATHER:
1415  case ISD::VP_SCATTER:
1416  case ISD::EXPERIMENTAL_VP_STRIDED_LOAD:
1417  case ISD::EXPERIMENTAL_VP_STRIDED_STORE:
1418  return true;
1419  default:
1420  return N->isMemIntrinsic() || N->isTargetMemoryOpcode();
1421  }
1422  }
1423 };
1424 
1425 /// This is an SDNode representing atomic operations.
1426 class AtomicSDNode : public MemSDNode {
1427 public:
1428  AtomicSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTL,
1429  EVT MemVT, MachineMemOperand *MMO)
1430  : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
1431  assert(((Opc != ISD::ATOMIC_LOAD && Opc != ISD::ATOMIC_STORE) ||
1432  MMO->isAtomic()) && "then why are we using an AtomicSDNode?");
1433  }
1434 
1435  const SDValue &getBasePtr() const { return getOperand(1); }
1436  const SDValue &getVal() const { return getOperand(2); }
1437 
1438  /// Returns true if this SDNode represents cmpxchg atomic operation, false
1439  /// otherwise.
1440  bool isCompareAndSwap() const {
1441  unsigned Op = getOpcode();
1442  return Op == ISD::ATOMIC_CMP_SWAP ||
1444  }
1445 
1446  /// For cmpxchg atomic operations, return the atomic ordering requirements
1447  /// when store does not occur.
1449  assert(isCompareAndSwap() && "Must be cmpxchg operation");
1450  return MMO->getFailureOrdering();
1451  }
1452 
1453  // Methods to support isa and dyn_cast
1454  static bool classof(const SDNode *N) {
1455  return N->getOpcode() == ISD::ATOMIC_CMP_SWAP ||
1456  N->getOpcode() == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS ||
1457  N->getOpcode() == ISD::ATOMIC_SWAP ||
1458  N->getOpcode() == ISD::ATOMIC_LOAD_ADD ||
1459  N->getOpcode() == ISD::ATOMIC_LOAD_SUB ||
1460  N->getOpcode() == ISD::ATOMIC_LOAD_AND ||
1461  N->getOpcode() == ISD::ATOMIC_LOAD_CLR ||
1462  N->getOpcode() == ISD::ATOMIC_LOAD_OR ||
1463  N->getOpcode() == ISD::ATOMIC_LOAD_XOR ||
1464  N->getOpcode() == ISD::ATOMIC_LOAD_NAND ||
1465  N->getOpcode() == ISD::ATOMIC_LOAD_MIN ||
1466  N->getOpcode() == ISD::ATOMIC_LOAD_MAX ||
1467  N->getOpcode() == ISD::ATOMIC_LOAD_UMIN ||
1468  N->getOpcode() == ISD::ATOMIC_LOAD_UMAX ||
1469  N->getOpcode() == ISD::ATOMIC_LOAD_FADD ||
1470  N->getOpcode() == ISD::ATOMIC_LOAD_FSUB ||
1471  N->getOpcode() == ISD::ATOMIC_LOAD ||
1472  N->getOpcode() == ISD::ATOMIC_STORE;
1473  }
1474 };
1475 
1476 /// This SDNode is used for target intrinsics that touch
1477 /// memory and need an associated MachineMemOperand. Its opcode may be
1478 /// INTRINSIC_VOID, INTRINSIC_W_CHAIN, PREFETCH, or a target-specific opcode
1479 /// with a value not less than FIRST_TARGET_MEMORY_OPCODE.
1481 public:
1482  MemIntrinsicSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl,
1483  SDVTList VTs, EVT MemoryVT, MachineMemOperand *MMO)
1484  : MemSDNode(Opc, Order, dl, VTs, MemoryVT, MMO) {
1485  SDNodeBits.IsMemIntrinsic = true;
1486  }
1487 
1488  // Methods to support isa and dyn_cast
1489  static bool classof(const SDNode *N) {
1490  // We lower some target intrinsics to their target opcode
1491  // early a node with a target opcode can be of this class
1492  return N->isMemIntrinsic() ||
1493  N->getOpcode() == ISD::PREFETCH ||
1494  N->isTargetMemoryOpcode();
1495  }
1496 };
1497 
1498 /// This SDNode is used to implement the code generator
1499 /// support for the llvm IR shufflevector instruction. It combines elements
1500 /// from two input vectors into a new input vector, with the selection and
1501 /// ordering of elements determined by an array of integers, referred to as
1502 /// the shuffle mask. For input vectors of width N, mask indices of 0..N-1
1503 /// refer to elements from the LHS input, and indices from N to 2N-1 the RHS.
1504 /// An index of -1 is treated as undef, such that the code generator may put
1505 /// any value in the corresponding element of the result.
1506 class ShuffleVectorSDNode : public SDNode {
1507  // The memory for Mask is owned by the SelectionDAG's OperandAllocator, and
1508  // is freed when the SelectionDAG object is destroyed.
1509  const int *Mask;
1510 
1511 protected:
1512  friend class SelectionDAG;
1513 
1514  ShuffleVectorSDNode(EVT VT, unsigned Order, const DebugLoc &dl, const int *M)
1515  : SDNode(ISD::VECTOR_SHUFFLE, Order, dl, getSDVTList(VT)), Mask(M) {}
1516 
1517 public:
1519  EVT VT = getValueType(0);
1520  return makeArrayRef(Mask, VT.getVectorNumElements());
1521  }
1522 
1523  int getMaskElt(unsigned Idx) const {
1524  assert(Idx < getValueType(0).getVectorNumElements() && "Idx out of range!");
1525  return Mask[Idx];
1526  }
1527 
1528  bool isSplat() const { return isSplatMask(Mask, getValueType(0)); }
1529 
1530  int getSplatIndex() const {
1531  assert(isSplat() && "Cannot get splat index for non-splat!");
1532  EVT VT = getValueType(0);
1533  for (unsigned i = 0, e = VT.getVectorNumElements(); i != e; ++i)
1534  if (Mask[i] >= 0)
1535  return Mask[i];
1536 
1537  // We can choose any index value here and be correct because all elements
1538  // are undefined. Return 0 for better potential for callers to simplify.
1539  return 0;
1540  }
1541 
1542  static bool isSplatMask(const int *Mask, EVT VT);
1543 
1544  /// Change values in a shuffle permute mask assuming
1545  /// the two vector operands have swapped position.
1547  unsigned NumElems = Mask.size();
1548  for (unsigned i = 0; i != NumElems; ++i) {
1549  int idx = Mask[i];
1550  if (idx < 0)
1551  continue;
1552  else if (idx < (int)NumElems)
1553  Mask[i] = idx + NumElems;
1554  else
1555  Mask[i] = idx - NumElems;
1556  }
1557  }
1558 
1559  static bool classof(const SDNode *N) {
1560  return N->getOpcode() == ISD::VECTOR_SHUFFLE;
1561  }
1562 };
1563 
1564 class ConstantSDNode : public SDNode {
1565  friend class SelectionDAG;
1566 
1567  const ConstantInt *Value;
1568 
1569  ConstantSDNode(bool isTarget, bool isOpaque, const ConstantInt *val, EVT VT)
1570  : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, 0, DebugLoc(),
1571  getSDVTList(VT)),
1572  Value(val) {
1573  ConstantSDNodeBits.IsOpaque = isOpaque;
1574  }
1575 
1576 public:
1577  const ConstantInt *getConstantIntValue() const { return Value; }
1578  const APInt &getAPIntValue() const { return Value->getValue(); }
1579  uint64_t getZExtValue() const { return Value->getZExtValue(); }
1580  int64_t getSExtValue() const { return Value->getSExtValue(); }
1582  return Value->getLimitedValue(Limit);
1583  }
1584  MaybeAlign getMaybeAlignValue() const { return Value->getMaybeAlignValue(); }
1585  Align getAlignValue() const { return Value->getAlignValue(); }
1586 
1587  bool isOne() const { return Value->isOne(); }
1588  bool isZero() const { return Value->isZero(); }
1589  // NOTE: This is soft-deprecated. Please use `isZero()` instead.
1590  bool isNullValue() const { return isZero(); }
1591  bool isAllOnes() const { return Value->isMinusOne(); }
1592  // NOTE: This is soft-deprecated. Please use `isAllOnes()` instead.
1593  bool isAllOnesValue() const { return isAllOnes(); }
1594  bool isMaxSignedValue() const { return Value->isMaxValue(true); }
1595  bool isMinSignedValue() const { return Value->isMinValue(true); }
1596 
1597  bool isOpaque() const { return ConstantSDNodeBits.IsOpaque; }
1598 
1599  static bool classof(const SDNode *N) {
1600  return N->getOpcode() == ISD::Constant ||
1601  N->getOpcode() == ISD::TargetConstant;
1602  }
1603 };
1604 
1606  return cast<ConstantSDNode>(getOperand(Num))->getZExtValue();
1607 }
1608 
1609 const APInt &SDNode::getConstantOperandAPInt(unsigned Num) const {
1610  return cast<ConstantSDNode>(getOperand(Num))->getAPIntValue();
1611 }
1612 
1613 class ConstantFPSDNode : public SDNode {
1614  friend class SelectionDAG;
1615 
1616  const ConstantFP *Value;
1617 
1618  ConstantFPSDNode(bool isTarget, const ConstantFP *val, EVT VT)
1619  : SDNode(isTarget ? ISD::TargetConstantFP : ISD::ConstantFP, 0,
1620  DebugLoc(), getSDVTList(VT)),
1621  Value(val) {}
1622 
1623 public:
1624  const APFloat& getValueAPF() const { return Value->getValueAPF(); }
1625  const ConstantFP *getConstantFPValue() const { return Value; }
1626 
1627  /// Return true if the value is positive or negative zero.
1628  bool isZero() const { return Value->isZero(); }
1629 
1630  /// Return true if the value is a NaN.
1631  bool isNaN() const { return Value->isNaN(); }
1632 
1633  /// Return true if the value is an infinity
1634  bool isInfinity() const { return Value->isInfinity(); }
1635 
1636  /// Return true if the value is negative.
1637  bool isNegative() const { return Value->isNegative(); }
1638 
1639  /// We don't rely on operator== working on double values, as
1640  /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
1641  /// As such, this method can be used to do an exact bit-for-bit comparison of
1642  /// two floating point values.
1643 
1644  /// We leave the version with the double argument here because it's just so
1645  /// convenient to write "2.0" and the like. Without this function we'd
1646  /// have to duplicate its logic everywhere it's called.
1647  bool isExactlyValue(double V) const {
1648  return Value->getValueAPF().isExactlyValue(V);
1649  }
1650  bool isExactlyValue(const APFloat& V) const;
1651 
1652  static bool isValueValidForType(EVT VT, const APFloat& Val);
1653 
1654  static bool classof(const SDNode *N) {
1655  return N->getOpcode() == ISD::ConstantFP ||
1656  N->getOpcode() == ISD::TargetConstantFP;
1657  }
1658 };
1659 
1660 /// Returns true if \p V is a constant integer zero.
1661 bool isNullConstant(SDValue V);
1662 
1663 /// Returns true if \p V is an FP constant with a value of positive zero.
1664 bool isNullFPConstant(SDValue V);
1665 
1666 /// Returns true if \p V is an integer constant with all bits set.
1667 bool isAllOnesConstant(SDValue V);
1668 
1669 /// Returns true if \p V is a constant integer one.
1670 bool isOneConstant(SDValue V);
1671 
1672 /// Returns true if \p V is a constant min signed integer value.
1673 bool isMinSignedConstant(SDValue V);
1674 
1675 /// Return the non-bitcasted source operand of \p V if it exists.
1676 /// If \p V is not a bitcasted value, it is returned as-is.
1677 SDValue peekThroughBitcasts(SDValue V);
1678 
1679 /// Return the non-bitcasted and one-use source operand of \p V if it exists.
1680 /// If \p V is not a bitcasted one-use value, it is returned as-is.
1681 SDValue peekThroughOneUseBitcasts(SDValue V);
1682 
1683 /// Return the non-extracted vector source operand of \p V if it exists.
1684 /// If \p V is not an extracted subvector, it is returned as-is.
1685 SDValue peekThroughExtractSubvectors(SDValue V);
1686 
1687 /// Returns true if \p V is a bitwise not operation. Assumes that an all ones
1688 /// constant is canonicalized to be operand 1.
1689 bool isBitwiseNot(SDValue V, bool AllowUndefs = false);
1690 
1691 /// If \p V is a bitwise not, returns the inverted operand. Otherwise returns
1692 /// an empty SDValue. Only bits set in \p Mask are required to be inverted,
1693 /// other bits may be arbitrary.
1694 SDValue getBitwiseNotOperand(SDValue V, SDValue Mask, bool AllowUndefs);
1695 
1696 /// Returns the SDNode if it is a constant splat BuildVector or constant int.
1697 ConstantSDNode *isConstOrConstSplat(SDValue N, bool AllowUndefs = false,
1698  bool AllowTruncation = false);
1699 
1700 /// Returns the SDNode if it is a demanded constant splat BuildVector or
1701 /// constant int.
1702 ConstantSDNode *isConstOrConstSplat(SDValue N, const APInt &DemandedElts,
1703  bool AllowUndefs = false,
1704  bool AllowTruncation = false);
1705 
1706 /// Returns the SDNode if it is a constant splat BuildVector or constant float.
1707 ConstantFPSDNode *isConstOrConstSplatFP(SDValue N, bool AllowUndefs = false);
1708 
1709 /// Returns the SDNode if it is a demanded constant splat BuildVector or
1710 /// constant float.
1711 ConstantFPSDNode *isConstOrConstSplatFP(SDValue N, const APInt &DemandedElts,
1712  bool AllowUndefs = false);
1713 
1714 /// Return true if the value is a constant 0 integer or a splatted vector of
1715 /// a constant 0 integer (with no undefs by default).
1716 /// Build vector implicit truncation is not an issue for null values.
1717 bool isNullOrNullSplat(SDValue V, bool AllowUndefs = false);
1718 
1719 /// Return true if the value is a constant 1 integer or a splatted vector of a
1720 /// constant 1 integer (with no undefs).
1721 /// Does not permit build vector implicit truncation.
1722 bool isOneOrOneSplat(SDValue V, bool AllowUndefs = false);
1723 
1724 /// Return true if the value is a constant -1 integer or a splatted vector of a
1725 /// constant -1 integer (with no undefs).
1726 /// Does not permit build vector implicit truncation.
1727 bool isAllOnesOrAllOnesSplat(SDValue V, bool AllowUndefs = false);
1728 
1729 /// Return true if \p V is either a integer or FP constant.
1730 inline bool isIntOrFPConstant(SDValue V) {
1731  return isa<ConstantSDNode>(V) || isa<ConstantFPSDNode>(V);
1732 }
1733 
1734 class GlobalAddressSDNode : public SDNode {
1735  friend class SelectionDAG;
1736 
1737  const GlobalValue *TheGlobal;
1738  int64_t Offset;
1739  unsigned TargetFlags;
1740 
1741  GlobalAddressSDNode(unsigned Opc, unsigned Order, const DebugLoc &DL,
1742  const GlobalValue *GA, EVT VT, int64_t o,
1743  unsigned TF);
1744 
1745 public:
1746  const GlobalValue *getGlobal() const { return TheGlobal; }
1747  int64_t getOffset() const { return Offset; }
1748  unsigned getTargetFlags() const { return TargetFlags; }
1749  // Return the address space this GlobalAddress belongs to.
1750  unsigned getAddressSpace() const;
1751 
1752  static bool classof(const SDNode *N) {
1753  return N->getOpcode() == ISD::GlobalAddress ||
1754  N->getOpcode() == ISD::TargetGlobalAddress ||
1755  N->getOpcode() == ISD::GlobalTLSAddress ||
1756  N->getOpcode() == ISD::TargetGlobalTLSAddress;
1757  }
1758 };
1759 
1760 class FrameIndexSDNode : public SDNode {
1761  friend class SelectionDAG;
1762 
1763  int FI;
1764 
1765  FrameIndexSDNode(int fi, EVT VT, bool isTarg)
1766  : SDNode(isTarg ? ISD::TargetFrameIndex : ISD::FrameIndex,
1767  0, DebugLoc(), getSDVTList(VT)), FI(fi) {
1768  }
1769 
1770 public:
1771  int getIndex() const { return FI; }
1772 
1773  static bool classof(const SDNode *N) {
1774  return N->getOpcode() == ISD::FrameIndex ||
1775  N->getOpcode() == ISD::TargetFrameIndex;
1776  }
1777 };
1778 
1779 /// This SDNode is used for LIFETIME_START/LIFETIME_END values, which indicate
1780 /// the offet and size that are started/ended in the underlying FrameIndex.
1781 class LifetimeSDNode : public SDNode {
1782  friend class SelectionDAG;
1783  int64_t Size;
1784  int64_t Offset; // -1 if offset is unknown.
1785 
1786  LifetimeSDNode(unsigned Opcode, unsigned Order, const DebugLoc &dl,
1787  SDVTList VTs, int64_t Size, int64_t Offset)
1788  : SDNode(Opcode, Order, dl, VTs), Size(Size), Offset(Offset) {}
1789 public:
1790  int64_t getFrameIndex() const {
1791  return cast<FrameIndexSDNode>(getOperand(1))->getIndex();
1792  }
1793 
1794  bool hasOffset() const { return Offset >= 0; }
1795  int64_t getOffset() const {
1796  assert(hasOffset() && "offset is unknown");
1797  return Offset;
1798  }
1799  int64_t getSize() const {
1800  assert(hasOffset() && "offset is unknown");
1801  return Size;
1802  }
1803 
1804  // Methods to support isa and dyn_cast
1805  static bool classof(const SDNode *N) {
1806  return N->getOpcode() == ISD::LIFETIME_START ||
1807  N->getOpcode() == ISD::LIFETIME_END;
1808  }
1809 };
1810 
1811 /// This SDNode is used for PSEUDO_PROBE values, which are the function guid and
1812 /// the index of the basic block being probed. A pseudo probe serves as a place
1813 /// holder and will be removed at the end of compilation. It does not have any
1814 /// operand because we do not want the instruction selection to deal with any.
1815 class PseudoProbeSDNode : public SDNode {
1816  friend class SelectionDAG;
1817  uint64_t Guid;
1818  uint64_t Index;
1820 
1821  PseudoProbeSDNode(unsigned Opcode, unsigned Order, const DebugLoc &Dl,
1822  SDVTList VTs, uint64_t Guid, uint64_t Index, uint32_t Attr)
1823  : SDNode(Opcode, Order, Dl, VTs), Guid(Guid), Index(Index),
1824  Attributes(Attr) {}
1825 
1826 public:
1827  uint64_t getGuid() const { return Guid; }
1828  uint64_t getIndex() const { return Index; }
1829  uint32_t getAttributes() const { return Attributes; }
1830 
1831  // Methods to support isa and dyn_cast
1832  static bool classof(const SDNode *N) {
1833  return N->getOpcode() == ISD::PSEUDO_PROBE;
1834  }
1835 };
1836 
1837 class JumpTableSDNode : public SDNode {
1838  friend class SelectionDAG;
1839 
1840  int JTI;
1841  unsigned TargetFlags;
1842 
1843  JumpTableSDNode(int jti, EVT VT, bool isTarg, unsigned TF)
1844  : SDNode(isTarg ? ISD::TargetJumpTable : ISD::JumpTable,
1845  0, DebugLoc(), getSDVTList(VT)), JTI(jti), TargetFlags(TF) {
1846  }
1847 
1848 public:
1849  int getIndex() const { return JTI; }
1850  unsigned getTargetFlags() const { return TargetFlags; }
1851 
1852  static bool classof(const SDNode *N) {
1853  return N->getOpcode() == ISD::JumpTable ||
1854  N->getOpcode() == ISD::TargetJumpTable;
1855  }
1856 };
1857 
1858 class ConstantPoolSDNode : public SDNode {
1859  friend class SelectionDAG;
1860 
1861  union {
1864  } Val;
1865  int Offset; // It's a MachineConstantPoolValue if top bit is set.
1866  Align Alignment; // Minimum alignment requirement of CP.
1867  unsigned TargetFlags;
1868 
1869  ConstantPoolSDNode(bool isTarget, const Constant *c, EVT VT, int o,
1870  Align Alignment, unsigned TF)
1871  : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, 0,
1872  DebugLoc(), getSDVTList(VT)),
1873  Offset(o), Alignment(Alignment), TargetFlags(TF) {
1874  assert(Offset >= 0 && "Offset is too large");
1875  Val.ConstVal = c;
1876  }
1877 
1878  ConstantPoolSDNode(bool isTarget, MachineConstantPoolValue *v, EVT VT, int o,
1879  Align Alignment, unsigned TF)
1880  : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, 0,
1881  DebugLoc(), getSDVTList(VT)),
1882  Offset(o), Alignment(Alignment), TargetFlags(TF) {
1883  assert(Offset >= 0 && "Offset is too large");
1884  Val.MachineCPVal = v;
1885  Offset |= 1 << (sizeof(unsigned)*CHAR_BIT-1);
1886  }
1887 
1888 public:
1890  return Offset < 0;
1891  }
1892 
1893  const Constant *getConstVal() const {
1894  assert(!isMachineConstantPoolEntry() && "Wrong constantpool type");
1895  return Val.ConstVal;
1896  }
1897 
1899  assert(isMachineConstantPoolEntry() && "Wrong constantpool type");
1900  return Val.MachineCPVal;
1901  }
1902 
1903  int getOffset() const {
1904  return Offset & ~(1 << (sizeof(unsigned)*CHAR_BIT-1));
1905  }
1906 
1907  // Return the alignment of this constant pool object, which is either 0 (for
1908  // default alignment) or the desired value.
1909  Align getAlign() const { return Alignment; }
1910  unsigned getTargetFlags() const { return TargetFlags; }
1911 
1912  Type *getType() const;
1913 
1914  static bool classof(const SDNode *N) {
1915  return N->getOpcode() == ISD::ConstantPool ||
1916  N->getOpcode() == ISD::TargetConstantPool;
1917  }
1918 };
1919 
1920 /// Completely target-dependent object reference.
1921 class TargetIndexSDNode : public SDNode {
1922  friend class SelectionDAG;
1923 
1924  unsigned TargetFlags;
1925  int Index;
1926  int64_t Offset;
1927 
1928 public:
1929  TargetIndexSDNode(int Idx, EVT VT, int64_t Ofs, unsigned TF)
1930  : SDNode(ISD::TargetIndex, 0, DebugLoc(), getSDVTList(VT)),
1931  TargetFlags(TF), Index(Idx), Offset(Ofs) {}
1932 
1933  unsigned getTargetFlags() const { return TargetFlags; }
1934  int getIndex() const { return Index; }
1935  int64_t getOffset() const { return Offset; }
1936 
1937  static bool classof(const SDNode *N) {
1938  return N->getOpcode() == ISD::TargetIndex;
1939  }
1940 };
1941 
1942 class BasicBlockSDNode : public SDNode {
1943  friend class SelectionDAG;
1944 
1946 
1947  /// Debug info is meaningful and potentially useful here, but we create
1948  /// blocks out of order when they're jumped to, which makes it a bit
1949  /// harder. Let's see if we need it first.
1950  explicit BasicBlockSDNode(MachineBasicBlock *mbb)
1951  : SDNode(ISD::BasicBlock, 0, DebugLoc(), getSDVTList(MVT::Other)), MBB(mbb)
1952  {}
1953 
1954 public:
1955  MachineBasicBlock *getBasicBlock() const { return MBB; }
1956 
1957  static bool classof(const SDNode *N) {
1958  return N->getOpcode() == ISD::BasicBlock;
1959  }
1960 };
1961 
1962 /// A "pseudo-class" with methods for operating on BUILD_VECTORs.
1963 class BuildVectorSDNode : public SDNode {
1964 public:
1965  // These are constructed as SDNodes and then cast to BuildVectorSDNodes.
1966  explicit BuildVectorSDNode() = delete;
1967 
1968  /// Check if this is a constant splat, and if so, find the
1969  /// smallest element size that splats the vector. If MinSplatBits is
1970  /// nonzero, the element size must be at least that large. Note that the
1971  /// splat element may be the entire vector (i.e., a one element vector).
1972  /// Returns the splat element value in SplatValue. Any undefined bits in
1973  /// that value are zero, and the corresponding bits in the SplatUndef mask
1974  /// are set. The SplatBitSize value is set to the splat element size in
1975  /// bits. HasAnyUndefs is set to true if any bits in the vector are
1976  /// undefined. isBigEndian describes the endianness of the target.
1977  bool isConstantSplat(APInt &SplatValue, APInt &SplatUndef,
1978  unsigned &SplatBitSize, bool &HasAnyUndefs,
1979  unsigned MinSplatBits = 0,
1980  bool isBigEndian = false) const;
1981 
1982  /// Returns the demanded splatted value or a null value if this is not a
1983  /// splat.
1984  ///
1985  /// The DemandedElts mask indicates the elements that must be in the splat.
1986  /// If passed a non-null UndefElements bitvector, it will resize it to match
1987  /// the vector width and set the bits where elements are undef.
1988  SDValue getSplatValue(const APInt &DemandedElts,
1989  BitVector *UndefElements = nullptr) const;
1990 
1991  /// Returns the splatted value or a null value if this is not a splat.
1992  ///
1993  /// If passed a non-null UndefElements bitvector, it will resize it to match
1994  /// the vector width and set the bits where elements are undef.
1995  SDValue getSplatValue(BitVector *UndefElements = nullptr) const;
1996 
1997  /// Find the shortest repeating sequence of values in the build vector.
1998  ///
1999  /// e.g. { u, X, u, X, u, u, X, u } -> { X }
2000  /// { X, Y, u, Y, u, u, X, u } -> { X, Y }
2001  ///
2002  /// Currently this must be a power-of-2 build vector.
2003  /// The DemandedElts mask indicates the elements that must be present,
2004  /// undemanded elements in Sequence may be null (SDValue()). If passed a
2005  /// non-null UndefElements bitvector, it will resize it to match the original
2006  /// vector width and set the bits where elements are undef. If result is
2007  /// false, Sequence will be empty.
2008  bool getRepeatedSequence(const APInt &DemandedElts,
2010  BitVector *UndefElements = nullptr) const;
2011 
2012  /// Find the shortest repeating sequence of values in the build vector.
2013  ///
2014  /// e.g. { u, X, u, X, u, u, X, u } -> { X }
2015  /// { X, Y, u, Y, u, u, X, u } -> { X, Y }
2016  ///
2017  /// Currently this must be a power-of-2 build vector.
2018  /// If passed a non-null UndefElements bitvector, it will resize it to match
2019  /// the original vector width and set the bits where elements are undef.
2020  /// If result is false, Sequence will be empty.
2022  BitVector *UndefElements = nullptr) const;
2023 
2024  /// Returns the demanded splatted constant or null if this is not a constant
2025  /// splat.
2026  ///
2027  /// The DemandedElts mask indicates the elements that must be in the splat.
2028  /// If passed a non-null UndefElements bitvector, it will resize it to match
2029  /// the vector width and set the bits where elements are undef.
2030  ConstantSDNode *
2031  getConstantSplatNode(const APInt &DemandedElts,
2032  BitVector *UndefElements = nullptr) const;
2033 
2034  /// Returns the splatted constant or null if this is not a constant
2035  /// splat.
2036  ///
2037  /// If passed a non-null UndefElements bitvector, it will resize it to match
2038  /// the vector width and set the bits where elements are undef.
2039  ConstantSDNode *
2040  getConstantSplatNode(BitVector *UndefElements = nullptr) const;
2041 
2042  /// Returns the demanded splatted constant FP or null if this is not a
2043  /// constant FP splat.
2044  ///
2045  /// The DemandedElts mask indicates the elements that must be in the splat.
2046  /// If passed a non-null UndefElements bitvector, it will resize it to match
2047  /// the vector width and set the bits where elements are undef.
2049  getConstantFPSplatNode(const APInt &DemandedElts,
2050  BitVector *UndefElements = nullptr) const;
2051 
2052  /// Returns the splatted constant FP or null if this is not a constant
2053  /// FP splat.
2054  ///
2055  /// If passed a non-null UndefElements bitvector, it will resize it to match
2056  /// the vector width and set the bits where elements are undef.
2058  getConstantFPSplatNode(BitVector *UndefElements = nullptr) const;
2059 
2060  /// If this is a constant FP splat and the splatted constant FP is an
2061  /// exact power or 2, return the log base 2 integer value. Otherwise,
2062  /// return -1.
2063  ///
2064  /// The BitWidth specifies the necessary bit precision.
2065  int32_t getConstantFPSplatPow2ToLog2Int(BitVector *UndefElements,
2066  uint32_t BitWidth) const;
2067 
2068  /// Extract the raw bit data from a build vector of Undef, Constant or
2069  /// ConstantFP node elements. Each raw bit element will be \p
2070  /// DstEltSizeInBits wide, undef elements are treated as zero, and entirely
2071  /// undefined elements are flagged in \p UndefElements.
2072  bool getConstantRawBits(bool IsLittleEndian, unsigned DstEltSizeInBits,
2073  SmallVectorImpl<APInt> &RawBitElements,
2074  BitVector &UndefElements) const;
2075 
2076  bool isConstant() const;
2077 
2078  /// Recast bit data \p SrcBitElements to \p DstEltSizeInBits wide elements.
2079  /// Undef elements are treated as zero, and entirely undefined elements are
2080  /// flagged in \p DstUndefElements.
2081  static void recastRawBits(bool IsLittleEndian, unsigned DstEltSizeInBits,
2082  SmallVectorImpl<APInt> &DstBitElements,
2083  ArrayRef<APInt> SrcBitElements,
2084  BitVector &DstUndefElements,
2085  const BitVector &SrcUndefElements);
2086 
2087  static bool classof(const SDNode *N) {
2088  return N->getOpcode() == ISD::BUILD_VECTOR;
2089  }
2090 };
2091 
2092 /// An SDNode that holds an arbitrary LLVM IR Value. This is
2093 /// used when the SelectionDAG needs to make a simple reference to something
2094 /// in the LLVM IR representation.
2095 ///
2096 class SrcValueSDNode : public SDNode {
2097  friend class SelectionDAG;
2098 
2099  const Value *V;
2100 
2101  /// Create a SrcValue for a general value.
2102  explicit SrcValueSDNode(const Value *v)
2103  : SDNode(ISD::SRCVALUE, 0, DebugLoc(), getSDVTList(MVT::Other)), V(v) {}
2104 
2105 public:
2106  /// Return the contained Value.
2107  const Value *getValue() const { return V; }
2108 
2109  static bool classof(const SDNode *N) {
2110  return N->getOpcode() == ISD::SRCVALUE;
2111  }
2112 };
2113 
2114 class MDNodeSDNode : public SDNode {
2115  friend class SelectionDAG;
2116 
2117  const MDNode *MD;
2118 
2119  explicit MDNodeSDNode(const MDNode *md)
2120  : SDNode(ISD::MDNODE_SDNODE, 0, DebugLoc(), getSDVTList(MVT::Other)), MD(md)
2121  {}
2122 
2123 public:
2124  const MDNode *getMD() const { return MD; }
2125 
2126  static bool classof(const SDNode *N) {
2127  return N->getOpcode() == ISD::MDNODE_SDNODE;
2128  }
2129 };
2130 
2131 class RegisterSDNode : public SDNode {
2132  friend class SelectionDAG;
2133 
2134  Register Reg;
2135 
2136  RegisterSDNode(Register reg, EVT VT)
2137  : SDNode(ISD::Register, 0, DebugLoc(), getSDVTList(VT)), Reg(reg) {}
2138 
2139 public:
2140  Register getReg() const { return Reg; }
2141 
2142  static bool classof(const SDNode *N) {
2143  return N->getOpcode() == ISD::Register;
2144  }
2145 };
2146 
2147 class RegisterMaskSDNode : public SDNode {
2148  friend class SelectionDAG;
2149 
2150  // The memory for RegMask is not owned by the node.
2151  const uint32_t *RegMask;
2152 
2153  RegisterMaskSDNode(const uint32_t *mask)
2155  RegMask(mask) {}
2156 
2157 public:
2158  const uint32_t *getRegMask() const { return RegMask; }
2159 
2160  static bool classof(const SDNode *N) {
2161  return N->getOpcode() == ISD::RegisterMask;
2162  }
2163 };
2164 
2165 class BlockAddressSDNode : public SDNode {
2166  friend class SelectionDAG;
2167 
2168  const BlockAddress *BA;
2169  int64_t Offset;
2170  unsigned TargetFlags;
2171 
2172  BlockAddressSDNode(unsigned NodeTy, EVT VT, const BlockAddress *ba,
2173  int64_t o, unsigned Flags)
2174  : SDNode(NodeTy, 0, DebugLoc(), getSDVTList(VT)),
2175  BA(ba), Offset(o), TargetFlags(Flags) {}
2176 
2177 public:
2178  const BlockAddress *getBlockAddress() const { return BA; }
2179  int64_t getOffset() const { return Offset; }
2180  unsigned getTargetFlags() const { return TargetFlags; }
2181 
2182  static bool classof(const SDNode *N) {
2183  return N->getOpcode() == ISD::BlockAddress ||
2184  N->getOpcode() == ISD::TargetBlockAddress;
2185  }
2186 };
2187 
2188 class LabelSDNode : public SDNode {
2189  friend class SelectionDAG;
2190 
2191  MCSymbol *Label;
2192 
2193  LabelSDNode(unsigned Opcode, unsigned Order, const DebugLoc &dl, MCSymbol *L)
2194  : SDNode(Opcode, Order, dl, getSDVTList(MVT::Other)), Label(L) {
2195  assert(LabelSDNode::classof(this) && "not a label opcode");
2196  }
2197 
2198 public:
2199  MCSymbol *getLabel() const { return Label; }
2200 
2201  static bool classof(const SDNode *N) {
2202  return N->getOpcode() == ISD::EH_LABEL ||
2203  N->getOpcode() == ISD::ANNOTATION_LABEL;
2204  }
2205 };
2206 
2208  friend class SelectionDAG;
2209 
2210  const char *Symbol;
2211  unsigned TargetFlags;
2212 
2213  ExternalSymbolSDNode(bool isTarget, const char *Sym, unsigned TF, EVT VT)
2214  : SDNode(isTarget ? ISD::TargetExternalSymbol : ISD::ExternalSymbol, 0,
2215  DebugLoc(), getSDVTList(VT)),
2216  Symbol(Sym), TargetFlags(TF) {}
2217 
2218 public:
2219  const char *getSymbol() const { return Symbol; }
2220  unsigned getTargetFlags() const { return TargetFlags; }
2221 
2222  static bool classof(const SDNode *N) {
2223  return N->getOpcode() == ISD::ExternalSymbol ||
2224  N->getOpcode() == ISD::TargetExternalSymbol;
2225  }
2226 };
2227 
2228 class MCSymbolSDNode : public SDNode {
2229  friend class SelectionDAG;
2230 
2231  MCSymbol *Symbol;
2232 
2234  : SDNode(ISD::MCSymbol, 0, DebugLoc(), getSDVTList(VT)), Symbol(Symbol) {}
2235 
2236 public:
2237  MCSymbol *getMCSymbol() const { return Symbol; }
2238 
2239  static bool classof(const SDNode *N) {
2240  return N->getOpcode() == ISD::MCSymbol;
2241  }
2242 };
2243 
2244 class CondCodeSDNode : public SDNode {
2245  friend class SelectionDAG;
2246 
2247  ISD::CondCode Condition;
2248 
2250  : SDNode(ISD::CONDCODE, 0, DebugLoc(), getSDVTList(MVT::Other)),
2251  Condition(Cond) {}
2252 
2253 public:
2254  ISD::CondCode get() const { return Condition; }
2255 
2256  static bool classof(const SDNode *N) {
2257  return N->getOpcode() == ISD::CONDCODE;
2258  }
2259 };
2260 
2261 /// This class is used to represent EVT's, which are used
2262 /// to parameterize some operations.
2263 class VTSDNode : public SDNode {
2264  friend class SelectionDAG;
2265 
2266  EVT ValueType;
2267 
2268  explicit VTSDNode(EVT VT)
2269  : SDNode(ISD::VALUETYPE, 0, DebugLoc(), getSDVTList(MVT::Other)),
2270  ValueType(VT) {}
2271 
2272 public:
2273  EVT getVT() const { return ValueType; }
2274 
2275  static bool classof(const SDNode *N) {
2276  return N->getOpcode() == ISD::VALUETYPE;
2277  }
2278 };
2279 
2280 /// Base class for LoadSDNode and StoreSDNode
2281 class LSBaseSDNode : public MemSDNode {
2282 public:
2283  LSBaseSDNode(ISD::NodeType NodeTy, unsigned Order, const DebugLoc &dl,
2284  SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT,
2286  : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
2287  LSBaseSDNodeBits.AddressingMode = AM;
2288  assert(getAddressingMode() == AM && "Value truncated");
2289  }
2290 
2291  const SDValue &getOffset() const {
2292  return getOperand(getOpcode() == ISD::LOAD ? 2 : 3);
2293  }
2294 
2295  /// Return the addressing mode for this load or store:
2296  /// unindexed, pre-inc, pre-dec, post-inc, or post-dec.
2298  return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode);
2299  }
2300 
2301  /// Return true if this is a pre/post inc/dec load/store.
2302  bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
2303 
2304  /// Return true if this is NOT a pre/post inc/dec load/store.
2305  bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
2306 
2307  static bool classof(const SDNode *N) {
2308  return N->getOpcode() == ISD::LOAD ||
2309  N->getOpcode() == ISD::STORE;
2310  }
2311 };
2312 
2313 /// This class is used to represent ISD::LOAD nodes.
2314 class LoadSDNode : public LSBaseSDNode {
2315  friend class SelectionDAG;
2316 
2317  LoadSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
2318  ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
2320  : LSBaseSDNode(ISD::LOAD, Order, dl, VTs, AM, MemVT, MMO) {
2321  LoadSDNodeBits.ExtTy = ETy;
2322  assert(readMem() && "Load MachineMemOperand is not a load!");
2323  assert(!writeMem() && "Load MachineMemOperand is a store!");
2324  }
2325 
2326 public:
2327  /// Return whether this is a plain node,
2328  /// or one of the varieties of value-extending loads.
2330  return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy);
2331  }
2332 
2333  const SDValue &getBasePtr() const { return getOperand(1); }
2334  const SDValue &getOffset() const { return getOperand(2); }
2335 
2336  static bool classof(const SDNode *N) {
2337  return N->getOpcode() == ISD::LOAD;
2338  }
2339 };
2340 
2341 /// This class is used to represent ISD::STORE nodes.
2342 class StoreSDNode : public LSBaseSDNode {
2343  friend class SelectionDAG;
2344 
2345  StoreSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
2346  ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT,
2348  : LSBaseSDNode(ISD::STORE, Order, dl, VTs, AM, MemVT, MMO) {
2349  StoreSDNodeBits.IsTruncating = isTrunc;
2350  assert(!readMem() && "Store MachineMemOperand is a load!");
2351  assert(writeMem() && "Store MachineMemOperand is not a store!");
2352  }
2353 
2354 public:
2355  /// Return true if the op does a truncation before store.
2356  /// For integers this is the same as doing a TRUNCATE and storing the result.
2357  /// For floats, it is the same as doing an FP_ROUND and storing the result.
2358  bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; }
2359  void setTruncatingStore(bool Truncating) {
2360  StoreSDNodeBits.IsTruncating = Truncating;
2361  }
2362 
2363  const SDValue &getValue() const { return getOperand(1); }
2364  const SDValue &getBasePtr() const { return getOperand(2); }
2365  const SDValue &getOffset() const { return getOperand(3); }
2366 
2367  static bool classof(const SDNode *N) {
2368  return N->getOpcode() == ISD::STORE;
2369  }
2370 };
2371 
2372 /// This base class is used to represent VP_LOAD, VP_STORE,
2373 /// EXPERIMENTAL_VP_STRIDED_LOAD and EXPERIMENTAL_VP_STRIDED_STORE nodes
2375 public:
2376  friend class SelectionDAG;
2377 
2378  VPBaseLoadStoreSDNode(ISD::NodeType NodeTy, unsigned Order,
2379  const DebugLoc &DL, SDVTList VTs,
2380  ISD::MemIndexedMode AM, EVT MemVT,
2382  : MemSDNode(NodeTy, Order, DL, VTs, MemVT, MMO) {
2383  LSBaseSDNodeBits.AddressingMode = AM;
2384  assert(getAddressingMode() == AM && "Value truncated");
2385  }
2386 
2387  // VPStridedStoreSDNode (Chain, Data, Ptr, Offset, Stride, Mask, EVL)
2388  // VPStoreSDNode (Chain, Data, Ptr, Offset, Mask, EVL)
2389  // VPStridedLoadSDNode (Chain, Ptr, Offset, Stride, Mask, EVL)
2390  // VPLoadSDNode (Chain, Ptr, Offset, Mask, EVL)
2391  // Mask is a vector of i1 elements;
2392  // the type of EVL is TLI.getVPExplicitVectorLengthTy().
2393  const SDValue &getOffset() const {
2394  return getOperand((getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_LOAD ||
2395  getOpcode() == ISD::VP_LOAD)
2396  ? 2
2397  : 3);
2398  }
2399  const SDValue &getBasePtr() const {
2400  return getOperand((getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_LOAD ||
2401  getOpcode() == ISD::VP_LOAD)
2402  ? 1
2403  : 2);
2404  }
2405  const SDValue &getMask() const {
2406  switch (getOpcode()) {
2407  default:
2408  llvm_unreachable("Invalid opcode");
2409  case ISD::VP_LOAD:
2410  return getOperand(3);
2411  case ISD::VP_STORE:
2412  case ISD::EXPERIMENTAL_VP_STRIDED_LOAD:
2413  return getOperand(4);
2414  case ISD::EXPERIMENTAL_VP_STRIDED_STORE:
2415  return getOperand(5);
2416  }
2417  }
2418  const SDValue &getVectorLength() const {
2419  switch (getOpcode()) {
2420  default:
2421  llvm_unreachable("Invalid opcode");
2422  case ISD::VP_LOAD:
2423  return getOperand(4);
2424  case ISD::VP_STORE:
2425  case ISD::EXPERIMENTAL_VP_STRIDED_LOAD:
2426  return getOperand(5);
2427  case ISD::EXPERIMENTAL_VP_STRIDED_STORE:
2428  return getOperand(6);
2429  }
2430  }
2431 
2432  /// Return the addressing mode for this load or store:
2433  /// unindexed, pre-inc, pre-dec, post-inc, or post-dec.
2435  return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode);
2436  }
2437 
2438  /// Return true if this is a pre/post inc/dec load/store.
2439  bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
2440 
2441  /// Return true if this is NOT a pre/post inc/dec load/store.
2442  bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
2443 
2444  static bool classof(const SDNode *N) {
2445  return N->getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_LOAD ||
2446  N->getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_STORE ||
2447  N->getOpcode() == ISD::VP_LOAD || N->getOpcode() == ISD::VP_STORE;
2448  }
2449 };
2450 
2451 /// This class is used to represent a VP_LOAD node
2453 public:
2454  friend class SelectionDAG;
2455 
2456  VPLoadSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
2457  ISD::MemIndexedMode AM, ISD::LoadExtType ETy, bool isExpanding,
2458  EVT MemVT, MachineMemOperand *MMO)
2459  : VPBaseLoadStoreSDNode(ISD::VP_LOAD, Order, dl, VTs, AM, MemVT, MMO) {
2460  LoadSDNodeBits.ExtTy = ETy;
2461  LoadSDNodeBits.IsExpanding = isExpanding;
2462  }
2463 
2465  return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy);
2466  }
2467 
2468  const SDValue &getBasePtr() const { return getOperand(1); }
2469  const SDValue &getOffset() const { return getOperand(2); }
2470  const SDValue &getMask() const { return getOperand(3); }
2471  const SDValue &getVectorLength() const { return getOperand(4); }
2472 
2473  static bool classof(const SDNode *N) {
2474  return N->getOpcode() == ISD::VP_LOAD;
2475  }
2476  bool isExpandingLoad() const { return LoadSDNodeBits.IsExpanding; }
2477 };
2478 
2479 /// This class is used to represent an EXPERIMENTAL_VP_STRIDED_LOAD node.
2481 public:
2482  friend class SelectionDAG;
2483 
2484  VPStridedLoadSDNode(unsigned Order, const DebugLoc &DL, SDVTList VTs,
2486  bool IsExpanding, EVT MemVT, MachineMemOperand *MMO)
2487  : VPBaseLoadStoreSDNode(ISD::EXPERIMENTAL_VP_STRIDED_LOAD, Order, DL, VTs,
2488  AM, MemVT, MMO) {
2489  LoadSDNodeBits.ExtTy = ETy;
2490  LoadSDNodeBits.IsExpanding = IsExpanding;
2491  }
2492 
2494  return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy);
2495  }
2496 
2497  const SDValue &getBasePtr() const { return getOperand(1); }
2498  const SDValue &getOffset() const { return getOperand(2); }
2499  const SDValue &getStride() const { return getOperand(3); }
2500  const SDValue &getMask() const { return getOperand(4); }
2501  const SDValue &getVectorLength() const { return getOperand(5); }
2502 
2503  static bool classof(const SDNode *N) {
2504  return N->getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_LOAD;
2505  }
2506  bool isExpandingLoad() const { return LoadSDNodeBits.IsExpanding; }
2507 };
2508 
2509 /// This class is used to represent a VP_STORE node
2511 public:
2512  friend class SelectionDAG;
2513 
2514  VPStoreSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
2515  ISD::MemIndexedMode AM, bool isTrunc, bool isCompressing,
2516  EVT MemVT, MachineMemOperand *MMO)
2517  : VPBaseLoadStoreSDNode(ISD::VP_STORE, Order, dl, VTs, AM, MemVT, MMO) {
2518  StoreSDNodeBits.IsTruncating = isTrunc;
2519  StoreSDNodeBits.IsCompressing = isCompressing;
2520  }
2521 
2522  /// Return true if this is a truncating store.
2523  /// For integers this is the same as doing a TRUNCATE and storing the result.
2524  /// For floats, it is the same as doing an FP_ROUND and storing the result.
2525  bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; }
2526 
2527  /// Returns true if the op does a compression to the vector before storing.
2528  /// The node contiguously stores the active elements (integers or floats)
2529  /// in src (those with their respective bit set in writemask k) to unaligned
2530  /// memory at base_addr.
2531  bool isCompressingStore() const { return StoreSDNodeBits.IsCompressing; }
2532 
2533  const SDValue &getValue() const { return getOperand(1); }
2534  const SDValue &getBasePtr() const { return getOperand(2); }
2535  const SDValue &getOffset() const { return getOperand(3); }
2536  const SDValue &getMask() const { return getOperand(4); }
2537  const SDValue &getVectorLength() const { return getOperand(5); }
2538 
2539  static bool classof(const SDNode *N) {
2540  return N->getOpcode() == ISD::VP_STORE;
2541  }
2542 };
2543 
2544 /// This class is used to represent an EXPERIMENTAL_VP_STRIDED_STORE node.
2546 public:
2547  friend class SelectionDAG;
2548 
2549  VPStridedStoreSDNode(unsigned Order, const DebugLoc &DL, SDVTList VTs,
2550  ISD::MemIndexedMode AM, bool IsTrunc, bool IsCompressing,
2551  EVT MemVT, MachineMemOperand *MMO)
2552  : VPBaseLoadStoreSDNode(ISD::EXPERIMENTAL_VP_STRIDED_STORE, Order, DL,
2553  VTs, AM, MemVT, MMO) {
2554  StoreSDNodeBits.IsTruncating = IsTrunc;
2555  StoreSDNodeBits.IsCompressing = IsCompressing;
2556  }
2557 
2558  /// Return true if this is a truncating store.
2559  /// For integers this is the same as doing a TRUNCATE and storing the result.
2560  /// For floats, it is the same as doing an FP_ROUND and storing the result.
2561  bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; }
2562 
2563  /// Returns true if the op does a compression to the vector before storing.
2564  /// The node contiguously stores the active elements (integers or floats)
2565  /// in src (those with their respective bit set in writemask k) to unaligned
2566  /// memory at base_addr.
2567  bool isCompressingStore() const { return StoreSDNodeBits.IsCompressing; }
2568 
2569  const SDValue &getValue() const { return getOperand(1); }
2570  const SDValue &getBasePtr() const { return getOperand(2); }
2571  const SDValue &getOffset() const { return getOperand(3); }
2572  const SDValue &getStride() const { return getOperand(4); }
2573  const SDValue &getMask() const { return getOperand(5); }
2574  const SDValue &getVectorLength() const { return getOperand(6); }
2575 
2576  static bool classof(const SDNode *N) {
2577  return N->getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_STORE;
2578  }
2579 };
2580 
2581 /// This base class is used to represent MLOAD and MSTORE nodes
2583 public:
2584  friend class SelectionDAG;
2585 
2586  MaskedLoadStoreSDNode(ISD::NodeType NodeTy, unsigned Order,
2587  const DebugLoc &dl, SDVTList VTs,
2588  ISD::MemIndexedMode AM, EVT MemVT,
2590  : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
2591  LSBaseSDNodeBits.AddressingMode = AM;
2592  assert(getAddressingMode() == AM && "Value truncated");
2593  }
2594 
2595  // MaskedLoadSDNode (Chain, ptr, offset, mask, passthru)
2596  // MaskedStoreSDNode (Chain, data, ptr, offset, mask)
2597  // Mask is a vector of i1 elements
2598  const SDValue &getOffset() const {
2599  return getOperand(getOpcode() == ISD::MLOAD ? 2 : 3);
2600  }
2601  const SDValue &getMask() const {
2602  return getOperand(getOpcode() == ISD::MLOAD ? 3 : 4);
2603  }
2604 
2605  /// Return the addressing mode for this load or store:
2606  /// unindexed, pre-inc, pre-dec, post-inc, or post-dec.
2608  return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode);
2609  }
2610 
2611  /// Return true if this is a pre/post inc/dec load/store.
2612  bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
2613 
2614  /// Return true if this is NOT a pre/post inc/dec load/store.
2615  bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
2616 
2617  static bool classof(const SDNode *N) {
2618  return N->getOpcode() == ISD::MLOAD ||
2619  N->getOpcode() == ISD::MSTORE;
2620  }
2621 };
2622 
2623 /// This class is used to represent an MLOAD node
2625 public:
2626  friend class SelectionDAG;
2627 
2628  MaskedLoadSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
2630  bool IsExpanding, EVT MemVT, MachineMemOperand *MMO)
2631  : MaskedLoadStoreSDNode(ISD::MLOAD, Order, dl, VTs, AM, MemVT, MMO) {
2632  LoadSDNodeBits.ExtTy = ETy;
2633  LoadSDNodeBits.IsExpanding = IsExpanding;
2634  }
2635 
2637  return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy);
2638  }
2639 
2640  const SDValue &getBasePtr() const { return getOperand(1); }
2641  const SDValue &getOffset() const { return getOperand(2); }
2642  const SDValue &getMask() const { return getOperand(3); }
2643  const SDValue &getPassThru() const { return getOperand(4); }
2644 
2645  static bool classof(const SDNode *N) {
2646  return N->getOpcode() == ISD::MLOAD;
2647  }
2648 
2649  bool isExpandingLoad() const { return LoadSDNodeBits.IsExpanding; }
2650 };
2651 
2652 /// This class is used to represent an MSTORE node
2654 public:
2655  friend class SelectionDAG;
2656 
2657  MaskedStoreSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
2658  ISD::MemIndexedMode AM, bool isTrunc, bool isCompressing,
2659  EVT MemVT, MachineMemOperand *MMO)
2660  : MaskedLoadStoreSDNode(ISD::MSTORE, Order, dl, VTs, AM, MemVT, MMO) {
2661  StoreSDNodeBits.IsTruncating = isTrunc;
2662  StoreSDNodeBits.IsCompressing = isCompressing;
2663  }
2664 
2665  /// Return true if the op does a truncation before store.
2666  /// For integers this is the same as doing a TRUNCATE and storing the result.
2667  /// For floats, it is the same as doing an FP_ROUND and storing the result.
2668  bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; }
2669 
2670  /// Returns true if the op does a compression to the vector before storing.
2671  /// The node contiguously stores the active elements (integers or floats)
2672  /// in src (those with their respective bit set in writemask k) to unaligned
2673  /// memory at base_addr.
2674  bool isCompressingStore() const { return StoreSDNodeBits.IsCompressing; }
2675 
2676  const SDValue &getValue() const { return getOperand(1); }
2677  const SDValue &getBasePtr() const { return getOperand(2); }
2678  const SDValue &getOffset() const { return getOperand(3); }
2679  const SDValue &getMask() const { return getOperand(4); }
2680 
2681  static bool classof(const SDNode *N) {
2682  return N->getOpcode() == ISD::MSTORE;
2683  }
2684 };
2685 
2686 /// This is a base class used to represent
2687 /// VP_GATHER and VP_SCATTER nodes
2688 ///
2690 public:
2691  friend class SelectionDAG;
2692 
2693  VPGatherScatterSDNode(ISD::NodeType NodeTy, unsigned Order,
2694  const DebugLoc &dl, SDVTList VTs, EVT MemVT,
2696  : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
2697  LSBaseSDNodeBits.AddressingMode = IndexType;
2698  assert(getIndexType() == IndexType && "Value truncated");
2699  }
2700 
2701  /// How is Index applied to BasePtr when computing addresses.
2703  return static_cast<ISD::MemIndexType>(LSBaseSDNodeBits.AddressingMode);
2704  }
2705  bool isIndexScaled() const {
2706  return !cast<ConstantSDNode>(getScale())->isOne();
2707  }
2708  bool isIndexSigned() const { return isIndexTypeSigned(getIndexType()); }
2709 
2710  // In the both nodes address is Op1, mask is Op2:
2711  // VPGatherSDNode (Chain, base, index, scale, mask, vlen)
2712  // VPScatterSDNode (Chain, value, base, index, scale, mask, vlen)
2713  // Mask is a vector of i1 elements
2714  const SDValue &getBasePtr() const {
2715  return getOperand((getOpcode() == ISD::VP_GATHER) ? 1 : 2);
2716  }
2717  const SDValue &getIndex() const {
2718  return getOperand((getOpcode() == ISD::VP_GATHER) ? 2 : 3);
2719  }
2720  const SDValue &getScale() const {
2721  return getOperand((getOpcode() == ISD::VP_GATHER) ? 3 : 4);
2722  }
2723  const SDValue &getMask() const {
2724  return getOperand((getOpcode() == ISD::VP_GATHER) ? 4 : 5);
2725  }
2726  const SDValue &getVectorLength() const {
2727  return getOperand((getOpcode() == ISD::VP_GATHER) ? 5 : 6);
2728  }
2729 
2730  static bool classof(const SDNode *N) {
2731  return N->getOpcode() == ISD::VP_GATHER ||
2732  N->getOpcode() == ISD::VP_SCATTER;
2733  }
2734 };
2735 
2736 /// This class is used to represent an VP_GATHER node
2737 ///
2739 public:
2740  friend class SelectionDAG;
2741 
2742  VPGatherSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT,
2744  : VPGatherScatterSDNode(ISD::VP_GATHER, Order, dl, VTs, MemVT, MMO,
2745  IndexType) {}
2746 
2747  static bool classof(const SDNode *N) {
2748  return N->getOpcode() == ISD::VP_GATHER;
2749  }
2750 };
2751 
2752 /// This class is used to represent an VP_SCATTER node
2753 ///
2755 public:
2756  friend class SelectionDAG;
2757 
2758  VPScatterSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT,
2760  : VPGatherScatterSDNode(ISD::VP_SCATTER, Order, dl, VTs, MemVT, MMO,
2761  IndexType) {}
2762 
2763  const SDValue &getValue() const { return getOperand(1); }
2764 
2765  static bool classof(const SDNode *N) {
2766  return N->getOpcode() == ISD::VP_SCATTER;
2767  }
2768 };
2769 
2770 /// This is a base class used to represent
2771 /// MGATHER and MSCATTER nodes
2772 ///
2774 public:
2775  friend class SelectionDAG;
2776 
2778  const DebugLoc &dl, SDVTList VTs, EVT MemVT,
2780  : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
2781  LSBaseSDNodeBits.AddressingMode = IndexType;
2782  assert(getIndexType() == IndexType && "Value truncated");
2783  }
2784 
2785  /// How is Index applied to BasePtr when computing addresses.
2787  return static_cast<ISD::MemIndexType>(LSBaseSDNodeBits.AddressingMode);
2788  }
2789  bool isIndexScaled() const {
2790  return !cast<ConstantSDNode>(getScale())->isOne();
2791  }
2792  bool isIndexSigned() const { return isIndexTypeSigned(getIndexType()); }
2793 
2794  // In the both nodes address is Op1, mask is Op2:
2795  // MaskedGatherSDNode (Chain, passthru, mask, base, index, scale)
2796  // MaskedScatterSDNode (Chain, value, mask, base, index, scale)
2797  // Mask is a vector of i1 elements
2798  const SDValue &getBasePtr() const { return getOperand(3); }
2799  const SDValue &getIndex() const { return getOperand(4); }
2800  const SDValue &getMask() const { return getOperand(2); }
2801  const SDValue &getScale() const { return getOperand(5); }
2802 
2803  static bool classof(const SDNode *N) {
2804  return N->getOpcode() == ISD::MGATHER ||
2805  N->getOpcode() == ISD::MSCATTER;
2806  }
2807 };
2808 
2809 /// This class is used to represent an MGATHER node
2810 ///
2812 public:
2813  friend class SelectionDAG;
2814 
2815  MaskedGatherSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
2816  EVT MemVT, MachineMemOperand *MMO,
2817  ISD::MemIndexType IndexType, ISD::LoadExtType ETy)
2818  : MaskedGatherScatterSDNode(ISD::MGATHER, Order, dl, VTs, MemVT, MMO,
2819  IndexType) {
2820  LoadSDNodeBits.ExtTy = ETy;
2821  }
2822 
2823  const SDValue &getPassThru() const { return getOperand(1); }
2824 
2826  return ISD::LoadExtType(LoadSDNodeBits.ExtTy);
2827  }
2828 
2829  static bool classof(const SDNode *N) {
2830  return N->getOpcode() == ISD::MGATHER;
2831  }
2832 };
2833 
2834 /// This class is used to represent an MSCATTER node
2835 ///
2837 public:
2838  friend class SelectionDAG;
2839 
2840  MaskedScatterSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
2841  EVT MemVT, MachineMemOperand *MMO,
2842  ISD::MemIndexType IndexType, bool IsTrunc)
2843  : MaskedGatherScatterSDNode(ISD::MSCATTER, Order, dl, VTs, MemVT, MMO,
2844  IndexType) {
2845  StoreSDNodeBits.IsTruncating = IsTrunc;
2846  }
2847 
2848  /// Return true if the op does a truncation before store.
2849  /// For integers this is the same as doing a TRUNCATE and storing the result.
2850  /// For floats, it is the same as doing an FP_ROUND and storing the result.
2851  bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; }
2852 
2853  const SDValue &getValue() const { return getOperand(1); }
2854 
2855  static bool classof(const SDNode *N) {
2856  return N->getOpcode() == ISD::MSCATTER;
2857  }
2858 };
2859 
2860 /// An SDNode that represents everything that will be needed
2861 /// to construct a MachineInstr. These nodes are created during the
2862 /// instruction selection proper phase.
2863 ///
2864 /// Note that the only supported way to set the `memoperands` is by calling the
2865 /// `SelectionDAG::setNodeMemRefs` function as the memory management happens
2866 /// inside the DAG rather than in the node.
2867 class MachineSDNode : public SDNode {
2868 private:
2869  friend class SelectionDAG;
2870 
2871  MachineSDNode(unsigned Opc, unsigned Order, const DebugLoc &DL, SDVTList VTs)
2872  : SDNode(Opc, Order, DL, VTs) {}
2873 
2874  // We use a pointer union between a single `MachineMemOperand` pointer and
2875  // a pointer to an array of `MachineMemOperand` pointers. This is null when
2876  // the number of these is zero, the single pointer variant used when the
2877  // number is one, and the array is used for larger numbers.
2878  //
2879  // The array is allocated via the `SelectionDAG`'s allocator and so will
2880  // always live until the DAG is cleaned up and doesn't require ownership here.
2881  //
2882  // We can't use something simpler like `TinyPtrVector` here because `SDNode`
2883  // subclasses aren't managed in a conforming C++ manner. See the comments on
2884  // `SelectionDAG::MorphNodeTo` which details what all goes on, but the
2885  // constraint here is that these don't manage memory with their constructor or
2886  // destructor and can be initialized to a good state even if they start off
2887  // uninitialized.
2889 
2890  // Note that this could be folded into the above `MemRefs` member if doing so
2891  // is advantageous at some point. We don't need to store this in most cases.
2892  // However, at the moment this doesn't appear to make the allocation any
2893  // smaller and makes the code somewhat simpler to read.
2894  int NumMemRefs = 0;
2895 
2896 public:
2898 
2900  // Special case the common cases.
2901  if (NumMemRefs == 0)
2902  return {};
2903  if (NumMemRefs == 1)
2904  return makeArrayRef(MemRefs.getAddrOfPtr1(), 1);
2905 
2906  // Otherwise we have an actual array.
2907  return makeArrayRef(MemRefs.get<MachineMemOperand **>(), NumMemRefs);
2908  }
2909  mmo_iterator memoperands_begin() const { return memoperands().begin(); }
2910  mmo_iterator memoperands_end() const { return memoperands().end(); }
2911  bool memoperands_empty() const { return memoperands().empty(); }
2912 
2913  /// Clear out the memory reference descriptor list.
2914  void clearMemRefs() {
2915  MemRefs = nullptr;
2916  NumMemRefs = 0;
2917  }
2918 
2919  static bool classof(const SDNode *N) {
2920  return N->isMachineOpcode();
2921  }
2922 };
2923 
2924 /// An SDNode that records if a register contains a value that is guaranteed to
2925 /// be aligned accordingly.
2926 class AssertAlignSDNode : public SDNode {
2927  Align Alignment;
2928 
2929 public:
2930  AssertAlignSDNode(unsigned Order, const DebugLoc &DL, EVT VT, Align A)
2931  : SDNode(ISD::AssertAlign, Order, DL, getSDVTList(VT)), Alignment(A) {}
2932 
2933  Align getAlign() const { return Alignment; }
2934 
2935  static bool classof(const SDNode *N) {
2936  return N->getOpcode() == ISD::AssertAlign;
2937  }
2938 };
2939 
2941  const SDNode *Node;
2942  unsigned Operand;
2943 
2944  SDNodeIterator(const SDNode *N, unsigned Op) : Node(N), Operand(Op) {}
2945 
2946 public:
2947  using iterator_category = std::forward_iterator_tag;
2949  using difference_type = std::ptrdiff_t;
2950  using pointer = value_type *;
2952 
2953  bool operator==(const SDNodeIterator& x) const {
2954  return Operand == x.Operand;
2955  }
2956  bool operator!=(const SDNodeIterator& x) const { return !operator==(x); }
2957 
2958  pointer operator*() const {
2959  return Node->getOperand(Operand).getNode();
2960  }
2961  pointer operator->() const { return operator*(); }
2962 
2963  SDNodeIterator& operator++() { // Preincrement
2964  ++Operand;
2965  return *this;
2966  }
2967  SDNodeIterator operator++(int) { // Postincrement
2968  SDNodeIterator tmp = *this; ++*this; return tmp;
2969  }
2970  size_t operator-(SDNodeIterator Other) const {
2971  assert(Node == Other.Node &&
2972  "Cannot compare iterators of two different nodes!");
2973  return Operand - Other.Operand;
2974  }
2975 
2976  static SDNodeIterator begin(const SDNode *N) { return SDNodeIterator(N, 0); }
2977  static SDNodeIterator end (const SDNode *N) {
2978  return SDNodeIterator(N, N->getNumOperands());
2979  }
2980 
2981  unsigned getOperand() const { return Operand; }
2982  const SDNode *getNode() const { return Node; }
2983 };
2984 
2985 template <> struct GraphTraits<SDNode*> {
2986  using NodeRef = SDNode *;
2988 
2989  static NodeRef getEntryNode(SDNode *N) { return N; }
2990 
2992  return SDNodeIterator::begin(N);
2993  }
2994 
2996  return SDNodeIterator::end(N);
2997  }
2998 };
2999 
3000 /// A representation of the largest SDNode, for use in sizeof().
3001 ///
3002 /// This needs to be a union because the largest node differs on 32 bit systems
3003 /// with 4 and 8 byte pointer alignment, respectively.
3004 using LargestSDNode = AlignedCharArrayUnion<AtomicSDNode, TargetIndexSDNode,
3005  BlockAddressSDNode,
3006  GlobalAddressSDNode,
3008 
3009 /// The SDNode class with the greatest alignment requirement.
3011 
3012 namespace ISD {
3013 
3014  /// Returns true if the specified node is a non-extending and unindexed load.
3015  inline bool isNormalLoad(const SDNode *N) {
3016  const LoadSDNode *Ld = dyn_cast<LoadSDNode>(N);
3017  return Ld && Ld->getExtensionType() == ISD::NON_EXTLOAD &&
3019  }
3020 
3021  /// Returns true if the specified node is a non-extending load.
3022  inline bool isNON_EXTLoad(const SDNode *N) {
3023  return isa<LoadSDNode>(N) &&
3024  cast<LoadSDNode>(N)->getExtensionType() == ISD::NON_EXTLOAD;
3025  }
3026 
3027  /// Returns true if the specified node is a EXTLOAD.
3028  inline bool isEXTLoad(const SDNode *N) {
3029  return isa<LoadSDNode>(N) &&
3030  cast<LoadSDNode>(N)->getExtensionType() == ISD::EXTLOAD;
3031  }
3032 
3033  /// Returns true if the specified node is a SEXTLOAD.
3034  inline bool isSEXTLoad(const SDNode *N) {
3035  return isa<LoadSDNode>(N) &&
3036  cast<LoadSDNode>(N)->getExtensionType() == ISD::SEXTLOAD;
3037  }
3038 
3039  /// Returns true if the specified node is a ZEXTLOAD.
3040  inline bool isZEXTLoad(const SDNode *N) {
3041  return isa<LoadSDNode>(N) &&
3042  cast<LoadSDNode>(N)->getExtensionType() == ISD::ZEXTLOAD;
3043  }
3044 
3045  /// Returns true if the specified node is an unindexed load.
3046  inline bool isUNINDEXEDLoad(const SDNode *N) {
3047  return isa<LoadSDNode>(N) &&
3048  cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
3049  }
3050 
3051  /// Returns true if the specified node is a non-truncating
3052  /// and unindexed store.
3053  inline bool isNormalStore(const SDNode *N) {
3054  const StoreSDNode *St = dyn_cast<StoreSDNode>(N);
3055  return St && !St->isTruncatingStore() &&
3057  }
3058 
3059  /// Returns true if the specified node is an unindexed store.
3060  inline bool isUNINDEXEDStore(const SDNode *N) {
3061  return isa<StoreSDNode>(N) &&
3062  cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
3063  }
3064 
3065  /// Attempt to match a unary predicate against a scalar/splat constant or
3066  /// every element of a constant BUILD_VECTOR.
3067  /// If AllowUndef is true, then UNDEF elements will pass nullptr to Match.
3069  std::function<bool(ConstantSDNode *)> Match,
3070  bool AllowUndefs = false);
3071 
3072  /// Attempt to match a binary predicate against a pair of scalar/splat
3073  /// constants or every element of a pair of constant BUILD_VECTORs.
3074  /// If AllowUndef is true, then UNDEF elements will pass nullptr to Match.
3075  /// If AllowTypeMismatch is true then RetType + ArgTypes don't need to match.
3076  bool matchBinaryPredicate(
3078  std::function<bool(ConstantSDNode *, ConstantSDNode *)> Match,
3079  bool AllowUndefs = false, bool AllowTypeMismatch = false);
3080 
3081  /// Returns true if the specified value is the overflow result from one
3082  /// of the overflow intrinsic nodes.
3084  unsigned Opc = Op.getOpcode();
3085  return (Op.getResNo() == 1 &&
3086  (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO ||
3087  Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO));
3088  }
3089 
3090 } // end namespace ISD
3091 
3092 } // end namespace llvm
3093 
3094 #endif // LLVM_CODEGEN_SELECTIONDAGNODES_H
llvm::Check::Size
@ Size
Definition: FileCheck.h:77
llvm::SDNode::getConstantOperandVal
uint64_t getConstantOperandVal(unsigned Num) const
Helper method returns the integer value of a ConstantSDNode operand.
Definition: SelectionDAGNodes.h:1605
llvm::AddrSpaceCastSDNode::AddrSpaceCastSDNode
AddrSpaceCastSDNode(unsigned Order, const DebugLoc &dl, EVT VT, unsigned SrcAS, unsigned DestAS)
Definition: SelectionDAG.cpp:10687
i
i
Definition: README.txt:29
llvm::ISD::ExternalSymbol
@ ExternalSymbol
Definition: ISDOpcodes.h:83
llvm::ISD::isUNINDEXEDStore
bool isUNINDEXEDStore(const SDNode *N)
Returns true if the specified node is an unindexed store.
Definition: SelectionDAGNodes.h:3060
llvm::SDNodeFlags::hasAllowReciprocal
bool hasAllowReciprocal() const
Definition: SelectionDAGNodes.h:429
llvm::MCSymbolSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2239
llvm::SDNode::use_iterator::use_iterator
use_iterator()=default
llvm::LoadSDNode::getOffset
const SDValue & getOffset() const
Definition: SelectionDAGNodes.h:2334
set
We currently generate a but we really shouldn eax ecx xorl edx divl ecx eax divl ecx movl eax ret A similar code sequence works for division We currently compile i32 v2 eax eax jo LBB1_2 atomic and others It is also currently not done for read modify write instructions It is also current not done if the OF or CF flags are needed The shift operators have the complication that when the shift count is EFLAGS is not set
Definition: README.txt:1277
ValueTypes.h
llvm::SDNode::StoreSDNodeBits
StoreSDNodeBitfields StoreSDNodeBits
Definition: SelectionDAGNodes.h:564
llvm::ShuffleVectorSDNode::getSplatIndex
int getSplatIndex() const
Definition: SelectionDAGNodes.h:1530
llvm::ConstantSDNode
Definition: SelectionDAGNodes.h:1564
llvm::RegisterSDNode
Definition: SelectionDAGNodes.h:2131
llvm::MaskedLoadSDNode::getExtensionType
ISD::LoadExtType getExtensionType() const
Definition: SelectionDAGNodes.h:2636
llvm::SDNode::Profile
void Profile(FoldingSetNodeID &ID) const
Gather unique data for the node.
Definition: SelectionDAG.cpp:10711
llvm::MachineMemOperand::isStore
bool isStore() const
Definition: MachineMemOperand.h:288
llvm::StoreSDNode::getBasePtr
const SDValue & getBasePtr() const
Definition: SelectionDAGNodes.h:2364
llvm::isConstOrConstSplat
ConstantSDNode * isConstOrConstSplat(SDValue N, bool AllowUndefs=false, bool AllowTruncation=false)
Returns the SDNode if it is a constant splat BuildVector or constant int.
Definition: SelectionDAG.cpp:10561
llvm::ISD::VECTOR_SHUFFLE
@ VECTOR_SHUFFLE
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition: ISDOpcodes.h:586
llvm::SDValue::dump
void dump() const
Definition: SelectionDAGNodes.h:1177
llvm::ISD::INTRINSIC_VOID
@ INTRINSIC_VOID
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition: ISDOpcodes.h:199
llvm::ISD::isOverflowIntrOpRes
bool isOverflowIntrOpRes(SDValue Op)
Returns true if the specified value is the overflow result from one of the overflow intrinsic nodes.
Definition: SelectionDAGNodes.h:3083
llvm::SDUse
Represents a use of a SDNode.
Definition: SelectionDAGNodes.h:276
llvm::ISD::MemIndexedMode
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
Definition: ISDOpcodes.h:1360
llvm::AddrSpaceCastSDNode::getSrcAddressSpace
unsigned getSrcAddressSpace() const
Definition: SelectionDAGNodes.h:1250
llvm::isConstOrConstSplatFP
ConstantFPSDNode * isConstOrConstSplatFP(SDValue N, bool AllowUndefs=false)
Returns the SDNode if it is a constant splat BuildVector or constant float.
Definition: SelectionDAG.cpp:10620
llvm::VPStridedStoreSDNode::isTruncatingStore
bool isTruncatingStore() const
Return true if this is a truncating store.
Definition: SelectionDAGNodes.h:2561
llvm::MaskedLoadStoreSDNode::getMask
const SDValue & getMask() const
Definition: SelectionDAGNodes.h:2601
llvm::MaskedGatherSDNode
This class is used to represent an MGATHER node.
Definition: SelectionDAGNodes.h:2811
llvm::ISD::UMULO
@ UMULO
Definition: ISDOpcodes.h:332
llvm::VPLoadSDNode::getOffset
const SDValue & getOffset() const
Definition: SelectionDAGNodes.h:2469
llvm::MemSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:1383
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::ISD::JumpTable
@ JumpTable
Definition: ISDOpcodes.h:81
llvm::LifetimeSDNode::getSize
int64_t getSize() const
Definition: SelectionDAGNodes.h:1799
llvm::SDNode::getIROrder
unsigned getIROrder() const
Return the node ordering.
Definition: SelectionDAGNodes.h:719
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
llvm::objcarc::Sequence
Sequence
Definition: PtrState.h:41
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::SDNode::getValueType
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
Definition: SelectionDAGNodes.h:970
llvm::SDNodeFlags::setNoSignedZeros
void setNoSignedZeros(bool b)
Definition: SelectionDAGNodes.h:415
llvm::make_range
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
Definition: iterator_range.h:53
llvm::SDNode::value_op_iterator::operator*
const SDValue & operator*() const
Definition: SelectionDAGNodes.h:928
llvm::VPStoreSDNode::getVectorLength
const SDValue & getVectorLength() const
Definition: SelectionDAGNodes.h:2537
llvm::SDLoc
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Definition: SelectionDAGNodes.h:1090
llvm::VPStridedStoreSDNode
This class is used to represent an EXPERIMENTAL_VP_STRIDED_STORE node.
Definition: SelectionDAGNodes.h:2545
llvm::VPLoadSDNode::getVectorLength
const SDValue & getVectorLength() const
Definition: SelectionDAGNodes.h:2471
Metadata.h
llvm::ISD::LIFETIME_END
@ LIFETIME_END
Definition: ISDOpcodes.h:1223
llvm::VPStoreSDNode::getMask
const SDValue & getMask() const
Definition: SelectionDAGNodes.h:2536
llvm::VPStridedStoreSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2576
llvm::simplify_type< SDValue >::getSimplifiedValue
static SimpleType getSimplifiedValue(SDValue &Val)
Definition: SelectionDAGNodes.h:259
llvm::SDNode::setIROrder
void setIROrder(unsigned Order)
Set the node ordering.
Definition: SelectionDAGNodes.h:722
llvm::MachineMemOperand::getAlign
Align getAlign() const
Return the minimum known alignment in bytes of the actual memory reference.
Definition: MachineOperand.cpp:1087
llvm::ConstantSDNode::getAPIntValue
const APInt & getAPIntValue() const
Definition: SelectionDAGNodes.h:1578
llvm::SDValue::use_empty
bool use_empty() const
Return true if there are no nodes using value ResNo of Node.
Definition: SelectionDAGNodes.h:1165
llvm::ConstantFPSDNode::isNegative
bool isNegative() const
Return true if the value is negative.
Definition: SelectionDAGNodes.h:1637
llvm::ISD::NON_EXTLOAD
@ NON_EXTLOAD
Definition: ISDOpcodes.h:1391
AtomicOrdering.h
llvm::VPGatherScatterSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2730
llvm::EVT::getFixedSizeInBits
uint64_t getFixedSizeInBits() const
Return the size of the specified fixed width value type in bits.
Definition: ValueTypes.h:348
llvm::AssertAlignSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2935
llvm::ISD::ATOMIC_LOAD_UMAX
@ ATOMIC_LOAD_UMAX
Definition: ISDOpcodes.h:1195
llvm::SDNode::NumLSBaseSDNodeBits
@ NumLSBaseSDNodeBits
Definition: SelectionDAGNodes.h:527
llvm::SDValue::getNode
SDNode * getNode() const
get the SDNode which holds the desired result
Definition: SelectionDAGNodes.h:151
llvm::isOneConstant
bool isOneConstant(SDValue V)
Returns true if V is a constant integer one.
Definition: SelectionDAG.cpp:10523
llvm::SDNode::use_size
size_t use_size() const
Return the number of uses of this node.
Definition: SelectionDAGNodes.h:710
llvm::ISD::ConstantFP
@ ConstantFP
Definition: ISDOpcodes.h:77
llvm::VPStoreSDNode::getOffset
const SDValue & getOffset() const
Definition: SelectionDAGNodes.h:2535
llvm::VPGatherScatterSDNode::isIndexScaled
bool isIndexScaled() const
Definition: SelectionDAGNodes.h:2705
llvm::ISD::LIFETIME_START
@ LIFETIME_START
This corresponds to the llvm.lifetime.
Definition: ISDOpcodes.h:1222
llvm::SDNode::getMaxNumOperands
static constexpr size_t getMaxNumOperands()
Return the maximum number of operands that a SDNode can hold.
Definition: SelectionDAGNodes.h:898
llvm::SDNodeFlags::setAllowContract
void setAllowContract(bool b)
Definition: SelectionDAGNodes.h:417
llvm::ISD::UADDO
@ UADDO
Definition: ISDOpcodes.h:324
llvm::SDNode::intersectFlagsWith
void intersectFlagsWith(const SDNodeFlags Flags)
Clear any flags in this node that aren't also set in Flags.
Definition: SelectionDAG.cpp:10866
llvm::ISD::ATOMIC_LOAD_CLR
@ ATOMIC_LOAD_CLR
Definition: ISDOpcodes.h:1188
llvm::SDNode::use_iterator::atEnd
bool atEnd() const
Return true if this iterator is at the end of uses list.
Definition: SelectionDAGNodes.h:756
llvm::SDNode::isUndef
bool isUndef() const
Return true if the type of the node type undefined.
Definition: SelectionDAGNodes.h:655
llvm::SDNode::isTargetStrictFPOpcode
bool isTargetStrictFPOpcode() const
Test if this node has a target-specific opcode that may raise FP exceptions (in the <target>ISD names...
Definition: SelectionDAGNodes.h:643
llvm::BuildVectorSDNode::getConstantFPSplatPow2ToLog2Int
int32_t getConstantFPSplatPow2ToLog2Int(BitVector *UndefElements, uint32_t BitWidth) const
If this is a constant FP splat and the splatted constant FP is an exact power or 2,...
Definition: SelectionDAG.cpp:11471
llvm::TargetIndexSDNode::getOffset
int64_t getOffset() const
Definition: SelectionDAGNodes.h:1935
llvm::DenseMapInfo< SDValue >::isEqual
static bool isEqual(const SDValue &LHS, const SDValue &RHS)
Definition: SelectionDAGNodes.h:249
llvm::SDNode::op_values
iterator_range< value_op_iterator > op_values() const
Definition: SelectionDAGNodes.h:931
llvm::AtomicSDNode::isCompareAndSwap
bool isCompareAndSwap() const
Returns true if this SDNode represents cmpxchg atomic operation, false otherwise.
Definition: SelectionDAGNodes.h:1440
TypeSize.h
llvm::VPStridedStoreSDNode::getOffset
const SDValue & getOffset() const
Definition: SelectionDAGNodes.h:2571
llvm::ISD::MLOAD
@ MLOAD
Definition: ISDOpcodes.h:1205
llvm::MemSDNode::getSyncScopeID
SyncScope::ID getSyncScopeID() const
Returns the synchronization scope ID for this memory operation.
Definition: SelectionDAGNodes.h:1315
op
#define op(i)
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1185
llvm::SDNodeFlags::hasNoNaNs
bool hasNoNaNs() const
Definition: SelectionDAGNodes.h:426
llvm::isMinSignedConstant
bool isMinSignedConstant(SDValue V)
Returns true if V is a constant min signed integer value.
Definition: SelectionDAG.cpp:10528
llvm::MemSDNode::getMergedOrdering
AtomicOrdering getMergedOrdering() const
Return a single atomic ordering that is at least as strong as both the success and failure orderings ...
Definition: SelectionDAGNodes.h:1327
llvm::MaskedStoreSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2681
llvm::MachineMemOperand::isLoad
bool isLoad() const
Definition: MachineMemOperand.h:287
llvm::MachineMemOperand::getOffset
int64_t getOffset() const
For normal values, this is a byte offset added to the base address.
Definition: MachineMemOperand.h:226
llvm::ISD::CONDCODE
@ CONDCODE
Definition: ISDOpcodes.h:73
llvm::iterator_adaptor_base< value_op_iterator, op_iterator, std::random_access_iterator_tag, SDValue, ptrdiff_t, value_op_iterator *, value_op_iterator * >::I
op_iterator I
Definition: iterator.h:241
llvm::ISD::TargetIndex
@ TargetIndex
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition: ISDOpcodes.h:177
llvm::SDVTList::NumVTs
unsigned int NumVTs
Definition: SelectionDAGNodes.h:80
llvm::MachineSDNode
An SDNode that represents everything that will be needed to construct a MachineInstr.
Definition: SelectionDAGNodes.h:2867
llvm::ConstantSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:1599
llvm::SDNodeFlags::SDNodeFlags
SDNodeFlags()
Default constructor turns off all optimization flags.
Definition: SelectionDAGNodes.h:392
ErrorHandling.h
llvm::isBitwiseNot
bool isBitwiseNot(SDValue V, bool AllowUndefs=false)
Returns true if V is a bitwise not operation.
Definition: SelectionDAG.cpp:10551
llvm::SDValue::SDValue
SDValue()=default
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::ISD::MGATHER
@ MGATHER
Definition: ISDOpcodes.h:1217
llvm::VTSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2275
llvm::SDNodeIterator::operator->
pointer operator->() const
Definition: SelectionDAGNodes.h:2961
llvm::LifetimeSDNode::hasOffset
bool hasOffset() const
Definition: SelectionDAGNodes.h:1794
llvm::ShuffleVectorSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:1559
llvm::ISD::EH_LABEL
@ EH_LABEL
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
Definition: ISDOpcodes.h:1033
llvm::MachineSDNode::memoperands_begin
mmo_iterator memoperands_begin() const
Definition: SelectionDAGNodes.h:2909
llvm::isAllOnesOrAllOnesSplat
bool isAllOnesOrAllOnesSplat(const MachineInstr &MI, const MachineRegisterInfo &MRI, bool AllowUndefs=false)
Return true if the value is a constant -1 integer or a splatted vector of a constant -1 integer (with...
Definition: Utils.cpp:1226
llvm::HandleSDNode
This class is used to form a handle around another node that is persistent and is updated across invo...
Definition: SelectionDAGNodes.h:1217
llvm::ISD::MemIndexType
MemIndexType
MemIndexType enum - This enum defines how to interpret MGATHER/SCATTER's index parameter when calcula...
Definition: ISDOpcodes.h:1373
llvm::MemSDNode::getMemoryVT
EVT getMemoryVT() const
Return the type of the in-memory value.
Definition: SelectionDAGNodes.h:1341
llvm::MemSDNode::getChain
const SDValue & getChain() const
Definition: SelectionDAGNodes.h:1364
llvm::LifetimeSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:1805
llvm::SDNode
Represents one node in the SelectionDAG.
Definition: SelectionDAGNodes.h:454
llvm::GlobalAddressSDNode::getTargetFlags
unsigned getTargetFlags() const
Definition: SelectionDAGNodes.h:1748
llvm::ConstantPool
Definition: ConstantPools.h:43
llvm::ConstantSDNode::isAllOnes
bool isAllOnes() const
Definition: SelectionDAGNodes.h:1591
llvm::SDNodeIterator::operator-
size_t operator-(SDNodeIterator Other) const
Definition: SelectionDAGNodes.h:2970
llvm::LoadSDNode
This class is used to represent ISD::LOAD nodes.
Definition: SelectionDAGNodes.h:2314
llvm::MVT::Glue
@ Glue
Definition: MachineValueType.h:270
llvm::RegisterMaskSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2160
llvm::SDNode::use_iterator
This class provides iterator support for SDUse operands that use a specific SDNode.
Definition: SelectionDAGNodes.h:733
llvm::VPLoadSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2473
llvm::MaskedGatherScatterSDNode::getMask
const SDValue & getMask() const
Definition: SelectionDAGNodes.h:2800
llvm::MachineSDNode::memoperands_empty
bool memoperands_empty() const
Definition: SelectionDAGNodes.h:2911
llvm::MachineConstantPoolValue
Abstract base class for all machine specific constantpool value subclasses.
Definition: MachineConstantPool.h:35
llvm::Depth
@ Depth
Definition: SIMachineScheduler.h:36
llvm::VPStridedLoadSDNode::getOffset
const SDValue & getOffset() const
Definition: SelectionDAGNodes.h:2498
llvm::MemIntrinsicSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:1489
llvm::AAMDNodes
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
Definition: Metadata.h:652
llvm::VPStridedStoreSDNode::getBasePtr
const SDValue & getBasePtr() const
Definition: SelectionDAGNodes.h:2570
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
llvm::MemSDNode::getBasePtr
const SDValue & getBasePtr() const
Definition: SelectionDAGNodes.h:1366
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition: MachineMemOperand.h:127
llvm::iterator_adaptor_base
CRTP base class for adapting an iterator to a different type.
Definition: iterator.h:235
llvm::VPGatherScatterSDNode::getBasePtr
const SDValue & getBasePtr() const
Definition: SelectionDAGNodes.h:2714
llvm::MaskedLoadSDNode::MaskedLoadSDNode
MaskedLoadSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, ISD::MemIndexedMode AM, ISD::LoadExtType ETy, bool IsExpanding, EVT MemVT, MachineMemOperand *MMO)
Definition: SelectionDAGNodes.h:2628
llvm::SDNode::StoreSDNodeBitfields
Definition: SelectionDAGNodes.h:543
llvm::LargestSDNode
AlignedCharArrayUnion< AtomicSDNode, TargetIndexSDNode, BlockAddressSDNode, GlobalAddressSDNode, PseudoProbeSDNode > LargestSDNode
A representation of the largest SDNode, for use in sizeof().
Definition: SelectionDAGNodes.h:3007
llvm::MaskedStoreSDNode
This class is used to represent an MSTORE node.
Definition: SelectionDAGNodes.h:2653
llvm::SDValue::isTargetOpcode
bool isTargetOpcode() const
Definition: SelectionDAGNodes.h:1145
isBigEndian
static Optional< bool > isBigEndian(const SmallDenseMap< int64_t, int64_t, 8 > &MemOffset2Idx, int64_t LowestIdx)
Given a map from byte offsets in memory to indices in a load/store, determine if that map corresponds...
Definition: CombinerHelper.cpp:108
llvm::LabelSDNode::getLabel
MCSymbol * getLabel() const
Definition: SelectionDAGNodes.h:2199
llvm::VPGatherSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2747
llvm::SDNode::isPredecessorOf
bool isPredecessorOf(const SDNode *N) const
Return true if this node is a predecessor of N.
Definition: SelectionDAGNodes.h:817
llvm::SDNode::MemSDNodeBits
MemSDNodeBitfields MemSDNodeBits
Definition: SelectionDAGNodes.h:561
Offset
uint64_t Offset
Definition: ELFObjHandler.cpp:79
llvm::MemSDNode
This is an abstract virtual class for memory operations.
Definition: SelectionDAGNodes.h:1259
llvm::VPLoadSDNode::VPLoadSDNode
VPLoadSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, ISD::MemIndexedMode AM, ISD::LoadExtType ETy, bool isExpanding, EVT MemVT, MachineMemOperand *MMO)
Definition: SelectionDAGNodes.h:2456
llvm::SDNodeFlags::setAllowReassociation
void setAllowReassociation(bool b)
Definition: SelectionDAGNodes.h:419
llvm::SDNode::printrFull
void printrFull(raw_ostream &O, const SelectionDAG *G=nullptr) const
Print a SelectionDAG node and all children down to the leaves.
Definition: SelectionDAGDumper.cpp:1039
llvm::SDNodeIterator::getOperand
unsigned getOperand() const
Definition: SelectionDAGNodes.h:2981
llvm::ISD::isConstantSplatVectorAllZeros
bool isConstantSplatVectorAllZeros(const SDNode *N, bool BuildVectorOnly=false)
Return true if the specified node is a BUILD_VECTOR or SPLAT_VECTOR where all of the elements are 0 o...
Definition: SelectionDAG.cpp:218
Operator.h
llvm::VPLoadSDNode::isExpandingLoad
bool isExpandingLoad() const
Definition: SelectionDAGNodes.h:2476
llvm::ConstantSDNode::isZero
bool isZero() const
Definition: SelectionDAGNodes.h:1588
llvm::AddrSpaceCastSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:1253
llvm::simplify_type< const SDValue >::getSimplifiedValue
static SimpleType getSimplifiedValue(const SDValue &Val)
Definition: SelectionDAGNodes.h:266
llvm::max
Expected< ExpressionValue > max(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Definition: FileCheck.cpp:337
llvm::AtomicSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:1454
AlignOf.h
llvm::MipsISD::Ret
@ Ret
Definition: MipsISelLowering.h:119
llvm::SDNode::printr
void printr(raw_ostream &OS, const SelectionDAG *G=nullptr) const
Definition: SelectionDAGDumper.cpp:947
llvm::ISD::EXTLOAD
@ EXTLOAD
Definition: ISDOpcodes.h:1391
llvm::SmallVectorImpl::pop_back_val
LLVM_NODISCARD T pop_back_val()
Definition: SmallVector.h:654
llvm::LSBaseSDNode::isIndexed
bool isIndexed() const
Return true if this is a pre/post inc/dec load/store.
Definition: SelectionDAGNodes.h:2302
RHS
Value * RHS
Definition: X86PartialReduction.cpp:76
llvm::FPMathOperator::hasNoNaNs
bool hasNoNaNs() const
Test if this operation's arguments and results are assumed not-NaN.
Definition: Operator.h:254
llvm::SDNodeIterator::iterator_category
std::forward_iterator_tag iterator_category
Definition: SelectionDAGNodes.h:2947
llvm::HandleSDNode::HandleSDNode
HandleSDNode(SDValue X)
Definition: SelectionDAGNodes.h:1221
llvm::AssertAlignSDNode::getAlign
Align getAlign() const
Definition: SelectionDAGNodes.h:2933
llvm::SDNode::SDNodeBitfields
Definition: SelectionDAGNodes.h:475
llvm::MaskedGatherScatterSDNode
This is a base class used to represent MGATHER and MSCATTER nodes.
Definition: SelectionDAGNodes.h:2773
tmp
alloca< 16 x float >, align 16 %tmp2=alloca< 16 x float >, align 16 store< 16 x float > %A,< 16 x float > *%tmp %s=bitcast< 16 x float > *%tmp to i8 *%s2=bitcast< 16 x float > *%tmp2 to i8 *call void @llvm.memcpy.i64(i8 *%s, i8 *%s2, i64 64, i32 16) %R=load< 16 x float > *%tmp2 ret< 16 x float > %R } declare void @llvm.memcpy.i64(i8 *nocapture, i8 *nocapture, i64, i32) nounwind which compiles to:_foo:subl $140, %esp movaps %xmm3, 112(%esp) movaps %xmm2, 96(%esp) movaps %xmm1, 80(%esp) movaps %xmm0, 64(%esp) movl 60(%esp), %eax movl %eax, 124(%esp) movl 56(%esp), %eax movl %eax, 120(%esp) movl 52(%esp), %eax< many many more 32-bit copies > movaps(%esp), %xmm0 movaps 16(%esp), %xmm1 movaps 32(%esp), %xmm2 movaps 48(%esp), %xmm3 addl $140, %esp ret On Nehalem, it may even be cheaper to just use movups when unaligned than to fall back to lower-granularity chunks. Implement processor-specific optimizations for parity with GCC on these processors. GCC does two optimizations:1. ix86_pad_returns inserts a noop before ret instructions if immediately preceded by a conditional branch or is the target of a jump. 2. ix86_avoid_jump_misspredicts inserts noops in cases where a 16-byte block of code contains more than 3 branches. The first one is done for all AMDs, Core2, and "Generic" The second one is done for:Atom, Pentium Pro, all AMDs, Pentium 4, Nocona, Core 2, and "Generic" Testcase:int x(int a) { return(a &0xf0)> >4 tmp
Definition: README.txt:1347
llvm::VPStoreSDNode::getValue
const SDValue & getValue() const
Definition: SelectionDAGNodes.h:2533
llvm::SDNodeIterator::difference_type
std::ptrdiff_t difference_type
Definition: SelectionDAGNodes.h:2949
llvm::SDNode::isDivergent
bool isDivergent() const
Definition: SelectionDAGNodes.h:700
llvm::SDNode::use_iterator::operator*
SDNode * operator*() const
Retrieve a pointer to the current user node.
Definition: SelectionDAGNodes.h:770
llvm::BlockAddressSDNode
Definition: SelectionDAGNodes.h:2165
llvm::ConstantPoolSDNode::getAlign
Align getAlign() const
Definition: SelectionDAGNodes.h:1909
llvm::SDNode::use_iterator::iterator_category
std::forward_iterator_tag iterator_category
Definition: SelectionDAGNodes.h:741
llvm::MachineMemOperand::getAAInfo
AAMDNodes getAAInfo() const
Return the AA tags for the memory reference.
Definition: MachineMemOperand.h:257
llvm::MachineMemOperand::isUnordered
bool isUnordered() const
Returns true if this memory operation doesn't have any ordering constraints other than normal aliasin...
Definition: MachineMemOperand.h:303
llvm::ArrayRef::const_iterator
const_pointer const_iterator
Definition: ArrayRef.h:50
llvm::GraphTraits< SDNode * >::child_end
static ChildIteratorType child_end(NodeRef N)
Definition: SelectionDAGNodes.h:2995
llvm::SDNode::RawSDNodeBits
char RawSDNodeBits[sizeof(uint16_t)]
Definition: SelectionDAGNodes.h:558
llvm::VPStridedLoadSDNode
This class is used to represent an EXPERIMENTAL_VP_STRIDED_LOAD node.
Definition: SelectionDAGNodes.h:2480
llvm::Data
@ Data
Definition: SIMachineScheduler.h:55
llvm::PointerUnion::get
T get() const
Returns the value of the specified pointer type.
Definition: PointerUnion.h:155
llvm::SDUse::SDUse
SDUse()=default
p
the resulting code requires compare and branches when and if * p
Definition: README.txt:396
llvm::SDUse::get
const SDValue & get() const
If implicit conversion to SDValue doesn't work, the get() method returns the SDValue.
Definition: SelectionDAGNodes.h:296
llvm::MaskedScatterSDNode::isTruncatingStore
bool isTruncatingStore() const
Return true if the op does a truncation before store.
Definition: SelectionDAGNodes.h:2851
llvm::VPScatterSDNode::getValue
const SDValue & getValue() const
Definition: SelectionDAGNodes.h:2763
llvm::ConstantSDNode::getConstantIntValue
const ConstantInt * getConstantIntValue() const
Definition: SelectionDAGNodes.h:1577
llvm::VPBaseLoadStoreSDNode::getVectorLength
const SDValue & getVectorLength() const
Definition: SelectionDAGNodes.h:2418
llvm::ISD::ATOMIC_LOAD_OR
@ ATOMIC_LOAD_OR
Definition: ISDOpcodes.h:1189
llvm::SDUse::getResNo
unsigned getResNo() const
Convenience function for get().getResNo().
Definition: SelectionDAGNodes.h:307
llvm::RISCVFenceField::R
@ R
Definition: RISCVBaseInfo.h:240
llvm::SDNode::getVTList
SDVTList getVTList() const
Definition: SelectionDAGNodes.h:936
llvm::ConstantSDNode::getLimitedValue
uint64_t getLimitedValue(uint64_t Limit=UINT64_MAX)
Definition: SelectionDAGNodes.h:1581
llvm::MDNodeSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2126
llvm::MemSDNode::isUnordered
bool isUnordered() const
Returns true if the memory operation doesn't imply any ordering constraints on surrounding memory ope...
Definition: SelectionDAGNodes.h:1335
llvm::ShuffleVectorSDNode
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
Definition: SelectionDAGNodes.h:1506
llvm::FPMathOperator::hasNoInfs
bool hasNoInfs() const
Test if this operation's arguments and results are assumed not-infinite.
Definition: Operator.h:259
llvm::MaskedLoadStoreSDNode::isIndexed
bool isIndexed() const
Return true if this is a pre/post inc/dec load/store.
Definition: SelectionDAGNodes.h:2612
llvm::ConstantFPSDNode::isNaN
bool isNaN() const
Return true if the value is a NaN.
Definition: SelectionDAGNodes.h:1631
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:55
llvm::ISD::PSEUDO_PROBE
@ PSEUDO_PROBE
Pseudo probe for AutoFDO, as a place holder in a basic block to improve the sample counts quality.
Definition: ISDOpcodes.h:1242
llvm::SDNodeIterator::begin
static SDNodeIterator begin(const SDNode *N)
Definition: SelectionDAGNodes.h:2976
MachineValueType.h
llvm::SDNode::value_begin
value_iterator value_begin() const
Definition: SelectionDAGNodes.h:991
llvm::SDNodeFlags::setApproximateFuncs
void setApproximateFuncs(bool b)
Definition: SelectionDAGNodes.h:418
llvm::MaskedLoadSDNode::getPassThru
const SDValue & getPassThru() const
Definition: SelectionDAGNodes.h:2643
llvm::MaskedGatherSDNode::getPassThru
const SDValue & getPassThru() const
Definition: SelectionDAGNodes.h:2823
GraphTraits.h
llvm::ConstantFPSDNode::isValueValidForType
static bool isValueValidForType(EVT VT, const APFloat &Val)
Definition: SelectionDAG.cpp:122
llvm::SDNode::op_end
op_iterator op_end() const
Definition: SelectionDAGNodes.h:916
llvm::SDNodeFlags::copyFMF
void copyFMF(const FPMathOperator &FPMO)
Propagate the fast-math-flags from an IR FPMathOperator.
Definition: SelectionDAGNodes.h:399
llvm::MaskedLoadStoreSDNode
This base class is used to represent MLOAD and MSTORE nodes.
Definition: SelectionDAGNodes.h:2582
llvm::SDNode::SDNode
SDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs)
Create an SDNode.
Definition: SelectionDAGNodes.h:1068
llvm::MachineMemOperand::getPointerInfo
const MachinePointerInfo & getPointerInfo() const
Definition: MachineMemOperand.h:201
llvm::MemSDNode::isInvariant
bool isInvariant() const
Definition: SelectionDAGNodes.h:1303
llvm::BitmaskEnumDetail::Mask
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition: BitmaskEnum.h:80
Instruction.h
llvm::VPStridedStoreSDNode::VPStridedStoreSDNode
VPStridedStoreSDNode(unsigned Order, const DebugLoc &DL, SDVTList VTs, ISD::MemIndexedMode AM, bool IsTrunc, bool IsCompressing, EVT MemVT, MachineMemOperand *MMO)
Definition: SelectionDAGNodes.h:2549
llvm::ISD::LoadExtType
LoadExtType
LoadExtType enum - This enum defines the three variants of LOADEXT (load with extension).
Definition: ISDOpcodes.h:1391
LHS
Value * LHS
Definition: X86PartialReduction.cpp:75
llvm::BlockAddressSDNode::getOffset
int64_t getOffset() const
Definition: SelectionDAGNodes.h:2179
llvm::HandleSDNode::getValue
const SDValue & getValue() const
Definition: SelectionDAGNodes.h:1238
llvm::ConstantInt
This is the shared class of boolean and integer constants.
Definition: Constants.h:79
llvm::DenseMapInfo
An information struct used to provide DenseMap with the various necessary components for a given valu...
Definition: APInt.h:34
llvm::SDNode::getOpcode
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
Definition: SelectionDAGNodes.h:632
llvm::AMDGPU::TargetIndex
TargetIndex
Definition: AMDGPU.h:338
llvm::SDNode::LoadSDNodeBits
LoadSDNodeBitfields LoadSDNodeBits
Definition: SelectionDAGNodes.h:563
llvm::StoreSDNode::setTruncatingStore
void setTruncatingStore(bool Truncating)
Definition: SelectionDAGNodes.h:2359
llvm::JumpTableSDNode::getTargetFlags
unsigned getTargetFlags() const
Definition: SelectionDAGNodes.h:1850
llvm::SDNode::SDNodeBits
SDNodeBitfields SDNodeBits
Definition: SelectionDAGNodes.h:559
llvm::ISD::GlobalAddress
@ GlobalAddress
Definition: ISDOpcodes.h:78
llvm::ExternalSymbolSDNode
Definition: SelectionDAGNodes.h:2207
llvm::SDValue::getValueType
EVT getValueType() const
Return the ValueType of the referenced return value.
Definition: SelectionDAGNodes.h:1125
llvm::SDValue::operator!=
bool operator!=(const SDValue &O) const
Definition: SelectionDAGNodes.h:161
llvm::MemIntrinsicSDNode
This SDNode is used for target intrinsics that touch memory and need an associated MachineMemOperand.
Definition: SelectionDAGNodes.h:1480
llvm::SDNode::NumMemSDNodeBits
@ NumMemSDNodeBits
Definition: SelectionDAGNodes.h:507
llvm::MutableArrayRef
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:306
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:220
Constants.h
llvm::MachineMemOperand::getBaseAlign
Align getBaseAlign() const
Return the minimum known alignment in bytes of the base address, without the offset.
Definition: MachineMemOperand.h:254
llvm::LoadSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2336
llvm::SDNode::hasOneUse
bool hasOneUse() const
Return true if there is exactly one use of this node.
Definition: SelectionDAGNodes.h:706
llvm::SDNode::areOnlyUsersOf
static bool areOnlyUsersOf(ArrayRef< const SDNode * > Nodes, const SDNode *N)
Return true if all the users of N are contained in Nodes.
Definition: SelectionDAG.cpp:10789
llvm::ISD::Constant
@ Constant
Definition: ISDOpcodes.h:76
llvm::ISD::isBuildVectorOfConstantFPSDNodes
bool isBuildVectorOfConstantFPSDNodes(const SDNode *N)
Return true if the specified node is a BUILD_VECTOR node of all ConstantFPSDNode or undef.
Definition: SelectionDAG.cpp:281
llvm::SmallVectorImpl::append
void append(in_iter in_start, in_iter in_end)
Add the specified range to the end of the SmallVector.
Definition: SmallVector.h:667
llvm::SDValue::reachesChainWithoutSideEffects
bool reachesChainWithoutSideEffects(SDValue Dest, unsigned Depth=2) const
Return true if this operand (which must be a chain) reaches the specified operand without crossing an...
Definition: SelectionDAG.cpp:10821
llvm::BuildVectorSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2087
llvm::User
Definition: User.h:44
llvm::SDNode::setFlags
void setFlags(SDNodeFlags NewFlags)
Definition: SelectionDAGNodes.h:960
llvm::EVT
Extended Value Type.
Definition: ValueTypes.h:34
llvm::MemSDNode::isDereferenceable
bool isDereferenceable() const
Definition: SelectionDAGNodes.h:1302
llvm::SDValue::operator==
bool operator==(const SDValue &O) const
Definition: SelectionDAGNodes.h:158
llvm::SDNodeIterator::operator++
SDNodeIterator operator++(int)
Definition: SelectionDAGNodes.h:2967
llvm::SDNode::isStrictFPOpcode
bool isStrictFPOpcode()
Test if this node is a strict floating point pseudo-op.
Definition: SelectionDAGNodes.h:669
llvm::JumpTableSDNode
Definition: SelectionDAGNodes.h:1837
llvm::EVT::getVectorNumElements
unsigned getVectorNumElements() const
Given a vector type, return the number of elements it contains.
Definition: ValueTypes.h:308
llvm::AtomicSDNode::getFailureOrdering
AtomicOrdering getFailureOrdering() const
For cmpxchg atomic operations, return the atomic ordering requirements when store does not occur.
Definition: SelectionDAGNodes.h:1448
llvm::VPScatterSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2765
llvm::ISD::STRICT_FP16_TO_FP
@ STRICT_FP16_TO_FP
Definition: ISDOpcodes.h:898
llvm::MaskedLoadStoreSDNode::MaskedLoadStoreSDNode
MaskedLoadStoreSDNode(ISD::NodeType NodeTy, unsigned Order, const DebugLoc &dl, SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT, MachineMemOperand *MMO)
Definition: SelectionDAGNodes.h:2586
llvm::MemIntrinsicSDNode::MemIntrinsicSDNode
MemIntrinsicSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemoryVT, MachineMemOperand *MMO)
Definition: SelectionDAGNodes.h:1482
llvm::BasicBlockSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:1957
llvm::VPStridedStoreSDNode::getVectorLength
const SDValue & getVectorLength() const
Definition: SelectionDAGNodes.h:2574
llvm::SDLoc::getIROrder
unsigned getIROrder() const
Definition: SelectionDAGNodes.h:1105
b
the resulting code requires compare and branches when and if the revised code is with conditional branches instead of More there is a byte word extend before each where there should be only and the condition codes are not remembered when the same two values are compared twice More LSR enhancements i8 and i32 load store addressing modes are identical int b
Definition: README.txt:418
llvm::MemSDNode::getRawSubclassData
unsigned getRawSubclassData() const
Return the SubclassData value, without HasDebugValue.
Definition: SelectionDAGNodes.h:1287
llvm::SDNode::dumprWithDepth
void dumprWithDepth(const SelectionDAG *G=nullptr, unsigned depth=100) const
printrWithDepth to dbgs().
Definition: SelectionDAGDumper.cpp:1046
llvm::TargetIndexSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:1937
llvm::MaskedGatherScatterSDNode::MaskedGatherScatterSDNode
MaskedGatherScatterSDNode(ISD::NodeType NodeTy, unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT, MachineMemOperand *MMO, ISD::MemIndexType IndexType)
Definition: SelectionDAGNodes.h:2777
llvm::isIntOrFPConstant
bool isIntOrFPConstant(SDValue V)
Return true if V is either a integer or FP constant.
Definition: SelectionDAGNodes.h:1730
llvm::VPScatterSDNode
This class is used to represent an VP_SCATTER node.
Definition: SelectionDAGNodes.h:2754
UINT64_MAX
#define UINT64_MAX
Definition: DataTypes.h:77
llvm::FrameIndexSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:1773
llvm::simplify_type
Define a template that can be specialized by smart pointers to reflect the fact that they are automat...
Definition: ilist_iterator.h:178
false
Definition: StackSlotColoring.cpp:141
llvm::SrcValueSDNode::getValue
const Value * getValue() const
Return the contained Value.
Definition: SelectionDAGNodes.h:2107
llvm::dwarf::Index
Index
Definition: Dwarf.h:472
llvm::MaybeAlign
This struct is a compact representation of a valid (power of two) or undefined (0) alignment.
Definition: Alignment.h:117
llvm::SDNode::ConstantSDNodeBitfields
Definition: SelectionDAGNodes.h:487
llvm::ShuffleVectorSDNode::isSplat
bool isSplat() const
Definition: SelectionDAGNodes.h:1528
llvm::ISD::NodeType
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
Definition: ISDOpcodes.h:40
llvm::ISD::isUNINDEXEDLoad
bool isUNINDEXEDLoad(const SDNode *N)
Returns true if the specified node is an unindexed load.
Definition: SelectionDAGNodes.h:3046
llvm::SDNodeFlags::setExact
void setExact(bool b)
Definition: SelectionDAGNodes.h:412
llvm::ISD::ADDRSPACECAST
@ ADDRSPACECAST
ADDRSPACECAST - This operator converts between pointers of different address spaces.
Definition: ISDOpcodes.h:890
llvm::SDNode::uses
iterator_range< use_iterator > uses()
Definition: SelectionDAGNodes.h:793
llvm::ISD::ATOMIC_LOAD_AND
@ ATOMIC_LOAD_AND
Definition: ISDOpcodes.h:1187
llvm::SDNode::use_iterator::operator++
use_iterator & operator++()
Definition: SelectionDAGNodes.h:759
llvm::StoreSDNode::getOffset
const SDValue & getOffset() const
Definition: SelectionDAGNodes.h:2365
llvm::RegisterSDNode::getReg
Register getReg() const
Definition: SelectionDAGNodes.h:2140
llvm::MaskedLoadSDNode::getBasePtr
const SDValue & getBasePtr() const
Definition: SelectionDAGNodes.h:2640
llvm::MaskedStoreSDNode::getMask
const SDValue & getMask() const
Definition: SelectionDAGNodes.h:2679
llvm::Instruction
Definition: Instruction.h:42
llvm::rdf::NodeId
uint32_t NodeId
Definition: RDFGraph.h:260
llvm::ISD::MDNODE_SDNODE
@ MDNODE_SDNODE
MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to reference metadata in the IR.
Definition: ISDOpcodes.h:1102
llvm::ISD::ATOMIC_LOAD_UMIN
@ ATOMIC_LOAD_UMIN
Definition: ISDOpcodes.h:1194
llvm::LabelSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2201
llvm::ShuffleVectorSDNode::getMask
ArrayRef< int > getMask() const
Definition: SelectionDAGNodes.h:1518
llvm::peekThroughOneUseBitcasts
SDValue peekThroughOneUseBitcasts(SDValue V)
Return the non-bitcasted and one-use source operand of V if it exists.
Definition: SelectionDAG.cpp:10539
llvm::SDNodeIterator::operator==
bool operator==(const SDNodeIterator &x) const
Definition: SelectionDAGNodes.h:2953
llvm::BuildVectorSDNode::getSplatValue
SDValue getSplatValue(const APInt &DemandedElts, BitVector *UndefElements=nullptr) const
Returns the demanded splatted value or a null value if this is not a splat.
Definition: SelectionDAG.cpp:11354
llvm::SDNode::use_empty
bool use_empty() const
Return true if there are no uses of this node.
Definition: SelectionDAGNodes.h:703
llvm::DenseMapInfo< SDValue >::getHashValue
static unsigned getHashValue(const SDValue &Val)
Definition: SelectionDAGNodes.h:244
llvm::SDNode::isTargetOpcode
bool isTargetOpcode() const
Test if this node has a target-specific opcode (in the <target>ISD namespace).
Definition: SelectionDAGNodes.h:636
llvm::ISD::isBuildVectorOfConstantSDNodes
bool isBuildVectorOfConstantSDNodes(const SDNode *N)
Return true if the specified node is a BUILD_VECTOR node of all ConstantSDNode or undef.
Definition: SelectionDAG.cpp:268
llvm::VPStoreSDNode::getBasePtr
const SDValue & getBasePtr() const
Definition: SelectionDAGNodes.h:2534
llvm::isOneOrOneSplat
bool isOneOrOneSplat(SDValue V, bool AllowUndefs=false)
Return true if the value is a constant 1 integer or a splatted vector of a constant 1 integer (with n...
Definition: SelectionDAG.cpp:10662
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:54
llvm::ConstantFP
ConstantFP - Floating Point Values [float, double].
Definition: Constants.h:257
llvm::MaskedStoreSDNode::getValue
const SDValue & getValue() const
Definition: SelectionDAGNodes.h:2676
APFloat.h
llvm::ISD::ATOMIC_STORE
@ ATOMIC_STORE
OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val) This corresponds to "store atomic" instruction.
Definition: ISDOpcodes.h:1163
llvm::LSBaseSDNode::isUnindexed
bool isUnindexed() const
Return true if this is NOT a pre/post inc/dec load/store.
Definition: SelectionDAGNodes.h:2305
llvm::FrameIndexSDNode
Definition: SelectionDAGNodes.h:1760
BitVector.h
llvm::ConstantSDNode::isMinSignedValue
bool isMinSignedValue() const
Definition: SelectionDAGNodes.h:1595
llvm::MaskedGatherSDNode::MaskedGatherSDNode
MaskedGatherSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT, MachineMemOperand *MMO, ISD::MemIndexType IndexType, ISD::LoadExtType ETy)
Definition: SelectionDAGNodes.h:2815
llvm::ISD::AssertAlign
@ AssertAlign
AssertAlign - These nodes record if a register contains a value that has a known alignment and the tr...
Definition: ISDOpcodes.h:68
DebugLoc.h
SmallPtrSet.h
llvm::SDNode::value_op_iterator::value_op_iterator
value_op_iterator(SDUse *U=nullptr)
Definition: SelectionDAGNodes.h:925
llvm::LabelSDNode
Definition: SelectionDAGNodes.h:2188
llvm::BitVector
Definition: BitVector.h:75
llvm::CondCodeSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2256
llvm::ISD::SMULO
@ SMULO
Same for multiplication.
Definition: ISDOpcodes.h:331
llvm::VPStridedLoadSDNode::getVectorLength
const SDValue & getVectorLength() const
Definition: SelectionDAGNodes.h:2501
llvm::MemSDNode::isNonTemporal
bool isNonTemporal() const
Definition: SelectionDAGNodes.h:1301
llvm::ISD::TargetGlobalAddress
@ TargetGlobalAddress
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition: ISDOpcodes.h:164
Align
uint64_t Align
Definition: ELFObjHandler.cpp:81
llvm::MaskedScatterSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2855
llvm::GlobalAddressSDNode::getGlobal
const GlobalValue * getGlobal() const
Definition: SelectionDAGNodes.h:1746
llvm::MaskedLoadStoreSDNode::isUnindexed
bool isUnindexed() const
Return true if this is NOT a pre/post inc/dec load/store.
Definition: SelectionDAGNodes.h:2615
llvm::FPMathOperator::hasNoSignedZeros
bool hasNoSignedZeros() const
Test if this operation can ignore the sign of zero.
Definition: Operator.h:264
llvm::ConstantSDNode::isOne
bool isOne() const
Definition: SelectionDAGNodes.h:1587
llvm::ISD::UNINDEXED
@ UNINDEXED
Definition: ISDOpcodes.h:1360
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::DenseMapInfo< SDValue >::getEmptyKey
static SDValue getEmptyKey()
Definition: SelectionDAGNodes.h:232
llvm::SDValue::getConstantOperandVal
uint64_t getConstantOperandVal(unsigned i) const
Definition: SelectionDAGNodes.h:1137
force
therefore end up llgh r3 lr r0 br r14 but truncating the load would lh r3 br r14 Functions ret i64 and ought to be implemented ngr r0 br r14 but two address optimizations reverse the order of the AND and force
Definition: README.txt:112
c
the resulting code requires compare and branches when and if the revised code is with conditional branches instead of More there is a byte word extend before each where there should be only and the condition codes are not remembered when the same two values are compared twice More LSR enhancements i8 and i32 load store addressing modes are identical int int c
Definition: README.txt:418
llvm::SDValue::getValueSizeInBits
TypeSize getValueSizeInBits() const
Returns the size of the value in bits.
Definition: SelectionDAGNodes.h:191
llvm::LSBaseSDNode::getOffset
const SDValue & getOffset() const
Definition: SelectionDAGNodes.h:2291
llvm::ISD::USUBO
@ USUBO
Definition: ISDOpcodes.h:328
llvm::MemSDNode::isVolatile
bool isVolatile() const
Definition: SelectionDAGNodes.h:1300
llvm::MachineMemOperand::getSyncScopeID
SyncScope::ID getSyncScopeID() const
Returns the synchronization scope ID for this memory operation.
Definition: MachineMemOperand.h:263
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::StoreSDNode::isTruncatingStore
bool isTruncatingStore() const
Return true if the op does a truncation before store.
Definition: SelectionDAGNodes.h:2358
X
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
llvm::RegisterMaskSDNode
Definition: SelectionDAGNodes.h:2147
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::ISD::VALUETYPE
@ VALUETYPE
Definition: ISDOpcodes.h:72
llvm::TargetIndexSDNode::getTargetFlags
unsigned getTargetFlags() const
Definition: SelectionDAGNodes.h:1933
llvm::SDNode::setDebugLoc
void setDebugLoc(DebugLoc dl)
Set source location info.
Definition: SelectionDAGNodes.h:729
llvm::VPStridedStoreSDNode::isCompressingStore
bool isCompressingStore() const
Returns true if the op does a compression to the vector before storing.
Definition: SelectionDAGNodes.h:2567
llvm::MachineSDNode::memoperands
ArrayRef< MachineMemOperand * > memoperands() const
Definition: SelectionDAGNodes.h:2899
llvm::ISD::ATOMIC_LOAD_FADD
@ ATOMIC_LOAD_FADD
Definition: ISDOpcodes.h:1196
llvm::SDNode::value_op_iterator
Iterator for directly iterating over the operand SDValue's.
Definition: SelectionDAGNodes.h:920
llvm::ISD::TargetConstantFP
@ TargetConstantFP
Definition: ISDOpcodes.h:159
llvm::SDLoc::SDLoc
SDLoc(const SDValue V)
Definition: SelectionDAGNodes.h:1098
llvm::BlockAddressSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2182
llvm::VTSDNode::getVT
EVT getVT() const
Definition: SelectionDAGNodes.h:2273
llvm::SDNode::getGluedUser
SDNode * getGluedUser() const
If this node has a glue value with a user, return the user (there is at most one).
Definition: SelectionDAGNodes.h:952
llvm::MaskedScatterSDNode::MaskedScatterSDNode
MaskedScatterSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT, MachineMemOperand *MMO, ISD::MemIndexType IndexType, bool IsTrunc)
Definition: SelectionDAGNodes.h:2840
Node::dump
DEMANGLE_DUMP_METHOD void dump() const
llvm::MaskedLoadStoreSDNode::getOffset
const SDValue & getOffset() const
Definition: SelectionDAGNodes.h:2598
llvm::SDNodeIterator::operator++
SDNodeIterator & operator++()
Definition: SelectionDAGNodes.h:2963
llvm::ISD::BlockAddress
@ BlockAddress
Definition: ISDOpcodes.h:84
llvm::checkForCycles
void checkForCycles(const SelectionDAG *DAG, bool force=false)
Definition: SelectionDAG.cpp:11758
llvm::SDNode::MemSDNodeBitfields
Definition: SelectionDAGNodes.h:495
llvm::AssertAlignSDNode
An SDNode that records if a register contains a value that is guaranteed to be aligned accordingly.
Definition: SelectionDAGNodes.h:2926
G
const DataFlowGraph & G
Definition: RDFGraph.cpp:200
llvm::AtomicOrdering
AtomicOrdering
Atomic ordering for LLVM's memory model.
Definition: AtomicOrdering.h:56
llvm::ISD::matchUnaryPredicate
bool matchUnaryPredicate(SDValue Op, std::function< bool(ConstantSDNode *)> Match, bool AllowUndefs=false)
Attempt to match a unary predicate against a scalar/splat constant or every element of a constant BUI...
Definition: SelectionDAG.cpp:303
llvm::MaskedScatterSDNode::getValue
const SDValue & getValue() const
Definition: SelectionDAGNodes.h:2853
val
The initial backend is deliberately restricted to z10 We should add support for later architectures at some point If an asm ties an i32 r result to an i64 the input will be treated as an leaving the upper bits uninitialised For i64 store i32 val
Definition: README.txt:15
llvm::APFloat
Definition: APFloat.h:701
llvm::SDNode::use_begin
use_iterator use_begin() const
Provide iteration support to walk over all uses of an SDNode.
Definition: SelectionDAGNodes.h:787
llvm::ISD::Register
@ Register
Definition: ISDOpcodes.h:74
llvm::ISD::isVPOpcode
bool isVPOpcode(unsigned Opcode)
Whether this is a vector-predicated Opcode.
Definition: SelectionDAG.cpp:417
llvm::RISCVFenceField::O
@ O
Definition: RISCVBaseInfo.h:239
llvm::SDValue::getNumOperands
unsigned getNumOperands() const
Definition: SelectionDAGNodes.h:1129
llvm::isNullFPConstant
bool isNullFPConstant(SDValue V)
Returns true if V is an FP constant with a value of positive zero.
Definition: SelectionDAG.cpp:10513
llvm::ISD::SADDO
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition: ISDOpcodes.h:323
llvm::SDUse::getNext
SDUse * getNext() const
Get the next SDUse in the use list.
Definition: SelectionDAGNodes.h:302
llvm::VPGatherScatterSDNode::getIndexType
ISD::MemIndexType getIndexType() const
How is Index applied to BasePtr when computing addresses.
Definition: SelectionDAGNodes.h:2702
llvm::peekThroughBitcasts
SDValue peekThroughBitcasts(SDValue V)
Return the non-bitcasted source operand of V if it exists.
Definition: SelectionDAG.cpp:10533
llvm::GlobalValue
Definition: GlobalValue.h:44
llvm::Constant
This is an important base class in LLVM.
Definition: Constant.h:41
llvm::BuildVectorSDNode::getConstantFPSplatNode
ConstantFPSDNode * getConstantFPSplatNode(const APInt &DemandedElts, BitVector *UndefElements=nullptr) const
Returns the demanded splatted constant FP or null if this is not a constant FP splat.
Definition: SelectionDAG.cpp:11459
llvm::StoreSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2367
llvm::VPGatherScatterSDNode::getScale
const SDValue & getScale() const
Definition: SelectionDAGNodes.h:2720
llvm::EVT::getSizeInBits
TypeSize getSizeInBits() const
Return the size of the specified value type in bits.
Definition: ValueTypes.h:340
Index
uint32_t Index
Definition: ELFObjHandler.cpp:82
uint64_t
llvm::ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS
@ ATOMIC_CMP_SWAP_WITH_SUCCESS
Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b.
Definition: ISDOpcodes.h:1176
llvm::ISD::ATOMIC_LOAD_MIN
@ ATOMIC_LOAD_MIN
Definition: ISDOpcodes.h:1192
llvm::MemSDNode::refineAlignment
void refineAlignment(const MachineMemOperand *NewMMO)
Update this MemSDNode's MachineMemOperand information to reflect the alignment of NewMMO,...
Definition: SelectionDAGNodes.h:1360
llvm::RegisterSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2142
llvm::LifetimeSDNode
This SDNode is used for LIFETIME_START/LIFETIME_END values, which indicate the offet and size that ar...
Definition: SelectionDAGNodes.h:1781
llvm::ConstantFPSDNode
Definition: SelectionDAGNodes.h:1613
llvm::MemSDNode::getMemOperand
MachineMemOperand * getMemOperand() const
Return a MachineMemOperand object describing the memory reference performed by operation.
Definition: SelectionDAGNodes.h:1345
llvm::ISD::FIRST_TARGET_STRICTFP_OPCODE
static const int FIRST_TARGET_STRICTFP_OPCODE
FIRST_TARGET_STRICTFP_OPCODE - Target-specific pre-isel operations which cannot raise FP exceptions s...
Definition: ISDOpcodes.h:1300
const
aarch64 promote const
Definition: AArch64PromoteConstant.cpp:232
llvm::ISD::LOAD
@ LOAD
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
Definition: ISDOpcodes.h:966
llvm::SDUse::getValueType
EVT getValueType() const
Convenience function for get().getValueType().
Definition: SelectionDAGNodes.h:309
llvm::ConstantPoolSDNode::getType
Type * getType() const
Definition: SelectionDAG.cpp:11282
llvm::SDNode::print_details
void print_details(raw_ostream &OS, const SelectionDAG *G) const
Definition: SelectionDAGDumper.cpp:563
llvm::SDNode::hasPredecessor
bool hasPredecessor(const SDNode *N) const
Return true if N is a predecessor of this node.
Definition: SelectionDAG.cpp:10859
llvm::SDValue::isTargetMemoryOpcode
bool isTargetMemoryOpcode() const
Definition: SelectionDAGNodes.h:1149
llvm::ISD::SRCVALUE
@ SRCVALUE
SRCVALUE - This is a node type that holds a Value* that is used to make reference to a value in the L...
Definition: ISDOpcodes.h:1098
llvm::VPLoadSDNode
This class is used to represent a VP_LOAD node.
Definition: SelectionDAGNodes.h:2452
llvm::MaskedStoreSDNode::isTruncatingStore
bool isTruncatingStore() const
Return true if the op does a truncation before store.
Definition: SelectionDAGNodes.h:2668
llvm::ConstantSDNode::getMaybeAlignValue
MaybeAlign getMaybeAlignValue() const
Definition: SelectionDAGNodes.h:1584
llvm::FPMathOperator::hasAllowReciprocal
bool hasAllowReciprocal() const
Test if this operation can use reciprocal multiply instead of division.
Definition: Operator.h:269
llvm::MachinePointerInfo
This class contains a discriminated union of information about pointers in memory operands,...
Definition: MachineMemOperand.h:39
move
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
Definition: README.txt:546
llvm::BuildVectorSDNode::BuildVectorSDNode
BuildVectorSDNode()=delete
llvm::ISD::isConstantSplatVector
bool isConstantSplatVector(const SDNode *N, APInt &SplatValue)
Node predicates.
Definition: SelectionDAG.cpp:139
llvm::VPBaseLoadStoreSDNode::getOffset
const SDValue & getOffset() const
Definition: SelectionDAGNodes.h:2393
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:57
llvm::SDNode::setNodeId
void setNodeId(int Id)
Set unique node id.
Definition: SelectionDAGNodes.h:716
llvm::VPGatherScatterSDNode::getMask
const SDValue & getMask() const
Definition: SelectionDAGNodes.h:2723
llvm::SDLoc::getDebugLoc
const DebugLoc & getDebugLoc() const
Definition: SelectionDAGNodes.h:1106
llvm::SyncScope::ID
uint8_t ID
Definition: LLVMContext.h:47
llvm::SDNode::LSBaseSDNodeBitfields
Definition: SelectionDAGNodes.h:509
llvm::MaskedGatherScatterSDNode::isIndexScaled
bool isIndexScaled() const
Definition: SelectionDAGNodes.h:2789
llvm::ISD::ATOMIC_LOAD_NAND
@ ATOMIC_LOAD_NAND
Definition: ISDOpcodes.h:1191
llvm::SDNode::getOperand
const SDValue & getOperand(unsigned Num) const
Definition: SelectionDAGNodes.h:908
llvm::MaskedStoreSDNode::MaskedStoreSDNode
MaskedStoreSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, ISD::MemIndexedMode AM, bool isTrunc, bool isCompressing, EVT MemVT, MachineMemOperand *MMO)
Definition: SelectionDAGNodes.h:2657
iterator.h
llvm::MaskedLoadSDNode::isExpandingLoad
bool isExpandingLoad() const
Definition: SelectionDAGNodes.h:2649
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::FrameIndexSDNode::getIndex
int getIndex() const
Definition: SelectionDAGNodes.h:1771
llvm::SDNode::use_iterator::getUse
SDUse & getUse() const
Definition: SelectionDAGNodes.h:777
llvm::SDNodeIterator::operator*
pointer operator*() const
Definition: SelectionDAGNodes.h:2958
llvm::SDNodeFlags::setAllowReciprocal
void setAllowReciprocal(bool b)
Definition: SelectionDAGNodes.h:416
llvm::BuildVectorSDNode::recastRawBits
static void recastRawBits(bool IsLittleEndian, unsigned DstEltSizeInBits, SmallVectorImpl< APInt > &DstBitElements, ArrayRef< APInt > SrcBitElements, BitVector &DstUndefElements, const BitVector &SrcUndefElements)
Recast bit data SrcBitElements to DstEltSizeInBits wide elements.
Definition: SelectionDAG.cpp:11524
Attributes
AMDGPU Kernel Attributes
Definition: AMDGPULowerKernelAttributes.cpp:244
llvm::CondCodeSDNode
Definition: SelectionDAGNodes.h:2244
llvm::ISD::ATOMIC_CMP_SWAP
@ ATOMIC_CMP_SWAP
Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) For double-word atomic operations: ValLo,...
Definition: ISDOpcodes.h:1170
node
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper node
Definition: README-SSE.txt:406
llvm::ISD::ATOMIC_LOAD_ADD
@ ATOMIC_LOAD_ADD
Definition: ISDOpcodes.h:1185
llvm::SDNode::use_iterator::difference_type
std::ptrdiff_t difference_type
Definition: SelectionDAGNodes.h:743
llvm::VPStridedLoadSDNode::getExtensionType
ISD::LoadExtType getExtensionType() const
Definition: SelectionDAGNodes.h:2493
llvm::LoadSDNode::getExtensionType
ISD::LoadExtType getExtensionType() const
Return whether this is a plain node, or one of the varieties of value-extending loads.
Definition: SelectionDAGNodes.h:2329
llvm::SDNode::dump
void dump() const
Dump this node, for debugging.
Definition: SelectionDAGDumper.cpp:545
llvm::BasicBlockSDNode
Definition: SelectionDAGNodes.h:1942
llvm::MemSDNode::getOriginalAlign
Align getOriginalAlign() const
Returns alignment and volatility of the memory access.
Definition: SelectionDAGNodes.h:1276
ArrayRef.h
llvm::MachineSDNode::mmo_iterator
ArrayRef< MachineMemOperand * >::const_iterator mmo_iterator
Definition: SelectionDAGNodes.h:2897
llvm::SDValue::getScalarValueSizeInBits
uint64_t getScalarValueSizeInBits() const
Definition: SelectionDAGNodes.h:195
TemplateParamKind::Type
@ Type
llvm::SDNode::ConstantSDNodeBits
ConstantSDNodeBitfields ConstantSDNodeBits
Definition: SelectionDAGNodes.h:560
END_TWO_BYTE_PACK
#define END_TWO_BYTE_PACK()
Definition: SelectionDAGNodes.h:471
llvm::GlobalAddressSDNode::getOffset
int64_t getOffset() const
Definition: SelectionDAGNodes.h:1747
llvm::BlockAddressSDNode::getTargetFlags
unsigned getTargetFlags() const
Definition: SelectionDAGNodes.h:2180
llvm::ISD::MSTORE
@ MSTORE
Definition: ISDOpcodes.h:1206
llvm::JumpTableSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:1852
llvm::StoreSDNode
This class is used to represent ISD::STORE nodes.
Definition: SelectionDAGNodes.h:2342
llvm::ISD::ZEXTLOAD
@ ZEXTLOAD
Definition: ISDOpcodes.h:1391
llvm::SDValue::getValue
SDValue getValue(unsigned R) const
Definition: SelectionDAGNodes.h:171
llvm::AMDGPU::HSAMD::ValueType
ValueType
Value types.
Definition: AMDGPUMetadata.h:100
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::SDNodeFlags::hasNoUnsignedWrap
bool hasNoUnsignedWrap() const
Definition: SelectionDAGNodes.h:423
llvm::FPMathOperator::hasAllowReassoc
bool hasAllowReassoc() const
Test if this operation may be simplified with reassociative transforms.
Definition: Operator.h:249
llvm::FPMathOperator
Utility class for floating point operations which can have information about relaxed accuracy require...
Definition: Operator.h:167
llvm::move
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1675
llvm::LifetimeSDNode::getOffset
int64_t getOffset() const
Definition: SelectionDAGNodes.h:1795
llvm::SDNode::getNodeId
int getNodeId() const
Return the unique node id.
Definition: SelectionDAGNodes.h:713
llvm::SDLoc::SDLoc
SDLoc(const Instruction *I, int Order)
Definition: SelectionDAGNodes.h:1099
memcpy
<%struct.s * > cast struct s *S to sbyte *< sbyte * > sbyte uint cast struct s *agg result to sbyte *< sbyte * > sbyte uint cast struct s *memtmp to sbyte *< sbyte * > sbyte uint ret void llc ends up issuing two memcpy or custom lower memcpy(of small size) to be ldmia/stmia. I think option 2 is better but the current register allocator cannot allocate a chunk of registers at a time. A feasible temporary solution is to use specific physical registers at the lowering time for small(<
llvm::ConstantSDNode::getZExtValue
uint64_t getZExtValue() const
Definition: SelectionDAGNodes.h:1579
llvm::SDValue::getResNo
unsigned getResNo() const
get the index which selects a specific result in the SDNode
Definition: SelectionDAGNodes.h:148
llvm::SDNode::print
void print(raw_ostream &OS, const SelectionDAG *G=nullptr) const
Definition: SelectionDAGDumper.cpp:1056
llvm::MaskedLoadSDNode
This class is used to represent an MLOAD node.
Definition: SelectionDAGNodes.h:2624
llvm::MachineMemOperand::getSuccessOrdering
AtomicOrdering getSuccessOrdering() const
Return the atomic ordering requirements for this memory operation.
Definition: MachineMemOperand.h:270
llvm::MCSymbolSDNode
Definition: SelectionDAGNodes.h:2228
llvm::ISD::CondCode
CondCode
ISD::CondCode enum - These are ordered carefully to make the bitfields below work out,...
Definition: ISDOpcodes.h:1411
llvm::MaskedStoreSDNode::getOffset
const SDValue & getOffset() const
Definition: SelectionDAGNodes.h:2678
iterator_range.h
llvm::ISD::BasicBlock
@ BasicBlock
Various leaf nodes.
Definition: ISDOpcodes.h:71
function
print Print MemDeps of function
Definition: MemDepPrinter.cpp:82
llvm::MemSDNode::MemSDNode
MemSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT memvt, MachineMemOperand *MMO)
Definition: SelectionDAG.cpp:10693
llvm::ExternalSymbolSDNode::getTargetFlags
unsigned getTargetFlags() const
Definition: SelectionDAGNodes.h:2220
llvm::ISD::ATOMIC_LOAD_FSUB
@ ATOMIC_LOAD_FSUB
Definition: ISDOpcodes.h:1197
llvm::ISD::TargetGlobalTLSAddress
@ TargetGlobalTLSAddress
Definition: ISDOpcodes.h:165
llvm::DenseMapInfo< SDValue >::getTombstoneKey
static SDValue getTombstoneKey()
Definition: SelectionDAGNodes.h:238
llvm::MVT
Machine Value Type.
Definition: MachineValueType.h:31
llvm::ISD::isNON_EXTLoad
bool isNON_EXTLoad(const SDNode *N)
Returns true if the specified node is a non-extending load.
Definition: SelectionDAGNodes.h:3022
llvm::SDNode::use_iterator::operator==
bool operator==(const use_iterator &x) const
Definition: SelectionDAGNodes.h:750
llvm::SDNode::dumpr
void dumpr() const
Dump (recursively) this node and its use-def subgraph.
Definition: SelectionDAGDumper.cpp:1004
llvm::SDLoc::SDLoc
SDLoc(const SDNode *N)
Definition: SelectionDAGNodes.h:1097
llvm::SDVTList::VTs
const EVT * VTs
Definition: SelectionDAGNodes.h:79
llvm::MDNode
Metadata node.
Definition: Metadata.h:937
llvm::ShuffleVectorSDNode::ShuffleVectorSDNode
ShuffleVectorSDNode(EVT VT, unsigned Order, const DebugLoc &dl, const int *M)
Definition: SelectionDAGNodes.h:1514
llvm::SDNode::getSimpleValueType
MVT getSimpleValueType(unsigned ResNo) const
Return the type of a specified result as a simple type.
Definition: SelectionDAGNodes.h:976
llvm::StoreSDNode::getValue
const SDValue & getValue() const
Definition: SelectionDAGNodes.h:2363
llvm::SDNode::getValueSizeInBits
TypeSize getValueSizeInBits(unsigned ResNo) const
Returns MVT::getSizeInBits(getValueType(ResNo)).
Definition: SelectionDAGNodes.h:985
llvm::SDNodeFlags::setNoInfs
void setNoInfs(bool b)
Definition: SelectionDAGNodes.h:414
llvm::AssertAlignSDNode::AssertAlignSDNode
AssertAlignSDNode(unsigned Order, const DebugLoc &DL, EVT VT, Align A)
Definition: SelectionDAGNodes.h:2930
llvm::DebugLoc::hasTrivialDestructor
bool hasTrivialDestructor() const
Check whether this has a trivial destructor.
Definition: DebugLoc.h:69
llvm::SmallPtrSetImpl::count
size_type count(ConstPtrType Ptr) const
count - Return 1 if the specified pointer is in the set, 0 otherwise.
Definition: SmallPtrSet.h:383
llvm::FPMathOperator::hasApproxFunc
bool hasApproxFunc() const
Test if this operation allows approximations of math library functions or intrinsics.
Definition: Operator.h:280
llvm::SDNode::isMachineOpcode
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.
Definition: SelectionDAGNodes.h:687
llvm::ISD::TargetBlockAddress
@ TargetBlockAddress
Definition: ISDOpcodes.h:170
llvm::SDNode::values
iterator_range< value_iterator > values() const
Definition: SelectionDAGNodes.h:993
llvm::APInt
Class for arbitrary precision integers.
Definition: APInt.h:75
llvm::VPBaseLoadStoreSDNode::getBasePtr
const SDValue & getBasePtr() const
Definition: SelectionDAGNodes.h:2399
llvm::PseudoProbeSDNode::getGuid
uint64_t getGuid() const
Definition: SelectionDAGNodes.h:1827
llvm::ISD::ANNOTATION_LABEL
@ ANNOTATION_LABEL
ANNOTATION_LABEL - Represents a mid basic block label used by annotations.
Definition: ISDOpcodes.h:1039
llvm::MDNodeSDNode
Definition: SelectionDAGNodes.h:2114
llvm::ISD::HANDLENODE
@ HANDLENODE
HANDLENODE node - Used as a handle for various purposes.
Definition: ISDOpcodes.h:1116
llvm::ISD::ConstantPool
@ ConstantPool
Definition: ISDOpcodes.h:82
llvm::SDLoc::SDLoc
SDLoc()=default
llvm::hasSingleElement
bool hasSingleElement(ContainerTy &&C)
Returns true if the given container only contains a single element.
Definition: STLExtras.h:273
llvm::LSBaseSDNode::LSBaseSDNode
LSBaseSDNode(ISD::NodeType NodeTy, unsigned Order, const DebugLoc &dl, SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT, MachineMemOperand *MMO)
Definition: SelectionDAGNodes.h:2283
ConstantPool
MIPS Relocation Principles In there are several elements of the llvm::ISD::NodeType enum that deal with addresses and or relocations These are defined in include llvm Target TargetSelectionDAG td ConstantPool
Definition: Relocation.txt:6
llvm::SDUse::getUser
SDNode * getUser()
This returns the SDNode that contains this Use.
Definition: SelectionDAGNodes.h:299
llvm::ISD::GlobalTLSAddress
@ GlobalTLSAddress
Definition: ISDOpcodes.h:79
llvm::MemSDNode::getAAInfo
AAMDNodes getAAInfo() const
Returns the AA info that describes the dereference.
Definition: SelectionDAGNodes.h:1309
llvm::BlockAddress
The address of a basic block.
Definition: Constants.h:849
llvm::ISD::TargetConstantPool
@ TargetConstantPool
Definition: ISDOpcodes.h:168
llvm::BuildVectorSDNode::isConstant
bool isConstant() const
Definition: SelectionDAG.cpp:11578
llvm::SDNode::use_iterator::operator->
SDNode * operator->() const
Definition: SelectionDAGNodes.h:775
llvm::MemSDNode::isAtomic
bool isAtomic() const
Return true if the memory operation ordering is Unordered or higher.
Definition: SelectionDAGNodes.h:1330
llvm::VPStridedStoreSDNode::getStride
const SDValue & getStride() const
Definition: SelectionDAGNodes.h:2572
llvm::LifetimeSDNode::getFrameIndex
int64_t getFrameIndex() const
Definition: SelectionDAGNodes.h:1790
llvm::SDNode::print_types
void print_types(raw_ostream &OS, const SelectionDAG *G) const
Definition: SelectionDAGDumper.cpp:553
llvm::ISD::isSEXTLoad
bool isSEXTLoad(const SDNode *N)
Returns true if the specified node is a SEXTLOAD.
Definition: SelectionDAGNodes.h:3034
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::ISD::isNormalLoad
bool isNormalLoad(const SDNode *N)
Returns true if the specified node is a non-extending and unindexed load.
Definition: SelectionDAGNodes.h:3015
llvm::ConstantPoolSDNode
Definition: SelectionDAGNodes.h:1858
llvm::BlockAddressSDNode::getBlockAddress
const BlockAddress * getBlockAddress() const
Definition: SelectionDAGNodes.h:2178
llvm::SrcValueSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2109
llvm::VPBaseLoadStoreSDNode::getAddressingMode
ISD::MemIndexedMode getAddressingMode() const
Return the addressing mode for this load or store: unindexed, pre-inc, pre-dec, post-inc,...
Definition: SelectionDAGNodes.h:2434
llvm::BuildVectorSDNode::isConstantSplat
bool isConstantSplat(APInt &SplatValue, APInt &SplatUndef, unsigned &SplatBitSize, bool &HasAnyUndefs, unsigned MinSplatBits=0, bool isBigEndian=false) const
Check if this is a constant splat, and if so, find the smallest element size that splats the vector.
Definition: SelectionDAG.cpp:11288
llvm::SDNode::use_end
static use_iterator use_end()
Definition: SelectionDAGNodes.h:791
Cond
SmallVector< MachineOperand, 4 > Cond
Definition: BasicBlockSections.cpp:137
llvm::SDNodeFlags::intersectWith
void intersectWith(const SDNodeFlags Flags)
Clear any flags in this flag set that aren't also set in Flags.
Definition: SelectionDAGNodes.h:437
llvm::HandleSDNode::~HandleSDNode
~HandleSDNode()
Definition: SelectionDAG.cpp:10675
llvm::BuildVectorSDNode
A "pseudo-class" with methods for operating on BUILD_VECTORs.
Definition: SelectionDAGNodes.h:1963
llvm::FoldingSetBase::Node
Node - This class is used to maintain the singly linked bucket list in a folding set.
Definition: FoldingSet.h:136
llvm::SDNodeFlags::setNoFPExcept
void setNoFPExcept(bool b)
Definition: SelectionDAGNodes.h:420
llvm::SDNodeFlags::hasApproximateFuncs
bool hasApproximateFuncs() const
Definition: SelectionDAGNodes.h:431
llvm::ShuffleVectorSDNode::getMaskElt
int getMaskElt(unsigned Idx) const
Definition: SelectionDAGNodes.h:1523
llvm::SDNode::uses
iterator_range< use_iterator > uses() const
Definition: SelectionDAGNodes.h:796
llvm::ConstantPoolSDNode::getConstVal
const Constant * getConstVal() const
Definition: SelectionDAGNodes.h:1893
llvm::ConstantPoolSDNode::getOffset
int getOffset() const
Definition: SelectionDAGNodes.h:1903
llvm::SDValue::getMachineOpcode
unsigned getMachineOpcode() const
Definition: SelectionDAGNodes.h:1157
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::VPGatherSDNode
This class is used to represent an VP_GATHER node.
Definition: SelectionDAGNodes.h:2738
llvm::VPGatherScatterSDNode::isIndexSigned
bool isIndexSigned() const
Definition: SelectionDAGNodes.h:2708
llvm::BasicBlockSDNode::getBasicBlock
MachineBasicBlock * getBasicBlock() const
Definition: SelectionDAGNodes.h:1955
llvm::ISD::ATOMIC_LOAD_SUB
@ ATOMIC_LOAD_SUB
Definition: ISDOpcodes.h:1186
llvm::PseudoProbeSDNode::getIndex
uint64_t getIndex() const
Definition: SelectionDAGNodes.h:1828
uint32_t
llvm::SDNode::use_iterator::operator++
use_iterator operator++(int)
Definition: SelectionDAGNodes.h:765
llvm::SDNode::isOperandOf
bool isOperandOf(const SDNode *N) const
Return true if this node is an operand of N.
Definition: SelectionDAG.cpp:10806
llvm::MaskedGatherScatterSDNode::getBasePtr
const SDValue & getBasePtr() const
Definition: SelectionDAGNodes.h:2798
llvm::RegisterMaskSDNode::getRegMask
const uint32_t * getRegMask() const
Definition: SelectionDAGNodes.h:2158
llvm::SDValue::getOperand
const SDValue & getOperand(unsigned i) const
Definition: SelectionDAGNodes.h:1133
llvm::SDNode::LSBaseSDNodeBits
LSBaseSDNodeBitfields LSBaseSDNodeBits
Definition: SelectionDAGNodes.h:562
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
BEGIN_TWO_BYTE_PACK
#define BEGIN_TWO_BYTE_PACK()
Definition: SelectionDAGNodes.h:470
llvm::VTSDNode
This class is used to represent EVT's, which are used to parameterize some operations.
Definition: SelectionDAGNodes.h:2263
llvm::MaskedStoreSDNode::isCompressingStore
bool isCompressingStore() const
Returns true if the op does a compression to the vector before storing.
Definition: SelectionDAGNodes.h:2674
llvm::SDNode::getIndexedModeName
static const char * getIndexedModeName(ISD::MemIndexedMode AM)
Definition: SelectionDAGDumper.cpp:498
llvm::FoldingSetNodeID
FoldingSetNodeID - This class is used to gather all the unique data bits of a node.
Definition: FoldingSet.h:318
llvm::ConstantSDNode::getSExtValue
int64_t getSExtValue() const
Definition: SelectionDAGNodes.h:1580
llvm::SDNodeFlags::hasNoInfs
bool hasNoInfs() const
Definition: SelectionDAGNodes.h:427
llvm::ISD::UNDEF
@ UNDEF
UNDEF - An undefined node.
Definition: ISDOpcodes.h:211
llvm::SDValue::hasOneUse
bool hasOneUse() const
Return true if there is exactly one node using value ResNo of Node.
Definition: SelectionDAGNodes.h:1169
llvm::ISD::BUILTIN_OP_END
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
Definition: ISDOpcodes.h:1294
llvm::VPLoadSDNode::getBasePtr
const SDValue & getBasePtr() const
Definition: SelectionDAGNodes.h:2468
llvm::VPBaseLoadStoreSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2444
llvm::ISD::isIndexTypeSigned
bool isIndexTypeSigned(MemIndexType IndexType)
Definition: ISDOpcodes.h:1377
llvm::SDValue::getSimpleValueType
MVT getSimpleValueType() const
Return the simple ValueType of the referenced return value.
Definition: SelectionDAGNodes.h:182
llvm::SDNode::ops
ArrayRef< SDUse > ops() const
Definition: SelectionDAGNodes.h:917
Node
Definition: ItaniumDemangle.h:155
llvm::AMDGPU::HSAMD::Kernel::Arg::Key::IsVolatile
constexpr char IsVolatile[]
Key for Kernel::Arg::Metadata::mIsVolatile.
Definition: AMDGPUMetadata.h:199
llvm::NVPTX::PTXLdStInstCode::Untyped
@ Untyped
Definition: NVPTX.h:119
llvm::peekThroughExtractSubvectors
SDValue peekThroughExtractSubvectors(SDValue V)
Return the non-extracted vector source operand of V if it exists.
Definition: SelectionDAG.cpp:10545
llvm::JumpTableSDNode::getIndex
int getIndex() const
Definition: SelectionDAGNodes.h:1849
llvm::SDVTList
This represents a list of ValueType's that has been intern'd by a SelectionDAG.
Definition: SelectionDAGNodes.h:78
llvm::ISD::ATOMIC_SWAP
@ ATOMIC_SWAP
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN,...
Definition: ISDOpcodes.h:1184
llvm::MaskedGatherScatterSDNode::getIndexType
ISD::MemIndexType getIndexType() const
How is Index applied to BasePtr when computing addresses.
Definition: SelectionDAGNodes.h:2786
llvm::ISD::SEXTLOAD
@ SEXTLOAD
Definition: ISDOpcodes.h:1391
llvm::VPLoadSDNode::getMask
const SDValue & getMask() const
Definition: SelectionDAGNodes.h:2470
llvm::FPMathOperator::hasAllowContract
bool hasAllowContract() const
Test if this operation can be floating-point contracted (FMA).
Definition: Operator.h:274
llvm::VPBaseLoadStoreSDNode::isIndexed
bool isIndexed() const
Return true if this is a pre/post inc/dec load/store.
Definition: SelectionDAGNodes.h:2439
llvm::VPGatherScatterSDNode::getIndex
const SDValue & getIndex() const
Definition: SelectionDAGNodes.h:2717
llvm::MachinePointerInfo::getAddrSpace
unsigned getAddrSpace() const
Return the LLVM IR address space number that this pointer points into.
Definition: MachineOperand.cpp:981
llvm::PointerUnion< const Value *, const PseudoSourceValue * >
llvm::isNullOrNullSplat
bool isNullOrNullSplat(const MachineInstr &MI, const MachineRegisterInfo &MRI, bool AllowUndefs=false)
Return true if the value is a constant 0 integer or a splatted vector of a constant 0 integer (with n...
Definition: Utils.cpp:1208
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::ilist_node
Definition: ilist_node.h:149
llvm::SmallPtrSetImplBase::size
size_type size() const
Definition: SmallPtrSet.h:93
FoldingSet.h
llvm::LoadSDNode::getBasePtr
const SDValue & getBasePtr() const
Definition: SelectionDAGNodes.h:2333
llvm::VPStridedLoadSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2503
llvm::AddrSpaceCastSDNode::getDestAddressSpace
unsigned getDestAddressSpace() const
Definition: SelectionDAGNodes.h:1251
llvm::SDNode::getOperationName
std::string getOperationName(const SelectionDAG *G=nullptr) const
Return the opcode of this operation for printing.
Definition: SelectionDAGDumper.cpp:58
llvm::SDUse::operator<
bool operator<(const SDValue &V) const
Convenience function for get().operator<.
Definition: SelectionDAGNodes.h:322
llvm::SDNode::isMemIntrinsic
bool isMemIntrinsic() const
Test if this node is a memory intrinsic (with valid pointer information).
Definition: SelectionDAGNodes.h:662
llvm::AtomicSDNode
This is an SDNode representing atomic operations.
Definition: SelectionDAGNodes.h:1426
llvm::ISD::FrameIndex
@ FrameIndex
Definition: ISDOpcodes.h:80
llvm::MemSDNode::writeMem
bool writeMem() const
Definition: SelectionDAGNodes.h:1273
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::SDNode::dumprFull
void dumprFull(const SelectionDAG *G=nullptr) const
printrFull to dbgs().
Definition: SelectionDAGDumper.cpp:1050
llvm::SDNode::isVPOpcode
bool isVPOpcode() const
Test if this node is a vector predication operation.
Definition: SelectionDAGNodes.h:683
llvm::VPStridedLoadSDNode::getMask
const SDValue & getMask() const
Definition: SelectionDAGNodes.h:2500
llvm::SDNode::isOnlyUserOf
bool isOnlyUserOf(const SDNode *N) const
Return true if this node is the only use of N.
Definition: SelectionDAG.cpp:10776
ExternalSymbol
MIPS Relocation Principles In there are several elements of the llvm::ISD::NodeType enum that deal with addresses and or relocations These are defined in include llvm Target TargetSelectionDAG td ExternalSymbol
Definition: Relocation.txt:7
llvm::ConstantFPSDNode::isExactlyValue
bool isExactlyValue(double V) const
We don't rely on operator== working on double values, as it returns true for things that are clearly ...
Definition: SelectionDAGNodes.h:1647
llvm::MaskedGatherScatterSDNode::getScale
const SDValue & getScale() const
Definition: SelectionDAGNodes.h:2801
llvm::VPBaseLoadStoreSDNode::VPBaseLoadStoreSDNode
VPBaseLoadStoreSDNode(ISD::NodeType NodeTy, unsigned Order, const DebugLoc &DL, SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT, MachineMemOperand *MMO)
Definition: SelectionDAGNodes.h:2378
llvm::isAllOnesConstant
bool isAllOnesConstant(SDValue V)
Returns true if V is an integer constant with all bits set.
Definition: SelectionDAG.cpp:10518
llvm::MachineSDNode::clearMemRefs
void clearMemRefs()
Clear out the memory reference descriptor list.
Definition: SelectionDAGNodes.h:2914
llvm::ConstantFPSDNode::getConstantFPValue
const ConstantFP * getConstantFPValue() const
Definition: SelectionDAGNodes.h:1625
llvm::SDValue::operator<
bool operator<(const SDValue &O) const
Definition: SelectionDAGNodes.h:164
llvm::MaskedStoreSDNode::getBasePtr
const SDValue & getBasePtr() const
Definition: SelectionDAGNodes.h:2677
llvm::VPGatherSDNode::VPGatherSDNode
VPGatherSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT, MachineMemOperand *MMO, ISD::MemIndexType IndexType)
Definition: SelectionDAGNodes.h:2742
llvm::SDNodeIterator::operator!=
bool operator!=(const SDNodeIterator &x) const
Definition: SelectionDAGNodes.h:2956
std
Definition: BitVector.h:851
llvm::GlobalAddressSDNode
Definition: SelectionDAGNodes.h:1734
llvm::VPStridedLoadSDNode::VPStridedLoadSDNode
VPStridedLoadSDNode(unsigned Order, const DebugLoc &DL, SDVTList VTs, ISD::MemIndexedMode AM, ISD::LoadExtType ETy, bool IsExpanding, EVT MemVT, MachineMemOperand *MMO)
Definition: SelectionDAGNodes.h:2484
llvm::SDNode::LoadSDNodeBitfields
Definition: SelectionDAGNodes.h:529
llvm::VPScatterSDNode::VPScatterSDNode
VPScatterSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT, MachineMemOperand *MMO, ISD::MemIndexType IndexType)
Definition: SelectionDAGNodes.h:2758
llvm::SDNode::getNumOperands
unsigned getNumOperands() const
Return the number of values used by this operation.
Definition: SelectionDAGNodes.h:895
llvm::GraphTraits< SDNode * >::getEntryNode
static NodeRef getEntryNode(SDNode *N)
Definition: SelectionDAGNodes.h:2989
llvm::SDNodeFlags::hasNoSignedWrap
bool hasNoSignedWrap() const
Definition: SelectionDAGNodes.h:424
llvm::ISD::isEXTLoad
bool isEXTLoad(const SDNode *N)
Returns true if the specified node is a EXTLOAD.
Definition: SelectionDAGNodes.h:3028
llvm::ConstantSDNode::isMaxSignedValue
bool isMaxSignedValue() const
Definition: SelectionDAGNodes.h:1594
uint16_t
llvm::SDNodeIterator
Definition: SelectionDAGNodes.h:2940
llvm::ConstantPoolSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:1914
llvm::MaskedLoadStoreSDNode::getAddressingMode
ISD::MemIndexedMode getAddressingMode() const
Return the addressing mode for this load or store: unindexed, pre-inc, pre-dec, post-inc,...
Definition: SelectionDAGNodes.h:2607
llvm::isNullConstant
bool isNullConstant(SDValue V)
Returns true if V is a constant integer zero.
Definition: SelectionDAG.cpp:10508
llvm::EVT::getScalarType
EVT getScalarType() const
If this is a vector type, return the element type, otherwise return this.
Definition: ValueTypes.h:295
llvm::getBitwiseNotOperand
SDValue getBitwiseNotOperand(SDValue V, SDValue Mask, bool AllowUndefs)
If V is a bitwise not, returns the inverted operand.
Definition: SelectionDAG.cpp:4701
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:345
llvm::ISD::STRICT_FP_TO_FP16
@ STRICT_FP_TO_FP16
Definition: ISDOpcodes.h:899
llvm::ISD::TargetExternalSymbol
@ TargetExternalSymbol
Definition: ISDOpcodes.h:169
llvm::MemSDNode::getAddressSpace
unsigned getAddressSpace() const
Return the address space for the associated pointer.
Definition: SelectionDAGNodes.h:1352
llvm::BuildVectorSDNode::getConstantSplatNode
ConstantSDNode * getConstantSplatNode(const APInt &DemandedElts, BitVector *UndefElements=nullptr) const
Returns the demanded splatted constant or null if this is not a constant splat.
Definition: SelectionDAG.cpp:11447
llvm::Align::value
uint64_t value() const
This is a hole in the type system and should not be abused.
Definition: Alignment.h:85
llvm::MCSymbolSDNode::getMCSymbol
MCSymbol * getMCSymbol() const
Definition: SelectionDAGNodes.h:2237
llvm::MDNodeSDNode::getMD
const MDNode * getMD() const
Definition: SelectionDAGNodes.h:2124
llvm::MemSDNode::getAlignment
unsigned getAlignment() const
Definition: SelectionDAGNodes.h:1279
llvm::SDNode::printrWithDepth
void printrWithDepth(raw_ostream &O, const SelectionDAG *G=nullptr, unsigned depth=100) const
Print a SelectionDAG node and children up to depth "depth." The given SelectionDAG allows target-spec...
Definition: SelectionDAGDumper.cpp:1034
JumpTable
MIPS Relocation Principles In there are several elements of the llvm::ISD::NodeType enum that deal with addresses and or relocations These are defined in include llvm Target TargetSelectionDAG td JumpTable
Definition: Relocation.txt:6
llvm::ConstantFPSDNode::isInfinity
bool isInfinity() const
Return true if the value is an infinity.
Definition: SelectionDAGNodes.h:1634
llvm::VPStridedLoadSDNode::isExpandingLoad
bool isExpandingLoad() const
Definition: SelectionDAGNodes.h:2506
ISDOpcodes.h
llvm::TypeSize
Definition: TypeSize.h:435
llvm::TargetIndexSDNode
Completely target-dependent object reference.
Definition: SelectionDAGNodes.h:1921
llvm::MaskedLoadStoreSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2617
llvm::ISD::BUILD_VECTOR
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
Definition: ISDOpcodes.h:514
Casting.h
llvm::MemSDNode::MMO
MachineMemOperand * MMO
Memory reference information.
Definition: SelectionDAGNodes.h:1266
llvm::PointerUnion::getAddrOfPtr1
const First * getAddrOfPtr1() const
If the union is set to the first pointer type get an address pointing to it.
Definition: PointerUnion.h:168
llvm::BitWidth
constexpr unsigned BitWidth
Definition: BitmaskEnum.h:147
llvm::SDNode::use_iterator::operator!=
bool operator!=(const use_iterator &x) const
Definition: SelectionDAGNodes.h:751
llvm::ConstantPoolSDNode::ConstVal
const Constant * ConstVal
Definition: SelectionDAGNodes.h:1862
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::MachineSDNode::memoperands_end
mmo_iterator memoperands_end() const
Definition: SelectionDAGNodes.h:2910
x
TODO unsigned x
Definition: README.txt:10
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition: SelectionDAGNodes.h:137
llvm::SDValue::operator->
SDNode * operator->() const
Definition: SelectionDAGNodes.h:156
llvm::AddrSpaceCastSDNode
Definition: SelectionDAGNodes.h:1241
llvm::LSBaseSDNode::getAddressingMode
ISD::MemIndexedMode getAddressingMode() const
Return the addressing mode for this load or store: unindexed, pre-inc, pre-dec, post-inc,...
Definition: SelectionDAGNodes.h:2297
llvm::SDNode::addUse
void addUse(SDUse &U)
This method should only be used by the SDUse class.
Definition: SelectionDAGNodes.h:1056
llvm::ISD::TargetConstant
@ TargetConstant
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...
Definition: ISDOpcodes.h:158
llvm::SDUse::operator!=
bool operator!=(const SDValue &V) const
Convenience function for get().operator!=.
Definition: SelectionDAGNodes.h:317
llvm::MaskedGatherSDNode::getExtensionType
ISD::LoadExtType getExtensionType() const
Definition: SelectionDAGNodes.h:2825
llvm::SDNode::getNumValues
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
Definition: SelectionDAGNodes.h:967
llvm::SrcValueSDNode
An SDNode that holds an arbitrary LLVM IR Value.
Definition: SelectionDAGNodes.h:2096
llvm::MachineSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:2919
llvm::MachineMemOperand::isAtomic
bool isAtomic() const
Returns true if this operation has an atomic ordering requirement of unordered or higher,...
Definition: MachineMemOperand.h:296
llvm::TargetIndexSDNode::getIndex
int getIndex() const
Definition: SelectionDAGNodes.h:1934
llvm::PseudoProbeSDNode::classof
static bool classof(const SDNode *N)
Definition: SelectionDAGNodes.h:1832
llvm::SDNodeFlags
These are IR-level optimization flags that may be propagated to SDNodes.
Definition: SelectionDAGNodes.h:370
llvm::SDNodeFlags::hasExact
bool hasExact() const
Definition: SelectionDAGNodes.h:425
llvm::SDNode::getDebugLoc
const DebugLoc & getDebugLoc() const
Return the source location info.
Definition: SelectionDAGNodes.h:725
llvm::MachineMemOperand::getMergedOrdering
AtomicOrdering getMergedOrdering() const
Return a single atomic ordering that is at least as strong as both the success and failure orderings ...
Definition: MachineMemOperand.h:283
llvm::MachineMemOperand::refineAlignment
void refineAlignment(const MachineMemOperand *MMO)
Update this MachineMemOperand to reflect the alignment of MMO, if it has a greater alignment.
Definition: MachineOperand.cpp:1068
llvm::VPGatherScatterSDNode
This is a base class used to represent VP_GATHER and VP_SCATTER nodes.
Definition: SelectionDAGNodes.h:2689
llvm::ISD::STORE
@ STORE
Definition: ISDOpcodes.h:967
llvm::SDNodeFlags::hasAllowReassociation
bool hasAllowReassociation() const
Definition: SelectionDAGNodes.h:432
llvm::ISD::SSUBO
@ SSUBO
Same for subtraction.
Definition: ISDOpcodes.h:327
llvm::SDValue::isUndef
bool isUndef() const
Definition: SelectionDAGNodes.h:1161
llvm::MemSDNode::isSimple
bool isSimple() const
Returns true if the memory operation is neither atomic or volatile.
Definition: SelectionDAGNodes.h:1338
llvm::AtomicSDNode::getVal
const SDValue & getVal() const
Definition: SelectionDAGNodes.h:1436
llvm::ExternalSymbolSDNode::getSymbol
const char * getSymbol() const
Definition: SelectionDAGNodes.h:2219
llvm::SDNode::getMachineOpcode
unsigned getMachineOpcode() const
This may only be called if isMachineOpcode returns true.
Definition: SelectionDAGNodes.h:692
llvm::SDNode::PersistentId
uint16_t PersistentId
Unique and persistent id per SDNode in the DAG.
Definition: SelectionDAGNodes.h:622
llvm::makeArrayRef
ArrayRef< T > makeArrayRef(const T &OneElt)
Construct an ArrayRef from a single element.
Definition: ArrayRef.h:475
llvm::ARMBuildAttrs::Symbol
@ Symbol
Definition: ARMBuildAttributes.h:83
llvm::MaskedLoadSDNode::getMask
const SDValue & getMask() const
Definition