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13 #ifndef LLVM_BINARYFORMAT_MACHO_H
14 #define LLVM_BINARYFORMAT_MACHO_H
95 #define HANDLE_LOAD_COMMAND(LCName, LCValue, LCStruct) LCName = LCValue,
98 #include "llvm/BinaryFormat/MachO.def"
101 #undef HANDLE_LOAD_COMMAND
966 #if defined(BYTE_ORDER) && defined(BIG_ENDIAN) && (BYTE_ORDER == BIG_ENDIAN)
1417 return (((n_desc) >> 8u) & 0xffu);
1421 n_desc = (((n_desc)&0x00ff) | (((ordinal)&0xff) << 8));
1425 return (n_desc >> 8u) & 0x0fu;
1429 n_desc = ((n_desc & 0xf0ffu) | ((
align & 0x0fu) << 8u));
1495 return Family | (
Model << 4);
1498 return ((
int)
ST) & 0x0f;
1835 for (
int i = 0;
i < 13;
i++)
1854 for (
int i = 0;
i < 29;
i++)
2025 #define LOAD_COMMAND_STRUCT(LCStruct) LCStruct LCStruct##_data;
2029 #include "llvm/BinaryFormat/MachO.def"
@ S_CSTRING_LITERALS
S_CSTRING_LITERALS - Section with literal C strings.
@ CS_SUPPL_SIGNER_TYPE_UNKNOWN
const uint32_t PPC_THREAD_STATE_COUNT
@ ARM64_RELOC_TLVP_LOAD_PAGEOFF12
@ BIND_OPCODE_SET_DYLIB_ORDINAL_IMM
@ CSSLOT_ALTERNATE_CODEDIRECTORY_MAX
uint32_t compatibility_version
@ CS_DATAVAULT_CONTROLLER
This is an optimization pass for GlobalISel generic memory operations.
@ PLATFORM_WATCHOSSIMULATOR
@ BIND_OPCODE_DO_BIND_ADD_ADDR_IMM_SCALED
#define LLVM_PACKED_START
x86_exception_state64_t es64
@ REFERENCE_FLAG_UNDEFINED_NON_LAZY
void swapByteOrder(T &Value)
@ kSecCodeSignatureHashSHA512
@ EXPORT_SYMBOL_FLAGS_KIND_ABSOLUTE
@ MH_ALLOW_STACK_EXECUTION
@ CPU_SUBTYPE_POWERPC_603ev
@ BIND_OPCODE_SET_SEGMENT_AND_OFFSET_ULEB
@ kSecCodeSignatureHashSHA384
@ CS_HASHTYPE_SHA256_TRUNCATED
@ REBASE_OPCODE_SET_TYPE_IMM
@ MH_NO_REEXPORTED_DYLIBS
const uint32_t x86_EXCEPTION_STATE64_COUNT
Triple - Helper class for working with autoconf configuration names.
@ ARM_RELOC_LOCAL_SECTDIFF
void SET_LIBRARY_ORDINAL(uint16_t &n_desc, uint8_t ordinal)
@ S_LITERAL_POINTERS
S_LITERAL_POINTERS - Section with pointers to literals.
@ EXPORT_SYMBOL_FLAGS_STUB_AND_RESOLVER
@ REBASE_OPCODE_ADD_ADDR_ULEB
arm_thread_state32_t ts32
@ BIND_SPECIAL_DYLIB_WEAK_LOOKUP
@ S_GB_ZEROFILL
S_GB_ZEROFILL - Zero fill on demand section (that can be larger than 4 gigabytes).
uint8_t GET_COMM_ALIGN(uint16_t n_desc)
@ CS_ENTITLEMENTS_VALIDATED
@ EXPORT_SYMBOL_FLAGS_WEAK_DEFINITION
@ REBASE_OPCODE_SET_SEGMENT_AND_OFFSET_ULEB
dyld_chained_starts_in_image is embedded in LC_DYLD_CHAINED_FIXUPS payload.
@ CS_SIGNER_TYPE_MAC_APP_STORE
bool isVirtualSection(uint8_t type)
@ S_ZEROFILL
S_ZEROFILL - Zero fill on demand section.
@ CS_EXECSEG_CAN_LOAD_CDHASH
@ CPU_SUBTYPE_POWERPC_7450
Tagged union holding either a T or a Error.
@ BIND_SYMBOL_FLAGS_WEAK_IMPORT
@ S_SYMBOL_STUBS
S_SYMBOL_STUBS - Section with symbol stubs, byte size of stub in the Reserved2 field.
@ S_8BYTE_LITERALS
S_8BYTE_LITERALS - Section with 8 byte literals.
@ CPU_SUBTYPE_POWERPC_603
union llvm::MachO::x86_thread_state_t::@149 uts
@ BIND_OPCODE_DO_BIND_ADD_ADDR_ULEB
@ S_MOD_TERM_FUNC_POINTERS
S_MOD_TERM_FUNC_POINTERS - Section with only function pointers for termination.
@ S_ATTR_EXT_RELOC
S_ATTR_EXT_RELOC - Section has external relocation entries.
@ CPU_SUBTYPE_POWERPC_604e
Expected< uint32_t > getCPUType(const Triple &T)
@ S_ATTR_SOME_INSTRUCTIONS
S_ATTR_SOME_INSTRUCTIONS - Section contains some machine instructions.
@ S_ATTR_STRIP_STATIC_SYMS
S_ATTR_STRIP_STATIC_SYMS - Ok to strip static symbols in this section in files with the MY_DYLDLINK f...
@ CSTYPE_INDEX_ENTITLEMENTS
@ REFERENCE_FLAG_PRIVATE_DEFINED
@ CS_EXECSEG_CAN_EXEC_CDHASH
@ PPC_RELOC_LO16_SECTDIFF
@ S_COALESCED
S_COALESCED - Section contains symbols that are to be coalesced.
@ REFERENCE_FLAG_UNDEFINED_LAZY
(vector float) vec_cmpeq(*A, *B) C
uint16_t GET_LIBRARY_ORDINAL(uint16_t n_desc)
@ CPU_SUBTYPE_POWERPC_602
void SET_COMM_ALIGN(uint16_t &n_desc, uint8_t align)
@ PPC_RELOC_HA16_SECTDIFF
union llvm::MachO::ppc_thread_state_t::@153 uts
@ CSMAGIC_DETACHED_SIGNATURE
bitcast float %x to i32 %s=and i32 %t, 2147483647 %d=bitcast i32 %s to float ret float %d } declare float @fabsf(float %n) define float @bar(float %x) nounwind { %d=call float @fabsf(float %x) ret float %d } This IR(from PR6194):target datalayout="e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple="x86_64-apple-darwin10.0.0" %0=type { double, double } %struct.float3=type { float, float, float } define void @test(%0, %struct.float3 *nocapture %res) nounwind noinline ssp { entry:%tmp18=extractvalue %0 %0, 0 t
@ S_REGULAR
S_REGULAR - Regular section.
uint32_t objc_module_info_size
const uint32_t ARM_THREAD_STATE_COUNT
uint64_t objc_module_info_addr
@ DICE_KIND_ABS_JUMP_TABLE32
const uint32_t x86_THREAD_STATE32_COUNT
@ CPU_SUBTYPE_POWERPC_ALL
@ BIND_OPCODE_SET_TYPE_IMM
@ kSecCodeSignatureHashSHA256
@ CPU_SUBTYPE_INTEL_MODEL_ALL
@ REBASE_OPCODE_DO_REBASE_ULEB_TIMES_SKIPPING_ULEB
@ CS_SUPPL_SIGNER_TYPE_TRUSTCACHE
@ S_ATTR_SELF_MODIFYING_CODE
S_ATTR_SELF_MODIFYING_CODE - Used with i386 code stubs written on by dyld.
@ REFERENCE_FLAG_PRIVATE_UNDEFINED_LAZY
@ S_ATTR_NO_DEAD_STRIP
S_ATTR_NO_DEAD_STRIP - No dead stripping.
Expected< uint32_t > getCPUSubType(const Triple &T)
@ S_LAZY_SYMBOL_POINTERS
S_LAZY_SYMBOL_POINTERS - Section with lazy symbol pointers.
@ BIND_SPECIAL_DYLIB_SELF
@ BIND_OPCODE_ADD_ADDR_ULEB
@ REBASE_OPCODE_DO_REBASE_IMM_TIMES
@ S_INTERPOSING
S_INTERPOSING - Section with only pairs of function pointers for interposing.
uint32_t seg_info_offset[1]
@ S_NON_LAZY_SYMBOL_POINTERS
S_NON_LAZY_SYMBOL_POINTERS - Section with non-lazy symbol pointers.
@ BIND_SPECIAL_DYLIB_FLAT_LOOKUP
@ BIND_TYPE_TEXT_ABSOLUTE32
const uint32_t x86_THREAD_STATE64_COUNT
ppc_thread_state32_t ts32
AMD64 Optimization Manual has some nice information about optimizing integer multiplication by a constant How much of it applies to Intel s X86 implementation There are definite trade offs to xmm0 cvttss2siq rdx jb L3 subss xmm0 rax cvttss2siq rdx xorq rdx rax ret instead of xmm1 cvttss2siq rcx movaps xmm2 subss xmm2 cvttss2siq rax rdx xorq rax ucomiss xmm0 cmovb rax ret Seems like the jb branch has high likelihood of being taken It would have saved a few instructions It s not possible to reference and DH registers in an instruction requiring REX prefix divb and mulb both produce results in AH If isel emits a CopyFromReg which gets turned into a movb and that can be allocated a r8b r15b To get around isel emits a CopyFromReg from AX and then right shift it down by and truncate it It s not pretty but it works We need some register allocation magic to make the hack go which would often require a callee saved register Callees usually need to keep this value live for most of their body so it doesn t add a significant burden on them We currently implement this in however this is suboptimal because it means that it would be quite awkward to implement the optimization for callers A better implementation would be to relax the LLVM IR rules for sret arguments to allow a function with an sret argument to have a non void return type
@ kSecCodeSignatureHashSHA1
@ S_MOD_INIT_FUNC_POINTERS
S_MOD_INIT_FUNC_POINTERS - Section with only function pointers for initialization.
int CPU_SUBTYPE_INTEL_FAMILY(CPUSubTypeX86 ST)
multiplies can be turned into SHL s
@ S_ATTR_PURE_INSTRUCTIONS
S_ATTR_PURE_INSTRUCTIONS - Section contains only true machine instructions.
@ CPU_SUBTYPE_POWERPC_620
@ CSMAGIC_EMBEDDED_SIGNATURE_OLD
@ REBASE_OPCODE_ADD_ADDR_IMM_SCALED
@ CPU_SUBTYPE_POWERPC_750
@ CPU_SUBTYPE_PENTIUM_4_M
@ REBASE_OPCODE_DO_REBASE_ULEB_TIMES
@ S_4BYTE_LITERALS
S_4BYTE_LITERALS - Section with 4 byte literals.
@ CS_EXEC_SET_ENFORCEMENT
@ BIND_SYMBOL_FLAGS_NON_WEAK_DEFINITION
@ S_THREAD_LOCAL_VARIABLES
S_THREAD_LOCAL_VARIABLES - Section with thread local variable structure data.
@ S_THREAD_LOCAL_REGULAR
S_THREAD_LOCAL_REGULAR - Thread local data section.
@ ARM64_RELOC_POINTER_TO_GOT
@ CPU_SUBTYPE_POWERPC_601
@ CS_SUPPL_SIGNER_TYPE_LOCAL
@ kSecCodeSignatureHashSHA256Truncated
const uint32_t x86_FLOAT_STATE64_COUNT
@ X86_64_RELOC_SUBTRACTOR
const uint32_t x86_EXCEPTION_STATE_COUNT
@ BIND_OPCODE_SET_DYLIB_ORDINAL_ULEB
@ CS_EXECSEG_ALLOW_UNSIGNED
@ S_ATTR_LIVE_SUPPORT
S_ATTR_LIVE_SUPPORT - Blocks are live if they reference live blocks.
@ CSTYPE_INDEX_REQUIREMENTS
@ CPU_SUBTYPE_POWERPC_604
@ BIND_OPCODE_SET_ADDEND_SLEB
@ CPU_SUBTYPE_MC980000_ALL
@ BIND_SPECIAL_DYLIB_MAIN_EXECUTABLE
@ S_ATTR_NO_TOC
S_ATTR_NO_TOC - Section contains coalesced symbols that are not to be in a ranlib table of contents.
x86_thread_state64_t ts64
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
union llvm::MachO::x86_exception_state_t::@151 ues
uint32_t objc_module_info_size
@ S_DTRACE_DOF
S_DTRACE_DOF - Section contains DTrace Object Format.
@ GENERIC_RELOC_LOCAL_SECTDIFF
@ REBASE_OPCODE_DO_REBASE_ADD_ADDR_ULEB
@ LAST_KNOWN_SECTION_TYPE
@ REFERENCE_FLAG_PRIVATE_UNDEFINED_NON_LAZY
@ MH_SUBSECTIONS_VIA_SYMBOLS
@ S_16BYTE_LITERALS
S_16BYTE_LITERALS - Section with only 16 byte literals.
@ EXPORT_SYMBOL_FLAGS_KIND_MASK
const uint32_t x86_THREAD_STATE_COUNT
@ CPU_SUBTYPE_PENTIUM_3_XEON
@ CPU_SUBTYPE_PENTIUM_3_M
@ BIND_OPCODE_DO_BIND_ULEB_TIMES_SKIPPING_ULEB
@ CSSLOT_IDENTIFICATIONSLOT
@ CSSLOT_ALTERNATE_CODEDIRECTORIES
@ CPU_SUBTYPE_ARM64_32_V8
@ CPU_SUBTYPE_POWERPC_7400
@ kSecCodeSignatureNoHash
@ CPU_SUBTYPE_POWERPC_603e
@ MH_NLIST_OUTOFSYNC_WITH_DYLDINFO
@ PPC_RELOC_LOCAL_SECTDIFF
@ S_THREAD_LOCAL_VARIABLE_POINTERS
S_THREAD_LOCAL_VARIABLE_POINTERS - Section with pointers to thread local structures.
@ EXPORT_SYMBOL_FLAGS_KIND_THREAD_LOCAL
@ REBASE_TYPE_TEXT_ABSOLUTE32
union llvm::MachO::x86_float_state_t::@150 ufs
@ ARM_RELOC_HALF_SECTDIFF
@ PPC_RELOC_HI16_SECTDIFF
@ MH_DEAD_STRIPPABLE_DYLIB
uint32_t objc_module_info_addr
@ S_THREAD_LOCAL_ZEROFILL
S_THREAD_LOCAL_ZEROFILL - Thread local zerofill section.
@ GENERIC_RELOC_PB_LA_PTR