26#ifdef EXPENSIVE_CHECKS
35 cl::desc(
"Verify machine dominator info (time consuming)"));
45 "MachineDominator Tree Construction",
true,
true)
60 CriticalEdgesToSplit.
clear();
72 CriticalEdgesToSplit.
clear();
79 errs() <<
"MachineDominatorTree verification failed\n";
89void MachineDominatorTree::applySplitCriticalEdges()
const {
91 if (CriticalEdgesToSplit.
empty())
103 for (CriticalEdge &Edge : CriticalEdgesToSplit) {
109 if (PredBB == Edge.NewBB)
123 if (NewBBs.count(PredBB)) {
124 assert(PredBB->pred_size() == 1 &&
"A basic block resulting from a "
125 "critical edge split has more "
126 "than one predecessor!");
127 PredBB = *PredBB->pred_begin();
129 if (!DT->dominates(SuccDTNode, DT->getNode(PredBB))) {
130 IsNewIDom[
Idx] =
false;
139 for (CriticalEdge &Edge : CriticalEdgesToSplit) {
147 DT->changeImmediateDominator(DT->getNode(Edge.ToBB), NewDTNode);
151 CriticalEdgesToSplit.clear();
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
static cl::opt< bool, true > VerifyMachineDomInfoX("verify-machine-dom-info", cl::location(VerifyMachineDomInfo), cl::Hidden, cl::desc("Verify machine dominator info (time consuming)"))
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file implements the SmallBitVector class.
Represent the analysis usage information of a pass.
Base class for the actual dominator tree node.
Core dominator tree base class.
iterator_range< pred_iterator > predecessors()
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
void calculate(MachineFunction &F)
void print(raw_ostream &OS, const Module *) const override
print - Print out the internal state of the pass.
bool runOnMachineFunction(MachineFunction &F) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
void verifyAnalysis() const override
verifyAnalysis() - This member can be implemented by a analysis pass to check state of analysis infor...
void releaseMemory() override
releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memo...
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
A Module instance is used to store all the information related to an LLVM module.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
This class implements an extremely fast bulk output stream that can only output to a stream.
LocationClass< Ty > location(Ty &L)
This is an optimization pass for GlobalISel generic memory operations.
char & MachineDominatorsID
MachineDominators - This pass is a machine dominators analysis pass.
raw_fd_ostream & errs()
This returns a reference to a raw_ostream for standard error.
void initializeMachineDominatorTreePass(PassRegistry &)
bool VerifyMachineDomInfo