LLVM 17.0.0git
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#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/MC/LaneBitmask.h"
#include <cassert>
#include <cstdint>
#include <map>
#include <set>
#include <vector>
Go to the source code of this file.
Classes | |
struct | llvm::rdf::IndexedSet< T, N > |
struct | llvm::rdf::RegisterRef |
struct | llvm::rdf::PhysicalRegisterInfo |
struct | llvm::rdf::RegisterAggr |
struct | llvm::rdf::RegisterAggr::rr_iterator |
struct | llvm::rdf::PrintLaneMaskOpt |
struct | std::hash< llvm::rdf::RegisterRef > |
struct | std::hash< llvm::rdf::RegisterAggr > |
struct | std::equal_to< llvm::rdf::RegisterAggr > |
Namespaces | |
namespace | llvm |
This is an optimization pass for GlobalISel generic memory operations. | |
namespace | llvm::rdf |
namespace | std |
Typedefs | |
using | llvm::rdf::RegisterId = uint32_t |
Functions | |
raw_ostream & | llvm::rdf::operator<< (raw_ostream &OS, const PrintLaneMaskOpt &P) |
raw_ostream & | llvm::rdf::operator<< (raw_ostream &OS, const RegisterAggr &A) |