LLVM
17.0.0git
lib
Target
RISCV
MCTargetDesc
RISCVFixupKinds.h
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//===-- RISCVFixupKinds.h - RISCV Specific Fixup Entries --------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H
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#define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H
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#include "
llvm/MC/MCFixup.h
"
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#undef RISCV
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namespace
llvm::RISCV
{
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enum
Fixups
{
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// 20-bit fixup corresponding to %hi(foo) for instructions like lui
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fixup_riscv_hi20
=
FirstTargetFixupKind
,
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// 12-bit fixup corresponding to %lo(foo) for instructions like addi
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fixup_riscv_lo12_i
,
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// 12-bit fixup corresponding to %lo(foo) for the S-type store instructions
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fixup_riscv_lo12_s
,
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// 20-bit fixup corresponding to %pcrel_hi(foo) for instructions like auipc
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fixup_riscv_pcrel_hi20
,
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// 12-bit fixup corresponding to %pcrel_lo(foo) for instructions like addi
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fixup_riscv_pcrel_lo12_i
,
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// 12-bit fixup corresponding to %pcrel_lo(foo) for the S-type store
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// instructions
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fixup_riscv_pcrel_lo12_s
,
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// 20-bit fixup corresponding to %got_pcrel_hi(foo) for instructions like
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// auipc
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fixup_riscv_got_hi20
,
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// 20-bit fixup corresponding to %tprel_hi(foo) for instructions like lui
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fixup_riscv_tprel_hi20
,
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// 12-bit fixup corresponding to %tprel_lo(foo) for instructions like addi
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fixup_riscv_tprel_lo12_i
,
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// 12-bit fixup corresponding to %tprel_lo(foo) for the S-type store
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// instructions
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fixup_riscv_tprel_lo12_s
,
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// Fixup corresponding to %tprel_add(foo) for PseudoAddTPRel, used as a linker
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// hint
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fixup_riscv_tprel_add
,
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// 20-bit fixup corresponding to %tls_ie_pcrel_hi(foo) for instructions like
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// auipc
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fixup_riscv_tls_got_hi20
,
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// 20-bit fixup corresponding to %tls_gd_pcrel_hi(foo) for instructions like
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// auipc
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fixup_riscv_tls_gd_hi20
,
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// 20-bit fixup for symbol references in the jal instruction
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fixup_riscv_jal
,
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// 12-bit fixup for symbol references in the branch instructions
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fixup_riscv_branch
,
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// 11-bit fixup for symbol references in the compressed jump instruction
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fixup_riscv_rvc_jump
,
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// 8-bit fixup for symbol references in the compressed branch instruction
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fixup_riscv_rvc_branch
,
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// Fixup representing a legacy no-pic function call attached to the auipc
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// instruction in a pair composed of adjacent auipc+jalr instructions.
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fixup_riscv_call
,
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// Fixup representing a function call attached to the auipc instruction in a
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// pair composed of adjacent auipc+jalr instructions.
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fixup_riscv_call_plt
,
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// Used to generate an R_RISCV_RELAX relocation, which indicates the linker
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// may relax the instruction pair.
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fixup_riscv_relax
,
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// Used to generate an R_RISCV_ALIGN relocation, which indicates the linker
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// should fixup the alignment after linker relaxation.
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fixup_riscv_align
,
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// 8-bit fixup corresponding to R_RISCV_SET8 for local label assignment.
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fixup_riscv_set_8
,
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// 8-bit fixup corresponding to R_RISCV_ADD8 for 8-bit symbolic difference
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// paired relocations.
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fixup_riscv_add_8
,
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// 8-bit fixup corresponding to R_RISCV_SUB8 for 8-bit symbolic difference
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// paired relocations.
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fixup_riscv_sub_8
,
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// 16-bit fixup corresponding to R_RISCV_SET16 for local label assignment.
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fixup_riscv_set_16
,
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// 16-bit fixup corresponding to R_RISCV_ADD16 for 16-bit symbolic difference
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// paired reloctions.
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fixup_riscv_add_16
,
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// 16-bit fixup corresponding to R_RISCV_SUB16 for 16-bit symbolic difference
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// paired reloctions.
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fixup_riscv_sub_16
,
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// 32-bit fixup corresponding to R_RISCV_SET32 for local label assignment.
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fixup_riscv_set_32
,
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// 32-bit fixup corresponding to R_RISCV_ADD32 for 32-bit symbolic difference
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// paired relocations.
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fixup_riscv_add_32
,
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// 32-bit fixup corresponding to R_RISCV_SUB32 for 32-bit symbolic difference
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// paired relocations.
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fixup_riscv_sub_32
,
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// 64-bit fixup corresponding to R_RISCV_ADD64 for 64-bit symbolic difference
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// paired relocations.
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fixup_riscv_add_64
,
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// 64-bit fixup corresponding to R_RISCV_SUB64 for 64-bit symbolic difference
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// paired relocations.
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fixup_riscv_sub_64
,
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// 6-bit fixup corresponding to R_RISCV_SET6 for local label assignment in
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// DWARF CFA.
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fixup_riscv_set_6b
,
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// 6-bit fixup corresponding to R_RISCV_SUB6 for local label assignment in
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// DWARF CFA.
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fixup_riscv_sub_6b
,
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// Used as a sentinel, must be the last
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fixup_riscv_invalid
,
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NumTargetFixupKinds
=
fixup_riscv_invalid
-
FirstTargetFixupKind
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};
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}
// end namespace llvm::RISCV
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#endif
llvm::RISCV::fixup_riscv_pcrel_lo12_i
@ fixup_riscv_pcrel_lo12_i
Definition:
RISCVFixupKinds.h:27
llvm::RISCV::fixup_riscv_call_plt
@ fixup_riscv_call_plt
Definition:
RISCVFixupKinds.h:63
llvm::FirstTargetFixupKind
@ FirstTargetFixupKind
Definition:
MCFixup.h:45
llvm::RISCV::fixup_riscv_tls_gd_hi20
@ fixup_riscv_tls_gd_hi20
Definition:
RISCVFixupKinds.h:49
llvm::RISCV::fixup_riscv_lo12_s
@ fixup_riscv_lo12_s
Definition:
RISCVFixupKinds.h:23
llvm::RISCV::fixup_riscv_call
@ fixup_riscv_call
Definition:
RISCVFixupKinds.h:60
llvm::RISCV::fixup_riscv_sub_64
@ fixup_riscv_sub_64
Definition:
RISCVFixupKinds.h:99
llvm::RISCV::fixup_riscv_add_32
@ fixup_riscv_add_32
Definition:
RISCVFixupKinds.h:90
llvm::RISCV::fixup_riscv_pcrel_lo12_s
@ fixup_riscv_pcrel_lo12_s
Definition:
RISCVFixupKinds.h:30
llvm::RISCV::fixup_riscv_jal
@ fixup_riscv_jal
Definition:
RISCVFixupKinds.h:51
llvm::RISCV::fixup_riscv_hi20
@ fixup_riscv_hi20
Definition:
RISCVFixupKinds.h:19
llvm::RISCV::fixup_riscv_rvc_jump
@ fixup_riscv_rvc_jump
Definition:
RISCVFixupKinds.h:55
llvm::RISCV::fixup_riscv_tls_got_hi20
@ fixup_riscv_tls_got_hi20
Definition:
RISCVFixupKinds.h:46
llvm::RISCV::fixup_riscv_lo12_i
@ fixup_riscv_lo12_i
Definition:
RISCVFixupKinds.h:21
llvm::RISCV::fixup_riscv_got_hi20
@ fixup_riscv_got_hi20
Definition:
RISCVFixupKinds.h:33
llvm::RISCV::fixup_riscv_relax
@ fixup_riscv_relax
Definition:
RISCVFixupKinds.h:66
llvm::RISCV::fixup_riscv_sub_8
@ fixup_riscv_sub_8
Definition:
RISCVFixupKinds.h:77
llvm::RISCV::fixup_riscv_branch
@ fixup_riscv_branch
Definition:
RISCVFixupKinds.h:53
llvm::RISCV::fixup_riscv_align
@ fixup_riscv_align
Definition:
RISCVFixupKinds.h:69
llvm::RISCV::fixup_riscv_tprel_lo12_s
@ fixup_riscv_tprel_lo12_s
Definition:
RISCVFixupKinds.h:40
llvm::RISCV::fixup_riscv_tprel_lo12_i
@ fixup_riscv_tprel_lo12_i
Definition:
RISCVFixupKinds.h:37
llvm::RISCV::fixup_riscv_add_8
@ fixup_riscv_add_8
Definition:
RISCVFixupKinds.h:74
llvm::RISCV::fixup_riscv_pcrel_hi20
@ fixup_riscv_pcrel_hi20
Definition:
RISCVFixupKinds.h:25
llvm::RISCV::fixup_riscv_sub_16
@ fixup_riscv_sub_16
Definition:
RISCVFixupKinds.h:85
MCFixup.h
llvm::RISCV::fixup_riscv_set_8
@ fixup_riscv_set_8
Definition:
RISCVFixupKinds.h:71
llvm::RISCV
Definition:
RISCVTargetParser.h:21
llvm::RISCV::NumTargetFixupKinds
@ NumTargetFixupKinds
Definition:
RISCVFixupKinds.h:109
llvm::RISCV::fixup_riscv_sub_32
@ fixup_riscv_sub_32
Definition:
RISCVFixupKinds.h:93
llvm::RISCV::fixup_riscv_tprel_add
@ fixup_riscv_tprel_add
Definition:
RISCVFixupKinds.h:43
llvm::RISCV::fixup_riscv_add_64
@ fixup_riscv_add_64
Definition:
RISCVFixupKinds.h:96
llvm::RISCV::fixup_riscv_add_16
@ fixup_riscv_add_16
Definition:
RISCVFixupKinds.h:82
llvm::RISCV::fixup_riscv_sub_6b
@ fixup_riscv_sub_6b
Definition:
RISCVFixupKinds.h:105
llvm::RISCV::fixup_riscv_set_16
@ fixup_riscv_set_16
Definition:
RISCVFixupKinds.h:79
llvm::RISCV::fixup_riscv_set_32
@ fixup_riscv_set_32
Definition:
RISCVFixupKinds.h:87
llvm::RISCV::fixup_riscv_rvc_branch
@ fixup_riscv_rvc_branch
Definition:
RISCVFixupKinds.h:57
llvm::RISCV::fixup_riscv_invalid
@ fixup_riscv_invalid
Definition:
RISCVFixupKinds.h:108
llvm::RISCV::Fixups
Fixups
Definition:
RISCVFixupKinds.h:17
llvm::RISCV::fixup_riscv_tprel_hi20
@ fixup_riscv_tprel_hi20
Definition:
RISCVFixupKinds.h:35
llvm::RISCV::fixup_riscv_set_6b
@ fixup_riscv_set_6b
Definition:
RISCVFixupKinds.h:102
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