LLVM  13.0.0git
STLForwardCompat.h
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1 //===- STLForwardCompat.h - Library features from future STLs ------C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains library features backported from future STL versions.
10 //
11 // These should be replaced with their STL counterparts as the C++ version LLVM
12 // is compiled with is updated.
13 //
14 //===----------------------------------------------------------------------===//
15 
16 #ifndef LLVM_ADT_STLFORWARDCOMPAT_H
17 #define LLVM_ADT_STLFORWARDCOMPAT_H
18 
19 #include <type_traits>
20 
21 namespace llvm {
22 
23 //===----------------------------------------------------------------------===//
24 // Features from C++17
25 //===----------------------------------------------------------------------===//
26 
27 template <typename T>
28 struct negation // NOLINT(readability-identifier-naming)
29  : std::integral_constant<bool, !bool(T::value)> {};
30 
31 template <typename...>
32 struct conjunction // NOLINT(readability-identifier-naming)
33  : std::true_type {};
34 template <typename B1> struct conjunction<B1> : B1 {};
35 template <typename B1, typename... Bn>
36 struct conjunction<B1, Bn...>
37  : std::conditional<bool(B1::value), conjunction<Bn...>, B1>::type {};
38 
39 template <typename...>
40 struct disjunction // NOLINT(readability-identifier-naming)
41  : std::false_type {};
42 template <typename B1> struct disjunction<B1> : B1 {};
43 template <typename B1, typename... Bn>
44 struct disjunction<B1, Bn...>
45  : std::conditional<bool(B1::value), B1, disjunction<Bn...>>::type {};
46 
47 struct in_place_t // NOLINT(readability-identifier-naming)
48 {
49  explicit in_place_t() = default;
50 };
51 /// \warning This must not be odr-used, as it cannot be made \c inline in C++14.
52 constexpr in_place_t in_place; // NOLINT(readability-identifier-naming)
53 
54 template <typename T>
55 struct in_place_type_t // NOLINT(readability-identifier-naming)
56 {
57  explicit in_place_type_t() = default;
58 };
59 
60 template <std::size_t I>
61 struct in_place_index_t // NOLINT(readability-identifier-naming)
62 {
63  explicit in_place_index_t() = default;
64 };
65 
66 //===----------------------------------------------------------------------===//
67 // Features from C++20
68 //===----------------------------------------------------------------------===//
69 
70 template <typename T>
71 struct remove_cvref // NOLINT(readability-identifier-naming)
72 {
73  using type = std::remove_cv_t<std::remove_reference_t<T>>;
74 };
75 
76 template <typename T>
77 using remove_cvref_t // NOLINT(readability-identifier-naming)
79 
80 } // namespace llvm
81 
82 #endif // LLVM_ADT_STLFORWARDCOMPAT_H
llvm::in_place_type_t
Definition: STLForwardCompat.h:55
B1
llvm
Definition: AllocatorList.h:23
llvm::in_place_t::in_place_t
in_place_t()=default
llvm::in_place_type_t::in_place_type_t
in_place_type_t()=default
llvm::in_place_index_t::in_place_index_t
in_place_index_t()=default
llvm::disjunction
Definition: STLForwardCompat.h:40
llvm::conjunction
Definition: STLForwardCompat.h:32
type
AMD64 Optimization Manual has some nice information about optimizing integer multiplication by a constant How much of it applies to Intel s X86 implementation There are definite trade offs to xmm0 cvttss2siq rdx jb L3 subss xmm0 rax cvttss2siq rdx xorq rdx rax ret instead of xmm1 cvttss2siq rcx movaps xmm2 subss xmm2 cvttss2siq rax rdx xorq rax ucomiss xmm0 cmovb rax ret Seems like the jb branch has high likelihood of being taken It would have saved a few instructions It s not possible to reference and DH registers in an instruction requiring REX prefix divb and mulb both produce results in AH If isel emits a CopyFromReg which gets turned into a movb and that can be allocated a r8b r15b To get around isel emits a CopyFromReg from AX and then right shift it down by and truncate it It s not pretty but it works We need some register allocation magic to make the hack go which would often require a callee saved register Callees usually need to keep this value live for most of their body so it doesn t add a significant burden on them We currently implement this in however this is suboptimal because it means that it would be quite awkward to implement the optimization for callers A better implementation would be to relax the LLVM IR rules for sret arguments to allow a function with an sret argument to have a non void return type
Definition: README-X86-64.txt:70
llvm::in_place_index_t
Definition: STLForwardCompat.h:61
llvm::in_place
constexpr in_place_t in_place
Definition: STLForwardCompat.h:52
llvm::remove_cvref
Definition: STLForwardCompat.h:71
llvm::remove_cvref_t
typename llvm::remove_cvref< T >::type remove_cvref_t
Definition: STLForwardCompat.h:78
llvm::disjunction< B1 >
Definition: STLForwardCompat.h:42
llvm::negation
Definition: STLForwardCompat.h:28
llvm::in_place_t
Definition: STLForwardCompat.h:47
llvm::remove_cvref::type
std::remove_cv_t< std::remove_reference_t< T > > type
Definition: STLForwardCompat.h:73
llvm::conjunction< B1 >
Definition: STLForwardCompat.h:34