X86SpeculativeExecutionSideEffectSuppression.cpp File Reference

This file contains the X86 implementation of the speculative execution side effect suppression mitigation. More...

#include "X86.h"
#include "X86InstrInfo.h"
#include "X86Subtarget.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/Pass.h"
#include "llvm/Target/TargetMachine.h"

Go to the source code of this file.

Macros
#define	DEBUG_TYPE   "x86-seses"

Functions
	STATISTIC (NumLFENCEsInserted, "Number of lfence instructions inserted")
static bool	hasConstantAddressingMode (const MachineInstr &MI)

Variables
static cl::opt< bool >	EnableSpeculativeExecutionSideEffectSuppression ("x86-seses-enable-without-lvi-cfi", cl::desc("Force enable speculative execution side effect suppression. " "(Note: User must pass -mlvi-cfi in order to mitigate indirect " "branches and returns.)"), cl::init(false), cl::Hidden)
static cl::opt< bool >	OneLFENCEPerBasicBlock ("x86-seses-one-lfence-per-bb", cl::desc("Omit all lfences other than the first to be placed in a basic block."), cl::init(false), cl::Hidden)
static cl::opt< bool >	OnlyLFENCENonConst ("x86-seses-only-lfence-non-const", cl::desc("Only lfence before groups of terminators where at least one " "branch instruction has an input to the addressing mode that is a " "register other than %rip."), cl::init(false), cl::Hidden)
static cl::opt< bool >	OmitBranchLFENCEs ("x86-seses-omit-branch-lfences", cl::desc("Omit all lfences before branch instructions."), cl::init(false), cl::Hidden)

Detailed Description

This file contains the X86 implementation of the speculative execution side effect suppression mitigation.

This must be used with the -mlvi-cfi flag in order to mitigate indirect branches and returns.

Definition in file X86SpeculativeExecutionSideEffectSuppression.cpp.

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "x86-seses"

Definition at line 28 of file X86SpeculativeExecutionSideEffectSuppression.cpp.

Function Documentation

hasConstantAddressingMode()

static bool hasConstantAddressingMode ( const MachineInstr &  MI )

static

Definition at line 81 of file X86SpeculativeExecutionSideEffectSuppression.cpp.

References MI.

STATISTIC()

STATISTIC	(	NumLFENCEsInserted	,
		"Number of lfence instructions inserted"
	)

Variable Documentation

EnableSpeculativeExecutionSideEffectSuppression

cl::opt< bool > EnableSpeculativeExecutionSideEffectSuppression("x86-seses-enable-without-lvi-cfi", cl::desc("Force enable speculative execution side effect suppression. " "(Note: User must pass -mlvi-cfi in order to mitigate indirect " "branches and returns.)"), cl::init(false), cl::Hidden) ( "x86-seses-enable-without-lvi-cfi"  , cl::desc("Force enable speculative execution side effect suppression. " "(Note: User must pass -mlvi-cfi in order to mitigate indirect " "branches and returns.)")  , cl::init(false)  , cl::Hidden    )

static

OmitBranchLFENCEs

cl::opt< bool > OmitBranchLFENCEs("x86-seses-omit-branch-lfences", cl::desc("Omit all lfences before branch instructions."), cl::init(false), cl::Hidden) ( "x86-seses-omit-branch-lfences"  , cl::desc("Omit all lfences before branch instructions.")  , cl::init(false)  , cl::Hidden    )

static

OneLFENCEPerBasicBlock

cl::opt< bool > OneLFENCEPerBasicBlock("x86-seses-one-lfence-per-bb", cl::desc( "Omit all lfences other than the first to be placed in a basic block."), cl::init(false), cl::Hidden) ( "x86-seses-one-lfence-per-bb"  , cl::desc( "Omit all lfences other than the first to be placed in a basic block.")  , cl::init(false)  , cl::Hidden    )

static

OnlyLFENCENonConst

cl::opt< bool > OnlyLFENCENonConst("x86-seses-only-lfence-non-const", cl::desc("Only lfence before groups of terminators where at least one " "branch instruction has an input to the addressing mode that is a " "register other than %rip."), cl::init(false), cl::Hidden) ( "x86-seses-only-lfence-non-const"  , cl::desc("Only lfence before groups of terminators where at least one " "branch instruction has an input to the addressing mode that is a " "register other than %rip.")  , cl::init(false)  , cl::Hidden    )

static