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18 #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
19 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
99 unsigned SubReg = 0)
const {
100 assert((flags & 0x1) == 0 &&
101 "Passing in 'true' to addReg is forbidden! Use enums instead.");
118 unsigned SubReg = 0)
const {
125 unsigned SubReg = 0)
const {
127 "Misleading addUse defines register, use addReg instead.");
148 unsigned TargetFlags = 0)
const {
160 unsigned TargetFlags = 0)
const {
166 unsigned TargetFlags = 0)
const {
173 unsigned TargetFlags = 0)
const {
180 unsigned TargetFlags = 0)
const {
186 unsigned TargetFlags = 0)
const {
193 unsigned TargetFlags = 0)
const {
204 MI->addMemOperand(*MF, MMO);
210 MI->setMemRefs(*MF, MMOs);
215 MI->cloneMemRefs(*MF, OtherMI);
221 MI->cloneMergedMemRefs(*MF, OtherMIs);
226 MI->addOperand(*MF, MO);
232 MI->addOperand(*MF, MO);
239 assert((
MI->isDebugValue() ?
static_cast<bool>(
MI->getDebugVariable())
241 "first MDNode argument of a DBG_VALUE not a variable");
242 assert((
MI->isDebugLabel() ?
static_cast<bool>(
MI->getDebugLabel())
244 "first MDNode argument of a DBG_LABEL not a label");
269 unsigned char TargetFlags = 0)
const {
286 unsigned char TargetFlags = 0)
const {
291 if (0 == TargetFlags)
309 assert(off == 0 &&
"cannot create offset into jump tables");
317 MI->copyImplicitOps(*MF, OtherMI);
376 if (
I.isInsideBundle())
415 if (
I.isInsideBundle())
445 MachineInstrBuilder
BuildMI(MachineFunction &MF,
const DebugLoc &
DL,
446 const MCInstrDesc &MCID,
bool IsIndirect,
447 Register
Reg,
const MDNode *Variable,
452 MachineInstrBuilder
BuildMI(MachineFunction &MF,
const DebugLoc &
DL,
453 const MCInstrDesc &MCID,
bool IsIndirect,
454 const MachineOperand &MO,
const MDNode *Variable,
459 MachineInstrBuilder
BuildMI(MachineFunction &MF,
const DebugLoc &
DL,
460 const MCInstrDesc &MCID,
bool IsIndirect,
461 ArrayRef<MachineOperand> MOs,
462 const MDNode *Variable,
const MDNode *Expr);
467 MachineInstrBuilder
BuildMI(MachineBasicBlock &
BB,
469 const MCInstrDesc &MCID,
bool IsIndirect,
470 Register
Reg,
const MDNode *Variable,
475 MachineInstrBuilder
BuildMI(MachineBasicBlock &
BB,
477 const MCInstrDesc &MCID,
bool IsIndirect,
478 MachineOperand &MO,
const MDNode *Variable,
483 MachineInstrBuilder
BuildMI(MachineBasicBlock &
BB,
485 const MCInstrDesc &MCID,
bool IsIndirect,
486 ArrayRef<MachineOperand> MOs,
487 const MDNode *Variable,
const MDNode *Expr);
497 SmallVectorImpl<const MachineOperand *> &SpilledOperands);
554 :
MBB(
BB), Begin(Pos.getInstrIterator()), End(Begin) {}
559 :
MBB(
BB), Begin(
B.getInstrIterator()), End(
E.getInstrIterator()) {
560 assert(
B !=
E &&
"No instructions to bundle");
580 bool empty()
const {
return Begin == End; }
595 MI->bundleWithSucc();
596 Begin =
MI->getIterator();
600 MI->bundleWithPred();
625 #endif // LLVM_CODEGEN_MACHINEINSTRBUILDER_H
MachineInstr * operator->() const
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)
const MachineInstrBuilder & addCImm(const ConstantInt *Val) const
@ MO_BlockAddress
Address of a basic block.
@ MO_Immediate
Immediate operand.
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & copyImplicitOps(const MachineInstr &OtherMI) const
Copy all the implicit operands from OtherMI onto this one.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
const MachineInstrBuilder & addFPImm(const ConstantFP *Val) const
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
MachineBasicBlock::instr_iterator begin() const
Return an iterator to the first bundled instruction.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
const GlobalValue * getGlobal() const
const MachineInstrBuilder & add(const MachineOperand &MO) const
MachineBasicBlock::instr_iterator end() const
Return an iterator beyond the last bundled instruction.
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
const BlockAddress * getBlockAddress() const
MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator B, MachineBasicBlock::iterator E)
Create a bundle from the sequence of instructions between B and E.
MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator Pos)
Create an MIBundleBuilder that inserts instructions into a new bundle in BB above the bundle or instr...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
static MachineOperand CreateMetadata(const MDNode *Meta)
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
A description of a memory reference used in the backend.
@ InternalRead
Register reads a value that is defined inside the same instruction or bundle.
unsigned getDeadRegState(bool B)
@ Renamable
Register that may be renamed.
int64_t getOffset() const
Return the offset from the symbol in this operand.
std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
unsigned const TargetRegisterInfo * TRI
bool constrainSelectedInstRegOperands(MachineInstr &I, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI)
Mutate the newly-selected instruction I to constrain its (possibly generic) virtual register operands...
unsigned getUndefRegState(bool B)
static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)
MachineBasicBlock::instr_iterator getBundleEnd(MachineBasicBlock::instr_iterator I)
Returns an iterator pointing beyond the bundle containing I.
const MachineInstrBuilder & addDef(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register definition operand.
bool isRenamable() const
isRenamable - Returns true if this register may be renamed, i.e.
This is the shared class of boolean and integer constants.
unsigned getDefRegState(bool B)
MIBundleBuilder & insert(MachineBasicBlock::instr_iterator I, MachineInstr *MI)
Insert MI into this bundle before I which must point to an instruction in the bundle,...
TargetInstrInfo - Interface to description of machine instruction set.
unsigned getRenamableRegState(bool B)
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
MachineBasicBlock & getMBB() const
Return a reference to the basic block containing this bundle.
static MachineOperand CreateImm(int64_t Val)
@ MO_GlobalAddress
Address of a global value.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
MachineInstr * buildDbgValueForSpill(MachineBasicBlock &BB, MachineBasicBlock::iterator I, const MachineInstr &Orig, int FrameIndex, Register SpillReg)
Clone a DBG_VALUE whose value has been spilled to FrameIndex.
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
const HexagonInstrInfo * TII
Describe properties that are true of each instruction in the target description file.
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
MachineOperand class - Representation of each machine instruction operand.
Flag
These should be considered private to the implementation of the MCInstrDesc class.
ConstantFP - Floating Point Values [float, double].
static MachineOperand CreateFI(int Idx)
@ Define
Register definition.
@ Implicit
Not emitted register (e.g. carry, or temporary result).
const MachineInstrBuilder & addExternalSymbol(const char *FnName, unsigned TargetFlags=0) const
@ Kill
The last use of a register.
Register getReg(unsigned Idx) const
Get the register for the operand index.
const MachineInstrBuilder & cloneMemRefs(const MachineInstr &OtherMI) const
const MachineInstrBuilder & addFrameIndex(int Idx) const
@ EarlyClobber
Register definition happens before uses.
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
static MachineOperand CreateShuffleMask(ArrayRef< int > Mask)
unsigned getRegState(const MachineOperand &RegOp)
Get all register state flags from machine operand RegOp.
Holds all the information related to register banks.
unsigned getTargetFlags() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Representation of each machine instruction.
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)
const MachineInstrBuilder & addShuffleMask(ArrayRef< int > Val) const
void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex, Register Reg)
Update a DBG_VALUE whose value has been spilled to FrameIndex.
bool empty() const
Return true if no instructions have been inserted in this bundle yet.
const MachineInstrBuilder & addDisp(const MachineOperand &Disp, int64_t off, unsigned char TargetFlags=0) const
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
const MachineInstrBuilder & addIntrinsicID(Intrinsic::ID ID) const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
MachineInstrBuilder(MachineFunction &F, MachineBasicBlock::iterator I)
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const MachineInstrBuilder & addUse(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register use operand.
Register getReg() const
getReg - Returns the register number.
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
bool constrainAllUses(const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) const
@ MO_JumpTableIndex
Address of indexed Jump Table for switch.
The address of a basic block.
const MachineInstrBuilder & addRegMask(const uint32_t *Mask) const
MachineInstrBundleIterator< MachineInstr > iterator
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
const MachineInstrBuilder & add(ArrayRef< MachineOperand > MOs) const
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
@ Debug
Register 'use' is for debugging purpose.
const MachineInstrBuilder & addJumpTableIndex(unsigned Idx, unsigned TargetFlags=0) const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
static const Function * getParent(const Value *V)
Helper class for constructing bundles of MachineInstrs.
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
const MachineInstrBuilder & addPredicate(CmpInst::Predicate Pred) const
const MachineInstrBuilder & addBlockAddress(const BlockAddress *BA, int64_t Offset=0, unsigned TargetFlags=0) const
static MachineOperand CreateCImm(const ConstantInt *CI)
const MachineInstrBuilder & cloneMergedMemRefs(ArrayRef< const MachineInstr * > OtherMIs) const
MachineInstr * getInstr() const
If conversion operators fail, use this method to get the MachineInstr explicitly.
Wrapper class representing virtual and physical registers.
MIBundleBuilder & prepend(MachineInstr *MI)
Insert MI into MBB by prepending it to the instructions in the bundle.
unsigned getDebugRegState(bool B)
@ Undef
Value of the register doesn't matter.
const MachineInstrBuilder & addConstantPoolIndex(unsigned Idx, int Offset=0, unsigned TargetFlags=0) const
Instructions::iterator instr_iterator
MIBundleBuilder(MachineInstr *MI)
Create an MIBundleBuilder representing an existing instruction or bundle that has MI as its head.
const MachineInstrBuilder & setMemRefs(ArrayRef< MachineMemOperand * > MMOs) const
const MachineInstrBuilder & addTargetIndex(unsigned Idx, int64_t Offset=0, unsigned TargetFlags=0) const
MIBundleBuilder & append(MachineInstr *MI)
Insert MI into MBB by appending it to the instructions in the bundle.
const MachineInstrBuilder & addGlobalAddress(const GlobalValue *GV, int64_t Offset=0, unsigned TargetFlags=0) const
unsigned getKillRegState(bool B)
const MachineInstrBuilder & addSym(MCSymbol *Sym, unsigned char TargetFlags=0) const
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
const MachineInstrBuilder & setMIFlags(unsigned Flags) const
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
MachineInstrBuilder()=default
bool isInternalRead() const
const MachineInstrBuilder & addMetadata(const MDNode *MD) const
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
MachineInstr * CreateMachineInstr(const MCInstrDesc &MCID, const DebugLoc &DL, bool NoImplicit=false)
CreateMachineInstr - Allocate a new MachineInstr.
unsigned getInternalReadRegState(bool B)
MachineInstrBuilder(MachineFunction &F, MachineInstr *I)
Create a MachineInstrBuilder for manipulating an existing instruction.
unsigned getImplRegState(bool B)
static MachineOperand CreatePredicate(unsigned Pred)
static MachineOperand CreateFPImm(const ConstantFP *CFP)
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.