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35 Slot =
new AllocaInst(
I.getType(),
DL.getAllocaAddrSpace(),
nullptr,
36 I.getName()+
".reg2mem", AllocaPoint);
38 Slot =
new AllocaInst(
I.getType(),
DL.getAllocaAddrSpace(),
nullptr,
39 I.getName() +
".reg2mem", &
F->getEntryBlock().front());
46 if (!II->getNormalDest()->getSinglePredecessor()) {
50 assert(
BB &&
"Unable to split critical edge.");
56 while (!
I.use_empty()) {
58 if (
PHINode *PN = dyn_cast<PHINode>(U)) {
69 for (
unsigned i = 0,
e = PN->getNumIncomingValues();
i !=
e; ++
i)
70 if (PN->getIncomingValue(
i) == &
I) {
71 Value *&V = Loads[PN->getIncomingBlock(
i)];
74 V =
new LoadInst(
I.getType(), Slot,
I.getName() +
".reload",
76 PN->getIncomingBlock(
i)->getTerminator());
78 PN->setIncomingValue(
i, V);
93 if (!
I.isTerminator()) {
94 InsertPt = ++
I.getIterator();
95 for (; isa<PHINode>(InsertPt) || InsertPt->isEHPad(); ++InsertPt)
110 if (
P->use_empty()) {
111 P->eraseFromParent();
120 Slot =
new AllocaInst(
P->getType(),
DL.getAllocaAddrSpace(),
nullptr,
121 P->getName()+
".reg2mem", AllocaPoint);
124 Slot =
new AllocaInst(
P->getType(),
DL.getAllocaAddrSpace(),
nullptr,
125 P->getName() +
".reg2mem",
126 &
F->getEntryBlock().front());
130 for (
unsigned i = 0,
e =
P->getNumIncomingValues();
i <
e; ++
i) {
131 if (
InvokeInst *II = dyn_cast<InvokeInst>(
P->getIncomingValue(
i))) {
132 assert(II->getParent() !=
P->getIncomingBlock(
i) &&
133 "Invoke edge not supported yet"); (void)II;
136 P->getIncomingBlock(
i)->getTerminator());
142 for (; isa<PHINode>(InsertPt) || InsertPt->isEHPad(); ++InsertPt)
146 new LoadInst(
P->getType(), Slot,
P->getName() +
".reload", &*InsertPt);
147 P->replaceAllUsesWith(V);
150 P->eraseFromParent();
BasicBlock * getNormalDest() const
This is an optimization pass for GlobalISel generic memory operations.
A parsed version of the target data layout string in and methods for querying it.
InstListType::iterator iterator
Instruction iterators...
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
BasicBlock * SplitCriticalEdge(Instruction *TI, unsigned SuccNum, const CriticalEdgeSplittingOptions &Options=CriticalEdgeSplittingOptions(), const Twine &BBName="")
If this edge is a critical edge, insert a new node to split the critical edge.
bool isCriticalEdge(const Instruction *TI, unsigned SuccNum, bool AllowIdenticalEdges=false)
Return true if the specified edge is a critical edge.
LLVM Basic Block Representation.
AllocaInst * DemotePHIToStack(PHINode *P, Instruction *AllocaPoint=nullptr)
This function takes a virtual register computed by a phi node and replaces it with a slot in the stac...
const_iterator getFirstInsertionPt() const
Returns an iterator to the first instruction in this block that is suitable for inserting a non-PHI i...
An instruction for storing to memory.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
unsigned GetSuccessorNumber(const BasicBlock *BB, const BasicBlock *Succ)
Search for the specified successor of basic block BB and return its position in the terminator instru...
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
AllocaInst * DemoteRegToStack(Instruction &X, bool VolatileLoads=false, Instruction *AllocaPoint=nullptr)
This function takes a virtual register computed by an Instruction and replaces it with a slot in the ...
An instruction for reading from memory.
bool replaceUsesOfWith(Value *From, Value *To)
Replace uses of one Value with another.
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
an instruction to allocate memory on the stack
LLVM Value Representation.