LLVM 17.0.0git
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1//===- Mem2Reg.cpp - The -mem2reg pass, a wrapper around the Utils lib ----===//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
9// This pass is a simple pass wrapper around the PromoteMemToReg function call
10// exposed by the Utils library.
15#include "llvm/ADT/Statistic.h"
17#include "llvm/IR/BasicBlock.h"
18#include "llvm/IR/Dominators.h"
19#include "llvm/IR/Function.h"
21#include "llvm/IR/PassManager.h"
23#include "llvm/Pass.h"
27#include <vector>
29using namespace llvm;
31#define DEBUG_TYPE "mem2reg"
33STATISTIC(NumPromoted, "Number of alloca's promoted");
36 AssumptionCache &AC) {
37 std::vector<AllocaInst *> Allocas;
38 BasicBlock &BB = F.getEntryBlock(); // Get the entry node for the function
39 bool Changed = false;
41 while (true) {
42 Allocas.clear();
44 // Find allocas that are safe to promote, by looking at all instructions in
45 // the entry node
46 for (BasicBlock::iterator I = BB.begin(), E = --BB.end(); I != E; ++I)
47 if (AllocaInst *AI = dyn_cast<AllocaInst>(I)) // Is it an alloca?
48 if (isAllocaPromotable(AI))
49 Allocas.push_back(AI);
51 if (Allocas.empty())
52 break;
54 PromoteMemToReg(Allocas, DT, &AC);
55 NumPromoted += Allocas.size();
56 Changed = true;
57 }
58 return Changed;
62 auto &DT = AM.getResult<DominatorTreeAnalysis>(F);
63 auto &AC = AM.getResult<AssumptionAnalysis>(F);
64 if (!promoteMemoryToRegister(F, DT, AC))
69 return PA;
72namespace {
74struct PromoteLegacyPass : public FunctionPass {
75 // Pass identification, replacement for typeid
76 static char ID;
77 bool ForcePass; /// If true, forces pass to execute, instead of skipping.
79 PromoteLegacyPass() : FunctionPass(ID), ForcePass(false) {
81 }
82 PromoteLegacyPass(bool IsForced) : FunctionPass(ID), ForcePass(IsForced) {
84 }
86 // runOnFunction - To run this pass, first we calculate the alloca
87 // instructions that are safe for promotion, then we promote each one.
88 bool runOnFunction(Function &F) override {
89 if (!ForcePass && skipFunction(F))
90 return false;
92 DominatorTree &DT = getAnalysis<DominatorTreeWrapperPass>().getDomTree();
93 AssumptionCache &AC =
94 getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
95 return promoteMemoryToRegister(F, DT, AC);
96 }
98 void getAnalysisUsage(AnalysisUsage &AU) const override {
101 AU.setPreservesCFG();
102 }
105} // end anonymous namespace
107char PromoteLegacyPass::ID = 0;
109INITIALIZE_PASS_BEGIN(PromoteLegacyPass, "mem2reg", "Promote Memory to "
110 "Register",
111 false, false)
114INITIALIZE_PASS_END(PromoteLegacyPass, "mem2reg", "Promote Memory to Register",
117// createPromoteMemoryToRegister - Provide an entry point to create this pass.
119 return new PromoteLegacyPass(IsForced);
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
static bool runOnFunction(Function &F, bool PostInlining)
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
static bool promoteMemoryToRegister(Function &F, DominatorTree &DT, AssumptionCache &AC)
Definition: Mem2Reg.cpp:35
Definition: Mem2Reg.cpp:114
This header defines various interfaces for pass management in LLVM.
Definition: PassSupport.h:55
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:59
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:52
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
Definition: Statistic.h:167
an instruction to allocate memory on the stack
Definition: Instructions.h:58
A container for analyses that lazily runs them and caches their results.
Definition: PassManager.h:620
PassT::Result & getResult(IRUnitT &IR, ExtraArgTs... ExtraArgs)
Get the result of an analysis pass for a given IR unit.
Definition: PassManager.h:774
Represent the analysis usage information of a pass.
AnalysisUsage & addRequired()
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:265
A function analysis which provides an AssumptionCache.
An immutable pass that tracks lazily created AssumptionCache objects.
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
Definition: BasicBlock.h:56
iterator end()
Definition: BasicBlock.h:325
iterator begin()
Instruction iterator methods.
Definition: BasicBlock.h:323
InstListType::iterator iterator
Instruction iterators...
Definition: BasicBlock.h:87
Represents analyses that only rely on functions' control flow.
Definition: PassManager.h:113
Analysis pass which computes a DominatorTree.
Definition: Dominators.h:279
Legacy analysis pass which computes a DominatorTree.
Definition: Dominators.h:314
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
Definition: Dominators.h:166
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:308
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
A set of analyses that are preserved following a run of a transformation pass.
Definition: PassManager.h:152
static PreservedAnalyses all()
Construct a special preserved set that preserves all passes.
Definition: PassManager.h:158
void preserveSet()
Mark an analysis set as preserved.
Definition: PassManager.h:188
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
Definition: Mem2Reg.cpp:61
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
This class provides various memory handling functions that manipulate MemoryBlock instances.
Definition: Memory.h:52
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
void PromoteMemToReg(ArrayRef< AllocaInst * > Allocas, DominatorTree &DT, AssumptionCache *AC=nullptr)
Promote the specified list of alloca instructions into scalar registers, inserting PHI nodes as appro...
bool isAllocaPromotable(const AllocaInst *AI)
Return true if this alloca is legal for promotion.
void initializePromoteLegacyPassPass(PassRegistry &)
FunctionPass * createPromoteMemoryToRegisterPass(bool IsForced=false)
Definition: Mem2Reg.cpp:118