LLVM 19.0.0git
PPCXCOFFStreamer.cpp
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1//===-------- PPCXCOFFStreamer.cpp - XCOFF Object Output ------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This is a custom MCXCOFFStreamer for PowerPC.
10//
11// The purpose of the custom XCOFF streamer is to allow us to intercept
12// instructions as they are being emitted and align all 8 byte instructions
13// to a 64 byte boundary if required (by adding a 4 byte nop). This is important
14// because 8 byte instructions are not allowed to cross 64 byte boundaries
15// and by aligning anything that is within 4 bytes of the boundary we can
16// guarantee that the 8 byte instructions do not cross that boundary.
17//
18//===----------------------------------------------------------------------===//
19
20#include "PPCXCOFFStreamer.h"
21#include "PPCMCCodeEmitter.h"
24#include "llvm/MC/MCAssembler.h"
31
32using namespace llvm;
33
35 std::unique_ptr<MCAsmBackend> MAB,
36 std::unique_ptr<MCObjectWriter> OW,
37 std::unique_ptr<MCCodeEmitter> Emitter)
38 : MCXCOFFStreamer(Context, std::move(MAB), std::move(OW),
39 std::move(Emitter)) {}
40
41void PPCXCOFFStreamer::emitPrefixedInstruction(const MCInst &Inst,
42 const MCSubtargetInfo &STI) {
43 // Prefixed instructions must not cross a 64-byte boundary (i.e. prefix is
44 // before the boundary and the remaining 4-bytes are after the boundary). In
45 // order to achieve this, a nop is added prior to any such boundary-crossing
46 // prefixed instruction. Align to 64 bytes if possible but add a maximum of 4
47 // bytes when trying to do that. If alignment requires adding more than 4
48 // bytes then the instruction won't be aligned.
49 emitCodeAlignment(Align(64), &STI, 4);
50
51 // Emit the instruction.
52 // Since the previous emit created a new fragment then adding this instruction
53 // also forces the addition of a new fragment. Inst is now the first
54 // instruction in that new fragment.
56}
57
59 const MCSubtargetInfo &STI) {
62
63 // Special handling is only for prefixed instructions.
64 if (!Emitter->isPrefixedInstruction(Inst)) {
66 return;
67 }
68 emitPrefixedInstruction(Inst, STI);
69}
70
73 std::unique_ptr<MCAsmBackend> MAB,
74 std::unique_ptr<MCObjectWriter> OW,
75 std::unique_ptr<MCCodeEmitter> Emitter) {
76 return new PPCXCOFFStreamer(Context, std::move(MAB), std::move(OW),
77 std::move(Emitter));
78}
dxil DXContainer Global Emitter
LLVMContext & Context
MCCodeEmitter * getEmitterPtr() const
Definition: MCAssembler.h:330
Context object for machine code objects.
Definition: MCContext.h:81
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
MCAssembler & getAssembler()
void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override
Emit the given Instruction into the current section.
void emitCodeAlignment(Align ByteAlignment, const MCSubtargetInfo *STI, unsigned MaxBytesToEmit=0) override
Emit nops until the byte alignment ByteAlignment is reached.
Generic base class for all target subtargets.
PPCXCOFFStreamer(MCContext &Context, std::unique_ptr< MCAsmBackend > MAB, std::unique_ptr< MCObjectWriter > OW, std::unique_ptr< MCCodeEmitter > Emitter)
void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override
Emit the given Instruction into the current section.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
MCXCOFFStreamer * createPPCXCOFFStreamer(MCContext &Context, std::unique_ptr< MCAsmBackend > MAB, std::unique_ptr< MCObjectWriter > OW, std::unique_ptr< MCCodeEmitter > Emitter)
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1849
Implement std::hash so that hash_code can be used in STL containers.
Definition: BitVector.h:858
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39