LLVM  14.0.0git
PPCXCOFFStreamer.cpp
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1 //===-------- PPCXCOFFStreamer.cpp - XCOFF Object Output ------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This is a custom MCXCOFFStreamer for PowerPC.
11 //
12 // The purpose of the custom XCOFF streamer is to allow us to intercept
13 // instructions as they are being emitted and align all 8 byte instructions
14 // to a 64 byte boundary if required (by adding a 4 byte nop). This is important
15 // because 8 byte instructions are not allowed to cross 64 byte boundaries
16 // and by aligning anything that is within 4 bytes of the boundary we can
17 // guarantee that the 8 byte instructions do not cross that boundary.
18 //
19 //===----------------------------------------------------------------------===//
20 
21 #include "PPCXCOFFStreamer.h"
22 #include "PPCMCCodeEmitter.h"
24 #include "llvm/MC/MCAsmBackend.h"
25 #include "llvm/MC/MCCodeEmitter.h"
26 #include "llvm/MC/MCDirectives.h"
27 #include "llvm/MC/MCObjectWriter.h"
28 #include "llvm/MC/MCSectionXCOFF.h"
29 #include "llvm/MC/MCSymbolXCOFF.h"
31 
32 using namespace llvm;
33 
35  std::unique_ptr<MCAsmBackend> MAB,
36  std::unique_ptr<MCObjectWriter> OW,
37  std::unique_ptr<MCCodeEmitter> Emitter)
38  : MCXCOFFStreamer(Context, std::move(MAB), std::move(OW),
39  std::move(Emitter)) {}
40 
41 void PPCXCOFFStreamer::emitPrefixedInstruction(const MCInst &Inst,
42  const MCSubtargetInfo &STI) {
43  // Prefixed instructions must not cross a 64-byte boundary (i.e. prefix is
44  // before the boundary and the remaining 4-bytes are after the boundary). In
45  // order to achieve this, a nop is added prior to any such boundary-crossing
46  // prefixed instruction. Align to 64 bytes if possible but add a maximum of 4
47  // bytes when trying to do that. If alignment requires adding more than 4
48  // bytes then the instruction won't be aligned.
49  emitCodeAlignment(64, 4);
50 
51  // Emit the instruction.
52  // Since the previous emit created a new fragment then adding this instruction
53  // also forces the addition of a new fragment. Inst is now the first
54  // instruction in that new fragment.
56 }
57 
59  const MCSubtargetInfo &STI) {
60  PPCMCCodeEmitter *Emitter =
61  static_cast<PPCMCCodeEmitter *>(getAssembler().getEmitterPtr());
62 
63  // Special handling is only for prefixed instructions.
64  if (!Emitter->isPrefixedInstruction(Inst)) {
66  return;
67  }
68  emitPrefixedInstruction(Inst, STI);
69 }
70 
73  std::unique_ptr<MCAsmBackend> MAB,
74  std::unique_ptr<MCObjectWriter> OW,
75  std::unique_ptr<MCCodeEmitter> Emitter) {
76  return new PPCXCOFFStreamer(Context, std::move(MAB), std::move(OW),
77  std::move(Emitter));
78 }
llvm::PPCMCCodeEmitter::isPrefixedInstruction
bool isPrefixedInstruction(const MCInst &MI) const
Definition: PPCMCCodeEmitter.cpp:488
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:72
MCCodeEmitter.h
MCDirectives.h
llvm::PPCMCCodeEmitter
Definition: PPCMCCodeEmitter.h:25
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
llvm::createPPCXCOFFStreamer
MCXCOFFStreamer * createPPCXCOFFStreamer(MCContext &Context, std::unique_ptr< MCAsmBackend > MAB, std::unique_ptr< MCObjectWriter > OW, std::unique_ptr< MCCodeEmitter > Emitter)
Definition: PPCXCOFFStreamer.cpp:72
Context
LLVMContext & Context
Definition: NVVMIntrRange.cpp:66
XCOFF.h
MCAsmBackend.h
llvm::MCObjectStreamer::emitInstruction
void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override
Emit the given Instruction into the current section.
Definition: MCObjectStreamer.cpp:362
llvm::PPCXCOFFStreamer
Definition: PPCXCOFFStreamer.h:21
llvm::MCAssembler::getEmitterPtr
MCCodeEmitter * getEmitterPtr() const
Definition: MCAssembler.h:296
MCSectionXCOFF.h
move
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
Definition: README.txt:546
MCSymbolXCOFF.h
llvm::move
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1605
PPCXCOFFStreamer.h
llvm::MCObjectStreamer::getAssembler
MCAssembler & getAssembler()
Definition: MCObjectStreamer.h:112
llvm::MCXCOFFStreamer
Definition: MCXCOFFStreamer.h:16
MCObjectWriter.h
PPCMCCodeEmitter.h
llvm::MCObjectStreamer::emitCodeAlignment
void emitCodeAlignment(unsigned ByteAlignment, unsigned MaxBytesToEmit=0) override
Emit nops until the byte alignment ByteAlignment is reached.
Definition: MCObjectStreamer.cpp:611
std
Definition: BitVector.h:838
llvm::PPCXCOFFStreamer::PPCXCOFFStreamer
PPCXCOFFStreamer(MCContext &Context, std::unique_ptr< MCAsmBackend > MAB, std::unique_ptr< MCObjectWriter > OW, std::unique_ptr< MCCodeEmitter > Emitter)
Definition: PPCXCOFFStreamer.cpp:34
llvm::PPCXCOFFStreamer::emitInstruction
void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override
Emit the given Instruction into the current section.
Definition: PPCXCOFFStreamer.cpp:58
TargetRegistry.h
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:75