LLVM 19.0.0git
RegisterCoalescer.h
Go to the documentation of this file.
1//===- RegisterCoalescer.h - Register Coalescing Interface ------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the abstract interface for register coalescers,
10// allowing them to interact with and query register allocators.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_CODEGEN_REGISTERCOALESCER_H
15#define LLVM_LIB_CODEGEN_REGISTERCOALESCER_H
16
18
19namespace llvm {
20
21class MachineInstr;
22class TargetRegisterClass;
23class TargetRegisterInfo;
24
25 /// A helper class for register coalescers. When deciding if
26 /// two registers can be coalesced, CoalescerPair can determine if a copy
27 /// instruction would become an identity copy after coalescing.
29 const TargetRegisterInfo &TRI;
30
31 /// The register that will be left after coalescing. It can be a
32 /// virtual or physical register.
33 Register DstReg;
34
35 /// The virtual register that will be coalesced into dstReg.
36 Register SrcReg;
37
38 /// The sub-register index of the old DstReg in the new coalesced register.
39 unsigned DstIdx = 0;
40
41 /// The sub-register index of the old SrcReg in the new coalesced register.
42 unsigned SrcIdx = 0;
43
44 /// True when the original copy was a partial subregister copy.
45 bool Partial = false;
46
47 /// True when both regs are virtual and newRC is constrained.
48 bool CrossClass = false;
49
50 /// True when DstReg and SrcReg are reversed from the original
51 /// copy instruction.
52 bool Flipped = false;
53
54 /// The register class of the coalesced register, or NULL if DstReg
55 /// is a physreg. This register class may be a super-register of both
56 /// SrcReg and DstReg.
57 const TargetRegisterClass *NewRC = nullptr;
58
59 public:
60 CoalescerPair(const TargetRegisterInfo &tri) : TRI(tri) {}
61
62 /// Create a CoalescerPair representing a virtreg-to-physreg copy.
63 /// No need to call setRegisters().
65 const TargetRegisterInfo &tri)
66 : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg) {}
67
68 /// Set registers to match the copy instruction MI. Return
69 /// false if MI is not a coalescable copy instruction.
70 bool setRegisters(const MachineInstr*);
71
72 /// Swap SrcReg and DstReg. Return false if swapping is impossible
73 /// because DstReg is a physical register, or SubIdx is set.
74 bool flip();
75
76 /// Return true if MI is a copy instruction that will become
77 /// an identity copy after coalescing.
78 bool isCoalescable(const MachineInstr*) const;
79
80 /// Return true if DstReg is a physical register.
81 bool isPhys() const { return !NewRC; }
82
83 /// Return true if the original copy instruction did not copy
84 /// the full register, but was a subreg operation.
85 bool isPartial() const { return Partial; }
86
87 /// Return true if DstReg is virtual and NewRC is a smaller
88 /// register class than DstReg's.
89 bool isCrossClass() const { return CrossClass; }
90
91 /// Return true when getSrcReg is the register being defined by
92 /// the original copy instruction.
93 bool isFlipped() const { return Flipped; }
94
95 /// Return the register (virtual or physical) that will remain
96 /// after coalescing.
97 Register getDstReg() const { return DstReg; }
98
99 /// Return the virtual register that will be coalesced away.
100 Register getSrcReg() const { return SrcReg; }
101
102 /// Return the subregister index that DstReg will be coalesced into, or 0.
103 unsigned getDstIdx() const { return DstIdx; }
104
105 /// Return the subregister index that SrcReg will be coalesced into, or 0.
106 unsigned getSrcIdx() const { return SrcIdx; }
107
108 /// Return the register class of the coalesced register.
109 const TargetRegisterClass *getNewRC() const { return NewRC; }
110 };
111
112} // end namespace llvm
113
114#endif // LLVM_LIB_CODEGEN_REGISTERCOALESCER_H
unsigned const TargetRegisterInfo * TRI
A helper class for register coalescers.
unsigned getDstIdx() const
Return the subregister index that DstReg will be coalesced into, or 0.
bool isFlipped() const
Return true when getSrcReg is the register being defined by the original copy instruction.
bool isPartial() const
Return true if the original copy instruction did not copy the full register, but was a subreg operati...
bool flip()
Swap SrcReg and DstReg.
bool isPhys() const
Return true if DstReg is a physical register.
bool isCrossClass() const
Return true if DstReg is virtual and NewRC is a smaller register class than DstReg's.
Register getDstReg() const
Return the register (virtual or physical) that will remain after coalescing.
bool isCoalescable(const MachineInstr *) const
Return true if MI is a copy instruction that will become an identity copy after coalescing.
CoalescerPair(const TargetRegisterInfo &tri)
CoalescerPair(Register VirtReg, MCRegister PhysReg, const TargetRegisterInfo &tri)
Create a CoalescerPair representing a virtreg-to-physreg copy.
const TargetRegisterClass * getNewRC() const
Return the register class of the coalesced register.
bool setRegisters(const MachineInstr *)
Set registers to match the copy instruction MI.
unsigned getSrcIdx() const
Return the subregister index that SrcReg will be coalesced into, or 0.
Register getSrcReg() const
Return the virtual register that will be coalesced away.
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:33
Representation of each machine instruction.
Definition: MachineInstr.h:68
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18