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15 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
16 #define LLVM_CODEGEN_MACHINEINSTR_H
44 template <
typename T>
class ArrayRef;
46 class DILocalVariable;
47 class MachineBasicBlock;
48 class MachineFunction;
49 class MachineRegisterInfo;
50 class ModuleSlotTracker;
52 template <
typename T>
class SmallVectorImpl;
55 class TargetInstrInfo;
56 class TargetRegisterClass;
57 class TargetRegisterInfo;
68 ilist_sentinel_tracking<true>> {
123 unsigned NumOperands = 0;
129 uint8_t AsmPrinterFlags = 0;
139 OperandCapacity CapOperands;
147 class ExtraInfo final
148 :
TrailingObjects<ExtraInfo, MachineMemOperand *, MCSymbol *, MDNode *> {
153 MCSymbol *PostInstrSymbol =
nullptr,
154 MDNode *HeapAllocMarker =
nullptr) {
155 bool HasPreInstrSymbol = PreInstrSymbol !=
nullptr;
156 bool HasPostInstrSymbol = PostInstrSymbol !=
nullptr;
157 bool HasHeapAllocMarker = HeapAllocMarker !=
nullptr;
159 totalSizeToAlloc<MachineMemOperand *, MCSymbol *, MDNode *>(
160 MMOs.
size(), HasPreInstrSymbol + HasPostInstrSymbol,
163 ExtraInfo(MMOs.
size(), HasPreInstrSymbol, HasPostInstrSymbol,
170 if (HasPreInstrSymbol)
171 Result->getTrailingObjects<
MCSymbol *>()[0] = PreInstrSymbol;
172 if (HasPostInstrSymbol)
173 Result->getTrailingObjects<
MCSymbol *>()[HasPreInstrSymbol] =
175 if (HasHeapAllocMarker)
176 Result->getTrailingObjects<
MDNode *>()[0] = HeapAllocMarker;
181 ArrayRef<MachineMemOperand *> getMMOs()
const {
182 return makeArrayRef(getTrailingObjects<MachineMemOperand *>(), NumMMOs);
186 return HasPreInstrSymbol ? getTrailingObjects<MCSymbol *>()[0] :
nullptr;
190 return HasPostInstrSymbol
191 ? getTrailingObjects<MCSymbol *>()[HasPreInstrSymbol]
196 return HasHeapAllocMarker ? getTrailingObjects<MDNode *>()[0] :
nullptr;
208 const bool HasPreInstrSymbol;
209 const bool HasPostInstrSymbol;
210 const bool HasHeapAllocMarker;
213 size_t numTrailingObjects(OverloadToken<MachineMemOperand *>)
const {
216 size_t numTrailingObjects(OverloadToken<MCSymbol *>)
const {
217 return HasPreInstrSymbol + HasPostInstrSymbol;
219 size_t numTrailingObjects(OverloadToken<MDNode *>)
const {
220 return HasHeapAllocMarker;
225 ExtraInfo(
int NumMMOs,
bool HasPreInstrSymbol,
bool HasPostInstrSymbol,
226 bool HasHeapAllocMarker)
227 : NumMMOs(NumMMOs), HasPreInstrSymbol(HasPreInstrSymbol),
228 HasPostInstrSymbol(HasPostInstrSymbol),
229 HasHeapAllocMarker(HasHeapAllocMarker) {}
235 enum ExtraInfoInlineKinds {
238 EIIK_PostInstrSymbol,
247 PointerSumType<ExtraInfoInlineKinds,
248 PointerSumTypeMember<EIIK_MMO, MachineMemOperand *>,
249 PointerSumTypeMember<EIIK_PreInstrSymbol, MCSymbol *>,
250 PointerSumTypeMember<EIIK_PostInstrSymbol, MCSymbol *>,
251 PointerSumTypeMember<EIIK_OutOfLine, ExtraInfo *>>
258 unsigned DebugInstrNum;
313 return AsmPrinterFlags &
Flag;
318 AsmPrinterFlags |=
Flag;
323 AsmPrinterFlags &= ~
Flag;
344 Flags = (Flags &
Mask) | (flags & ~
Mask);
523 if (MO.isReg() && MO.getReg())
524 UsedRegs.
insert(MO.getReg());
532 return Op.isReg() &&
Op.getReg() ==
Reg;
538 template <
typename Operand,
typename Instruction>
543 [
Reg](Operand &
Op) {
return Op.isReg() &&
Op.getReg() ==
Reg; });
555 return MachineInstr::getDebugOperandsForReg<MachineOperand, MachineInstr>(
695 if (
Info.is<EIIK_MMO>())
698 if (ExtraInfo *EI =
Info.get<EIIK_OutOfLine>())
699 return EI->getMMOs();
735 if (ExtraInfo *EI =
Info.get<EIIK_OutOfLine>())
736 return EI->getPreInstrSymbol();
747 if (ExtraInfo *EI =
Info.get<EIIK_OutOfLine>())
748 return EI->getPostInstrSymbol();
757 if (ExtraInfo *EI =
Info.get<EIIK_OutOfLine>())
758 return EI->getHeapAllocMarker();
779 "MCFlag out of range for bit mask in getFlags/hasPropertyInBundle.");
785 return hasPropertyInBundle(1ULL << MCFlag,
Type);
1047 !
getFlag(MachineInstr::MIFlag::NoFPExcept);
1201 return getOpcode() == TargetOpcode::CFI_INSTRUCTION;
1212 return getOpcode() == TargetOpcode::DBG_VALUE;
1215 return getOpcode() == TargetOpcode::DBG_VALUE_LIST;
1251 if (
Op.isReg() && !
Op.getReg().isValid())
1257 return getOpcode() == TargetOpcode::PHI ||
1277 return getOpcode() == TargetOpcode::INSERT_SUBREG;
1281 return getOpcode() == TargetOpcode::SUBREG_TO_REG;
1285 return getOpcode() == TargetOpcode::REG_SEQUENCE;
1289 return getOpcode() == TargetOpcode::BUNDLE;
1293 return getOpcode() == TargetOpcode::COPY;
1301 return getOpcode() == TargetOpcode::EXTRACT_SUBREG;
1324 case TargetOpcode::PHI:
1325 case TargetOpcode::G_PHI:
1326 case TargetOpcode::COPY:
1327 case TargetOpcode::INSERT_SUBREG:
1328 case TargetOpcode::SUBREG_TO_REG:
1329 case TargetOpcode::REG_SEQUENCE:
1412 return (Idx == -1) ? nullptr : &
getOperand(Idx);
1429 bool isDead =
false,
bool Overlap =
false,
1436 bool Overlap =
false,
1439 return (Idx == -1) ? nullptr : &
getOperand(Idx);
1444 bool Overlap =
false,
1447 Reg, isDead, Overlap,
TRI);
1489 bool ExploreBundle =
false)
const;
1511 void tieOperands(
unsigned DefIdx,
unsigned UseIdx);
1523 unsigned *UseOpIdx =
nullptr)
const {
1536 unsigned *DefOpIdx =
nullptr)
const {
1559 bool AddIfNotFound =
false);
1570 bool AddIfNotFound =
false);
1681 void print(
raw_ostream &OS,
bool IsStandalone =
true,
bool SkipOpers =
false,
1682 bool SkipDebugLoc =
false,
bool AddNewLine =
true,
1685 bool SkipOpers =
false,
bool SkipDebugLoc =
false,
1686 bool AddNewLine =
true,
1692 unsigned MaxDepth = UINT_MAX)
const;
1725 assert(DbgLoc.hasTrivialDestructor() &&
"Expected trivial destructor");
1870 MDNode *HeapAllocMarker);
1907 #endif // LLVM_CODEGEN_MACHINEINSTR_H
bool isDebugValue() const
void bundleWithSucc()
Bundle this instruction with its successor.
const MachineOperand & getDebugExpressionOp() const
Return the operand for the complex address expression referenced by this DBG_VALUE instruction.
unsigned getNumDebugOperands() const
Returns the total number of operands which are debug locations.
bool isBranch(QueryType Type=AnyInBundle) const
Returns true if this is a conditional, unconditional, or indirect branch.
void setDebugValueUndef()
Sets all register debug operands in this debug value instruction to be undef.
void clearRegisterDeads(Register Reg)
Clear all dead flags on operands defining register Reg.
void setPhysRegsDeadExcept(ArrayRef< Register > UsedRegs, const TargetRegisterInfo &TRI)
Mark every physreg used by this instruction as dead except those in the UsedRegs list.
bool isUndefDebugValue() const
Return true if the instruction is a debug value which describes a part of a variable as unavailable.
bool isExtractSubregLike(QueryType Type=IgnoreBundle) const
Return true if this instruction behaves the same way as the generic EXTRACT_SUBREG instructions.
unsigned getDebugInstrNum()
Fetch the instruction number of this MachineInstr.
iterator_range< mop_iterator > uses()
Returns a range that includes all operands that are register uses.
bool addRegisterDead(Register Reg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
We have determined MI defined a register without a use.
unsigned getOperandNo(const_mop_iterator I) const
Returns the number of the operand iterator I points to.
This is an optimization pass for GlobalISel generic memory operations.
bool isImplicitDef() const
unsigned getDebugOperandIndex(const MachineOperand *Op) const
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
bool isIndirectBranch(QueryType Type=AnyInBundle) const
Return true if this is an indirect branch, such as a branch through a register.
static unsigned getHashValue(const MachineInstr *const &MI)
bool usesCustomInsertionHook(QueryType Type=IgnoreBundle) const
Return true if this instruction requires custom insertion support when the DAG scheduler is inserting...
TrailingObjects(const TrailingObjects &)=delete
iterator_range< mop_iterator > explicit_operands()
bool isNotDuplicable(QueryType Type=AnyInBundle) const
Return true if this instruction cannot be safely duplicated.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
bool isSafeToMove(AAResults *AA, bool &SawStore) const
Return true if it is safe to move this instruction.
iterator_range< mop_iterator > debug_operands()
Returns a range over all operands that are used to determine the variable location for this DBG_VALUE...
bool mayLoadOrStore(QueryType Type=AnyInBundle) const
Return true if this instruction could possibly read or modify memory.
unsigned getNumExplicitOperands() const
Returns the number of non-implicit operands.
mmo_iterator memoperands_begin() const
Access to memory operands of the instruction.
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
MCSymbol * getPostInstrSymbol() const
Helper to extract a post-instruction symbol if one has been added.
static uint16_t copyFlagsFromInstruction(const Instruction &I)
bool isCompare(QueryType Type=IgnoreBundle) const
Return true if this instruction is a comparison.
bool isEHScopeReturn(QueryType Type=AnyInBundle) const
Return true if this is an instruction that marks the end of an EH scope, i.e., a catchpad or a cleanu...
MachineInstr * removeFromBundle()
Unlink this instruction from its basic block and return it without deleting it.
bool isRegSequenceLike(QueryType Type=IgnoreBundle) const
Return true if this instruction behaves the same way as the generic REG_SEQUENCE instructions.
bool mayLoad(QueryType Type=AnyInBundle) const
Return true if this instruction could possibly read memory.
Intrinsic::ID getIntrinsicID() const
bool isIndirectDebugValue() const
A DBG_VALUE is indirect iff the location operand is a register and the offset operand is an immediate...
iterator_range< mop_iterator > implicit_operands()
An ilist node that can access its parent list.
Reg
All possible values of the reg field in the ModR/M byte.
void clearAsmPrinterFlags()
Clear the AsmPrinter bitvector.
bool isMoveImmediate(QueryType Type=IgnoreBundle) const
Return true if this instruction is a move immediate (including conditional moves) instruction.
@ EH_LABEL
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
bool isInsertSubregLike(QueryType Type=IgnoreBundle) const
Return true if this instruction behaves the same way as the generic INSERT_SUBREG instructions.
bool isDebugOffsetImm() const
void bundleWithPred()
Bundle this instruction with its predecessor.
bool isPseudoProbe() const
void addRegisterDefined(Register Reg, const TargetRegisterInfo *RegInfo=nullptr)
We have determined MI defines a register.
bool allDefsAreDead() const
Return true if all the defs of this instruction are dead.
unsigned isConstantValuePHI() const
If the specified instruction is a PHI that always merges together the same virtual register,...
Callbacks do nothing by default in iplist and ilist.
iterator_range< mop_iterator > defs()
Returns a range over all explicit operands that are register definitions.
bool hasPostISelHook(QueryType Type=IgnoreBundle) const
Return true if this instruction requires adjustment after instruction selection by calling a target h...
bool isBundled() const
Return true if this instruction part of a bundle.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
const_mop_iterator operands_begin() const
const MCInstrDesc & getDesc() const
Returns the target instruction descriptor of this MachineInstr.
The instances of the Type class are immutable: once they are created, they are never changed.
Specialization of filter_iterator_base for forward iteration only.
const_iterator end(StringRef path)
Get end iterator over path.
A description of a memory reference used in the backend.
MachineOperand * findRegisterUseOperand(Register Reg, bool isKill=false, const TargetRegisterInfo *TRI=nullptr)
Wrapper for findRegisterUseOperandIdx, it returns a pointer to the MachineOperand rather than an inde...
const_iterator begin(StringRef path, Style style=Style::native)
Get begin iterator over path.
bool hasRegisterImplicitUseOperand(Register Reg) const
Returns true if the MachineInstr has an implicit-use operand of exactly the given register (not consi...
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
const MachineFunction * getMF() const
Return the function that contains the basic block that this instruction belongs to.
unsigned peekDebugInstrNum() const
Examine the instruction number of this MachineInstr.
mop_iterator operands_end()
bool isVariadic(QueryType Type=IgnoreBundle) const
Return true if this instruction can have a variable number of operands.
iterator_range< const_mop_iterator > uses() const
Returns a range that includes all operands that are register uses.
bool hasDebugOperandForReg(Register Reg) const
Returns whether this debug value has at least one debug operand with the register Reg.
iterator_range< filter_iterator< const MachineOperand *, std::function< bool(const MachineOperand &Op)> > > getDebugOperandsForReg(Register Reg) const
Manage lifetime of a slot tracker for printing IR.
unsigned const TargetRegisterInfo * TRI
MachineFunction * getMF()
bool hasOneMemOperand() const
Return true if this instruction has exactly one MachineMemOperand.
void addMemOperand(MachineFunction &MF, MachineMemOperand *MO)
Add a MachineMemOperand to the machine instruction.
const DILabel * getDebugLabel() const
Return the debug label referenced by this DBG_LABEL instruction.
bool isPreISelOpcode(QueryType Type=IgnoreBundle) const
Return true if this is an instruction that should go through the usual legalization steps.
static bool isImm(const MachineOperand &MO, MachineRegisterInfo *MRI)
static MachineInstr * getTombstoneKey()
bool hasOrderedMemoryRef() const
Return true if this instruction may have an ordered or volatile memory reference, or if the informati...
bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx=nullptr) const
Return true if the use operand of the specified index is tied to a def operand.
bool isInsertSubreg() const
unsigned getNumDefs() const
Returns the total number of definitions.
@ INLINEASM
INLINEASM - Represents an inline asm block.
@ PSEUDO_PROBE
Pseudo probe for AutoFDO, as a place holder in a basic block to improve the sample counts quality.
unsigned findTiedOperandIdx(unsigned OpIdx) const
Given the index of a tied register operand, find the operand it is tied to.
bool readsVirtualRegister(Register Reg) const
Return true if the MachineInstr reads the specified virtual register.
MachineBasicBlock * getParent()
static bool isEqual(const MachineInstr *const &LHS, const MachineInstr *const &RHS)
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
uint16_t getFlags() const
Return the MI flags bitvector.
static iterator_range< filter_iterator< Operand *, std::function< bool(Operand &Op)> > > getDebugOperandsForReg(Instruction *MI, Register Reg)
Returns a range of all of the operands that correspond to a debug use of Reg.
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
bool isUnconditionalBranch(QueryType Type=AnyInBundle) const
Return true if this is a branch which always transfers control flow to some other block.
bool hasExtraSrcRegAllocReq(QueryType Type=AnyInBundle) const
Returns true if this instruction source operands have special register allocation requirements that a...
void moveBefore(MachineInstr *MovePos)
Move the instruction before MovePos.
An information struct used to provide DenseMap with the various necessary components for a given valu...
bool isLabel() const
Returns true if the MachineInstr represents a label.
bool isCall(QueryType Type=AnyInBundle) const
TargetInstrInfo - Interface to description of machine instruction set.
void setHeapAllocMarker(MachineFunction &MF, MDNode *MD)
Set a marker on instructions that denotes where we should create and emit heap alloc site labels.
bool isPredicable(QueryType Type=AllInBundle) const
Return true if this instruction has a predicate operand that controls execution.
void copyImplicitOps(MachineFunction &MF, const MachineInstr &MI)
Copy implicit register operands from specified instruction to this instruction.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
void setMemRefs(MachineFunction &MF, ArrayRef< MachineMemOperand * > MemRefs)
Assign this MachineInstr's memory reference descriptor list.
decltype(auto) adl_end(ContainerTy &&container)
const MachineOperand & getOperand(unsigned i) const
Optional< unsigned > getFoldedSpillSize(const TargetInstrInfo *TII) const
Return a valid size if the instruction is a folded spill instruction.
void clearKillInfo()
Clears kill flags on all operands.
iterator_range< const_mop_iterator > implicit_operands() const
bool isInsideBundle() const
Return true if MI is in a bundle (but not the first MI in a bundle).
void cloneMergedMemRefs(MachineFunction &MF, ArrayRef< const MachineInstr * > MIs)
Clone the merge of multiple MachineInstrs' memory reference descriptors list and replace ours with it...
bool mayAlias(AAResults *AA, const MachineInstr &Other, bool UseTBAA) const
Returns true if this instruction's memory access aliases the memory access of Other.
bool isIdentityCopy() const
Return true is the instruction is an identity copy.
MachineInstr * removeFromParent()
Unlink 'this' from the containing basic block, and return it without deleting it.
void unbundleFromSucc()
Break bundle below this instruction.
bool isDebugOrPseudoInstr() const
void addImplicitDefUseOperands(MachineFunction &MF)
Add all implicit def and use operands to this instruction.
bool isDebugInstr() const
CommentFlag
Flags to specify different kinds of comments to output in assembly code.
bool addRegisterKilled(Register IncomingReg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
We have determined MI kills a register.
const HexagonInstrInfo * TII
Describe properties that are true of each instruction in the target description file.
MachineOperand class - Representation of each machine instruction operand.
bool isPseudo(QueryType Type=IgnoreBundle) const
Return true if this is a pseudo instruction that doesn't correspond to a real machine instruction.
uint8_t getAsmPrinterFlags() const
Return the asm printer flags bitvector.
void clearFlag(MIFlag Flag)
clearFlag - Clear a MI flag.
Flag
These should be considered private to the implementation of the MCInstrDesc class.
void substituteRegister(Register FromReg, Register ToReg, unsigned SubIdx, const TargetRegisterInfo &RegInfo)
Replace all occurrences of FromReg with ToReg:SubIdx, properly composing subreg indices where necessa...
unsigned getNumImplicitDefs() const
Return the number of implicit defs this instruct has.
bool shouldUpdateCallSiteInfo() const
Return true if copying, moving, or erasing this instruction requires updating Call Site Info (see cop...
unsigned getIntrinsicID() const
Returns the Intrinsic::ID for this instruction.
This class implements an extremely fast bulk output stream that can only output to a stream.
unsigned getBundleSize() const
Return the number of instructions inside the MI bundle, excluding the bundle header.
raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)
bool isConvertibleTo3Addr(QueryType Type=IgnoreBundle) const
Return true if this is a 2-address instruction which can be changed into a 3-address instruction if n...
bool isStackAligningInlineAsm() const
Analysis containing CSE Info
void setPreInstrSymbol(MachineFunction &MF, MCSymbol *Symbol)
Set a symbol that will be emitted just prior to the instruction itself.
bool isIdenticalTo(const MachineInstr &Other, MICheckType Check=CheckDefs) const
Return true if this instruction is identical to Other.
bool hasProperty(unsigned MCFlag, QueryType Type=AnyInBundle) const
Return true if the instruction (or in the case of a bundle, the instructions inside the bundle) has t...
bool isLoadFoldBarrier() const
Returns true if it is illegal to fold a load across this instruction.
bool definesRegister(Register Reg, const TargetRegisterInfo *TRI=nullptr) const
Return true if the MachineInstr fully defines the specified register.
void dumpr(const MachineRegisterInfo &MRI, unsigned MaxDepth=UINT_MAX) const
Print on dbgs() the current instruction and the instructions defining its operands and so on until we...
bool killsRegister(Register Reg, const TargetRegisterInfo *TRI=nullptr) const
Return true if the MachineInstr kills the specified register.
bool isNonListDebugValue() const
Special DenseMapInfo traits to compare MachineInstr* by value of the instruction rather than by point...
virtual void print(raw_ostream &OS, const Module *M) const
print - Print out the internal state of the pass.
bool isConvergent(QueryType Type=AnyInBundle) const
Return true if this instruction is convergent.
mir Rename Register Operands
Template traits for intrusive list.
void copyIRFlags(const Instruction &I)
Copy all flags to MachineInst MIFlags.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
LLT getTypeToPrint(unsigned OpIdx, SmallBitVector &PrintedTypes, const MachineRegisterInfo &MRI) const
Debugging supportDetermine the generic type to be printed (if needed) on uses and defs.
const MachineOperand & getDebugOffset() const
Return the operand containing the offset to be used if this DBG_VALUE instruction is indirect; will b...
MachineOperand & getDebugOperand(unsigned Index)
void clearAsmPrinterFlag(CommentFlag Flag)
Clear specific AsmPrinter flags.
void emitError(StringRef Msg) const
Emit an error referring to the source location of this instruction.
const DIExpression * getDebugExpression() const
Return the complex address expression referenced by this DBG_VALUE instruction.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Representation of each machine instruction.
unsigned getNumMemOperands() const
Return the number of memory operands.
bool getFlag(MIFlag Flag) const
Return whether an MI flag is set.
const MachineOperand * findRegisterDefOperand(Register Reg, bool isDead=false, bool Overlap=false, const TargetRegisterInfo *TRI=nullptr) const
bool isCommutable(QueryType Type=IgnoreBundle) const
Return true if this may be a 2- or 3-address instruction (of the form "X = op Y, Z,...
const MachineOperand & getDebugVariableOp() const
Return the operand for the debug variable referenced by this DBG_VALUE instruction.
void cloneMemRefs(MachineFunction &MF, const MachineInstr &MI)
Clone another MachineInstr's memory reference descriptor list and replace ours with it.
bool isMetaInstruction(QueryType Type=IgnoreBundle) const
Return true if this instruction doesn't produce any output in the form of executable instructions.
unsigned getNumImplicitOperands() const
Returns the implicit operands number.
Allocate memory in an ever growing pool, as if by bump-pointer.
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
void setRegisterDefReadUndef(Register Reg, bool IsUndef=true)
Mark all subregister defs of register Reg with the undef flag.
mop_iterator operands_begin()
bool isAsCheapAsAMove(QueryType Type=AllInBundle) const
Returns true if this instruction has the same cost (or less) than a move instruction.
MachineOperand & getDebugOffset()
ArrayRef< MachineMemOperand * >::iterator mmo_iterator
void collectDebugValues(SmallVectorImpl< MachineInstr * > &DbgValues)
Scan instructions immediately following MI and collect any matching DBG_VALUEs.
void setFlags(unsigned flags)
void unbundleFromPred()
Break bundle above this instruction.
void clearRegisterKills(Register Reg, const TargetRegisterInfo *RegInfo)
Clear all kill flags affecting Reg.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
std::pair< bool, bool > readsWritesVirtualRegister(Register Reg, SmallVectorImpl< unsigned > *Ops=nullptr) const
Return a pair of bools (reads, writes) indicating if this instruction reads or writes Reg.
bool isMoveReg(QueryType Type=IgnoreBundle) const
Return true if this instruction is a register move.
mmo_iterator memoperands_end() const
Access to memory operands of the instruction.
MachineInstr & operator=(const MachineInstr &)=delete
print Print MemDeps of function
bool hasDelaySlot(QueryType Type=AnyInBundle) const
Returns true if the specified instruction has a delay slot which must be filled by the code generator...
InlineAsm::AsmDialect getInlineAsmDialect() const
bool isDereferenceableInvariantLoad(AAResults *AA) const
Return true if this load instruction never traps and points to a memory location whose value doesn't ...
Register getReg() const
getReg - Returns the register number.
static cl::opt< bool > UseTBAA("use-tbaa-in-sched-mi", cl::Hidden, cl::init(true), cl::desc("Enable use of TBAA during MI DAG construction"))
bool isReturn(QueryType Type=AnyInBundle) const
bool isOperandSubregIdx(unsigned OpIdx) const
Return true if operand OpIdx is a subregister index.
bool readsRegister(Register Reg, const TargetRegisterInfo *TRI=nullptr) const
Return true if the MachineInstr reads the specified register.
@ ANNOTATION_LABEL
ANNOTATION_LABEL - Represents a mid basic block label used by annotations.
void eraseFromBundle()
Unlink 'this' form its basic block and delete it.
const DILocalVariable * getDebugVariable() const
Return the debug variable referenced by this DBG_VALUE instruction.
bool isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx=nullptr) const
Given the index of a register def operand, check if the register def is tied to a source operand,...
int findInlineAsmFlagIdx(unsigned OpIdx, unsigned *GroupNo=nullptr) const
Find the index of the flag word operand that corresponds to operand OpIdx on an inline asm instructio...
bool hasImplicitDef() const
Returns true if the instruction has implicit definition.
SmallSet< Register, 4 > getUsedDebugRegs() const
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
uint64_t getFlags() const
Return flags of this instruction.
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
StringRef - Represent a constant reference to a string, i.e.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
void untieRegOperand(unsigned OpIdx)
Break any tie involving OpIdx.
MDNode * getHeapAllocMarker() const
Helper to extract a heap alloc marker if one has been added.
Optional< unsigned > getFoldedRestoreSize(const TargetInstrInfo *TII) const
Return a valid size if the instruction is a folded restore instruction.
bool hasExtraDefRegAllocReq(QueryType Type=AnyInBundle) const
Returns true if this instruction def operands have special register allocation requirements that are ...
int findFirstPredOperandIdx() const
Find the index of the first operand in the operand list that is used to represent the predicate.
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
void print(raw_ostream &OS, bool IsStandalone=true, bool SkipOpers=false, bool SkipDebugLoc=false, bool AddNewLine=true, const TargetInstrInfo *TII=nullptr) const
Print this MI to OS.
bool isTerminator(QueryType Type=AnyInBundle) const
Returns true if this instruction part of the terminator for a basic block.
bool isDebugLabel() const
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
MCSymbol * getPreInstrSymbol() const
Helper to extract a pre-instruction symbol if one has been added.
std::pair< NoneType, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
const MachineBasicBlock * getParent() const
const MachineOperand * findRegisterUseOperand(Register Reg, bool isKill=false, const TargetRegisterInfo *TRI=nullptr) const
const TargetRegisterClass * getRegClassConstraint(unsigned OpIdx, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const
Compute the static register class constraint for operand OpIdx.
iterator_range< filter_iterator< detail::IterOfRange< RangeT >, PredicateT > > make_filter_range(RangeT &&Range, PredicateT Pred)
Convenience function that takes a range of elements and a predicate, and return a new filter_iterator...
unsigned const MachineRegisterInfo * MRI
Wrapper class representing virtual and physical registers.
bool isCFIInstruction() const
static const unsigned MaxDepth
unsigned getSubReg() const
Recycle small arrays allocated from a BumpPtrAllocator.
const CustomOperand< const MCSubtargetInfo & > Msg[]
bool isExtractSubreg() const
const TargetRegisterClass * getRegClassConstraintEffect(unsigned OpIdx, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const
Applies the constraints (def/use) implied by the OpIdx operand to the given CurRC.
bool modifiesRegister(Register Reg, const TargetRegisterInfo *TRI=nullptr) const
Return true if the MachineInstr modifies (fully define or partially define) the specified register.
bool canFoldAsLoad(QueryType Type=IgnoreBundle) const
Return true for instructions that can be folded as memory operands in other instructions.
bool isRegSequence() const
const_mop_iterator operands_end() const
uint16_t mergeFlagsWith(const MachineInstr &Other) const
Return the MIFlags which represent both MachineInstrs.
bool isCopyLike() const
Return true if the instruction behaves like a copy.
iterator_range< const_mop_iterator > explicit_uses() const
void cloneInstrSymbols(MachineFunction &MF, const MachineInstr &MI)
Clone another MachineInstr's pre- and post- instruction symbols and replace ours with it.
void setAsmPrinterFlag(uint8_t Flag)
Set a flag for the AsmPrinter.
bool mayStore(QueryType Type=AnyInBundle) const
Return true if this instruction could possibly modify memory.
bool hasUnmodeledSideEffects() const
Return true if this instruction has side effects that are not modeled by mayLoad / mayStore,...
MachineOperand & getOperand(unsigned i)
decltype(auto) adl_begin(ContainerTy &&container)
@ INLINEASM_BR
INLINEASM_BR - Branching version of inline asm. Used by asm-goto.
bool isDebugEntryValue() const
A DBG_VALUE is an entry value iff its debug expression contains the DW_OP_LLVM_entry_value operation.
iterator_range< const_mop_iterator > explicit_operands() const
See the file comment for details on the usage of the TrailingObjects type.
bool isCandidateForCallSiteEntry(QueryType Type=IgnoreBundle) const
Return true if this is a call instruction that may have an associated call site entry in the debug in...
void setDebugLoc(DebugLoc DL)
Replace current source information with new such.
bool isBundledWithPred() const
Return true if this instruction is part of a bundle, and it is not the first instruction in the bundl...
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
bool memoperands_empty() const
Return true if we don't have any memory operands which described the memory access done by this instr...
const MachineOperand & getDebugOperand(unsigned Index) const
bool getAsmPrinterFlag(CommentFlag Flag) const
Return whether an AsmPrinter flag is set.
void setDesc(const MCInstrDesc &TID)
Replace the instruction descriptor (thus opcode) of the current instruction with a new one.
ArrayRef< T > makeArrayRef(const T &OneElt)
Construct an ArrayRef from a single element.
void removeOperand(unsigned OpNo)
Erase an operand from an instruction, leaving it with one fewer operand than it started with.
void dropDebugNumber()
Drop any variable location debugging information associated with this instruction.
iterator_range< filter_iterator< MachineOperand *, std::function< bool(MachineOperand &Op)> > > getDebugOperandsForReg(Register Reg)
iterator_range< mop_iterator > explicit_uses()
int findRegisterDefOperandIdx(Register Reg, bool isDead=false, bool Overlap=false, const TargetRegisterInfo *TRI=nullptr) const
Returns the operand index that is a def of the specified register or -1 if it is not found.
bool isBundledWithSucc() const
Return true if this instruction is part of a bundle, and it is not the last instruction in the bundle...
unsigned getNumOperands() const
Retuns the total number of operands.
bool isMSInlineAsm() const
FIXME: Seems like a layering violation that the AsmDialect, which is X86 specific,...
void addOperand(MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
size_t size() const
size - Get the array size.
iterator_range< const_mop_iterator > debug_operands() const
Returns a range over all operands that are used to determine the variable location for this DBG_VALUE...
A range adaptor for a pair of iterators.
void dropMemRefs(MachineFunction &MF)
Clear this MachineInstr's memory reference descriptor list.
bool isTransient() const
Return true if this is a transient instruction that is either very likely to be eliminated during reg...
bool isDebugOperand(const MachineOperand *Op) const
ArrayRef< MachineMemOperand * > memoperands() const
Access to memory operands of the instruction.
bool hasComplexRegisterTies() const
Return true when an instruction has tied register that can't be determined by the instruction's descr...
bool isConditionalBranch(QueryType Type=AnyInBundle) const
Return true if this is a branch which may fall through to the next instruction or may transfer contro...
bool isBitcast(QueryType Type=IgnoreBundle) const
Return true if this instruction is a bitcast instruction.
static MachineInstr * getEmptyKey()
bool isSelect(QueryType Type=IgnoreBundle) const
Return true if this instruction is a select instruction.
Optional< unsigned > getRestoreSize(const TargetInstrInfo *TII) const
Return a valid size if the instruction is a restore instruction.
const TargetRegisterClass * getRegClassConstraintEffectForVReg(Register Reg, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, bool ExploreBundle=false) const
Applies the constraints (def/use) implied by this MI on Reg to the given CurRC.
bool isAnnotationLabel() const
iterator_range< const_mop_iterator > operands() const
void setDebugInstrNum(unsigned Num)
Set instruction number of this MachineInstr.
bool isSubregToReg() const
bool isRematerializable(QueryType Type=AllInBundle) const
Returns true if this instruction is a candidate for remat.
void tieOperands(unsigned DefIdx, unsigned UseIdx)
Add a tie between the register operands at DefIdx and UseIdx.
bool mayRaiseFPException() const
Return true if this instruction could possibly raise a floating-point exception.
bool registerDefIsDead(Register Reg, const TargetRegisterInfo *TRI=nullptr) const
Returns true if the register is dead in this machine instruction.
bool isDebugValueList() const
MachineOperand * findRegisterDefOperand(Register Reg, bool isDead=false, bool Overlap=false, const TargetRegisterInfo *TRI=nullptr)
Wrapper for findRegisterDefOperandIdx, it returns a pointer to the MachineOperand rather than an inde...
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
bool hasOptionalDef(QueryType Type=IgnoreBundle) const
Set if this instruction has an optional definition, e.g.
we should consider alternate ways to model stack dependencies Lots of things could be done in WebAssemblyTargetTransformInfo cpp there are numerous optimization related hooks that can be overridden in WebAssemblyTargetLowering Instead of the OptimizeReturned which should consider preserving the returned attribute through to MachineInstrs and extending the MemIntrinsicResults pass to do this optimization on calls too That would also let the WebAssemblyPeephole pass clean up dead defs for such as it does for stores Consider implementing and or getMachineCombinerPatterns Find a clean way to fix the problem which leads to the Shrink Wrapping pass being run after the WebAssembly PEI pass When setting multiple variables to the same we currently get code like const It could be done with a smaller encoding like local tee $pop5 local copy
bool isBarrier(QueryType Type=AnyInBundle) const
Returns true if the specified instruction stops control flow from executing the instruction immediate...
QueryType
API for querying MachineInstr properties.
iterator_range< mop_iterator > operands()
int findRegisterUseOperandIdx(Register Reg, bool isKill=false, const TargetRegisterInfo *TRI=nullptr) const
Returns the operand index that is a use of the specific register or -1 if it is not found.
void setPostInstrSymbol(MachineFunction &MF, MCSymbol *Symbol)
Set a symbol that will be emitted just after the instruction itself.
Optional< unsigned > getSpillSize(const TargetInstrInfo *TII) const
Return a valid size if the instruction is a spill instruction.
unsigned getNumExplicitDefs() const
Returns the number of non-implicit definitions.
void setFlag(MIFlag Flag)
Set a MI flag.
Optional< std::vector< StOtherPiece > > Other
iterator_range< const_mop_iterator > defs() const
Returns a range over all explicit operands that are register definitions.
void changeDebugValuesDefReg(Register Reg)
Find all DBG_VALUEs that point to the register def in this instruction and point them to Reg instead.