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20 #define DEBUG_TYPE "llvm-mca"
29 unsigned NumRetired = 0;
31 if (MaxRetirePerCycle != 0 && NumRetired == MaxRetirePerCycle)
This is an optimization pass for GlobalISel generic memory operations.
void removeRegisterWrite(const WriteState &WS, MutableArrayRef< unsigned > FreedPhysRegs)
const RUToken & getCurrentToken() const
An instruction propagated through the simulated instruction pipeline.
SmallVectorImpl< WriteState > & getDefs()
unsigned getNumRegisterFiles() const
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
static const unsigned UnhandledTokenID
Statically lint checks LLVM IR
void notifyInstructionRetired(const InstRef &IR) const
Error execute(InstRef &IR) override
The primary action that this stage performs on instruction IR.
Error cycleEnd() override
Called once at the end of each cycle.
unsigned getMaxRetirePerCycle() const
Error cycleStart() override
Called once at the start of each cycle.
Subclass of Error for the sole purpose of identifying the success path in the type system.
void onInstructionExecuted(unsigned TokenID)
unsigned getRCUTokenID() const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
An InstRef contains both a SourceMgr index and Instruction pair.
void consumeCurrentToken()
void onInstructionExecuted(Instruction *IS)
virtual void onInstructionRetired(const InstRef &IR)
Lightweight error class with error context and mandatory checking.
Tracks uses of a register definition (e.g.