LLVM  14.0.0git
RetireStage.cpp
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1 //===---------------------- RetireStage.cpp ---------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 ///
10 /// This file defines the retire stage of an instruction pipeline.
11 /// The RetireStage represents the process logic that interacts with the
12 /// simulated RetireControlUnit hardware.
13 ///
14 //===----------------------------------------------------------------------===//
15 
18 #include "llvm/Support/Debug.h"
19 
20 #define DEBUG_TYPE "llvm-mca"
21 
22 namespace llvm {
23 namespace mca {
24 
26  PRF.cycleStart();
27 
28  const unsigned MaxRetirePerCycle = RCU.getMaxRetirePerCycle();
29  unsigned NumRetired = 0;
30  while (!RCU.isEmpty()) {
31  if (MaxRetirePerCycle != 0 && NumRetired == MaxRetirePerCycle)
32  break;
33  const RetireControlUnit::RUToken &Current = RCU.getCurrentToken();
34  if (!Current.Executed)
35  break;
37  RCU.consumeCurrentToken();
38  NumRetired++;
39  }
40 
41  return llvm::ErrorSuccess();
42 }
43 
45  PRF.cycleEnd();
46  return llvm::ErrorSuccess();
47 }
48 
50  Instruction &IS = *IR.getInstruction();
51 
52  PRF.onInstructionExecuted(&IS);
53  unsigned TokenID = IS.getRCUTokenID();
55  RCU.onInstructionExecuted(TokenID);
56 
57  return llvm::ErrorSuccess();
58 }
59 
61  LLVM_DEBUG(llvm::dbgs() << "[E] Instruction Retired: #" << IR << '\n');
63  const Instruction &Inst = *IR.getInstruction();
64 
65  // Release the load/store queue entries.
66  if (Inst.isMemOp())
68 
69  for (const WriteState &WS : Inst.getDefs())
70  PRF.removeRegisterWrite(WS, FreedRegs);
71  notifyEvent<HWInstructionEvent>(HWInstructionRetiredEvent(IR, FreedRegs));
72 }
73 
74 } // namespace mca
75 } // namespace llvm
llvm
This file implements support for optimizing divisions by a constant.
Definition: AllocatorList.h:23
llvm::mca::RegisterFile::removeRegisterWrite
void removeRegisterWrite(const WriteState &WS, MutableArrayRef< unsigned > FreedPhysRegs)
Definition: RegisterFile.cpp:332
llvm::SmallVector< unsigned, 4 >
llvm::mca::RetireControlUnit::isEmpty
bool isEmpty() const
Definition: RetireControlUnit.h:82
RetireStage.h
llvm::mca::RetireControlUnit::getCurrentToken
const RUToken & getCurrentToken() const
Definition: RetireControlUnit.cpp:58
llvm::mca::Instruction
An instruction propagated through the simulated instruction pipeline.
Definition: Instruction.h:569
llvm::mca::InstructionBase::getDefs
SmallVectorImpl< WriteState > & getDefs()
Definition: Instruction.h:524
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
llvm::mca::RegisterFile::cycleStart
void cycleStart()
Definition: RegisterFile.cpp:100
llvm::mca::RegisterFile::getNumRegisterFiles
unsigned getNumRegisterFiles() const
Definition: RegisterFile.h:293
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
llvm::mca::RetireControlUnit::UnhandledTokenID
static const unsigned UnhandledTokenID
Definition: RetireControlUnit.h:109
llvm::mca::RegisterFile::cycleEnd
void cycleEnd()
Definition: RegisterFile.h:302
IR
Statically lint checks LLVM IR
Definition: Lint.cpp:744
llvm::mca::RetireStage::notifyInstructionRetired
void notifyInstructionRetired(const InstRef &IR) const
Definition: RetireStage.cpp:60
llvm::mca::RetireStage::execute
Error execute(InstRef &IR) override
The primary action that this stage performs on instruction IR.
Definition: RetireStage.cpp:49
llvm::mca::RetireStage::cycleEnd
Error cycleEnd() override
Called once at the end of each cycle.
Definition: RetireStage.cpp:44
llvm::mca::RetireControlUnit::getMaxRetirePerCycle
unsigned getMaxRetirePerCycle() const
Definition: RetireControlUnit.h:88
llvm::mca::RetireStage::cycleStart
Error cycleStart() override
Called once at the start of each cycle.
Definition: RetireStage.cpp:25
llvm::ErrorSuccess
Subclass of Error for the sole purpose of identifying the success path in the type system.
Definition: Error.h:329
llvm::mca::RetireControlUnit::onInstructionExecuted
void onInstructionExecuted(unsigned TokenID)
Definition: RetireControlUnit.cpp:88
llvm::mca::Instruction::getRCUTokenID
unsigned getRCUTokenID() const
Definition: Instruction.h:622
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::mca::InstRef
An InstRef contains both a SourceMgr index and Instruction pair.
Definition: Instruction.h:686
llvm::mca::RetireControlUnit::consumeCurrentToken
void consumeCurrentToken()
Definition: RetireControlUnit.cpp:77
llvm::mca::RegisterFile::onInstructionExecuted
void onInstructionExecuted(Instruction *IS)
Definition: RegisterFile.cpp:105
llvm::mca::LSUnitBase::onInstructionRetired
virtual void onInstructionRetired(const InstRef &IR)
Definition: LSUnit.cpp:213
llvm::mca::RetireControlUnit::RUToken::Executed
bool Executed
Definition: RetireControlUnit.h:54
llvm::mca::HWInstructionRetiredEvent
Definition: HWEventListener.h:94
HWEventListener.h
llvm::Error
Lightweight error class with error context and mandatory checking.
Definition: Error.h:157
llvm::mca::RetireControlUnit::RUToken::IR
InstRef IR
Definition: RetireControlUnit.h:52
llvm::mca::RetireControlUnit::RUToken
Definition: RetireControlUnit.h:51
llvm::mca::InstructionBase::isMemOp
bool isMemOp() const
Definition: Instruction.h:562
llvm::mca::WriteState
Tracks uses of a register definition (e.g.
Definition: Instruction.h:197
Debug.h