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VECustomDAG.h
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1 //===------------ VECustomDAG.h - VE Custom DAG Nodes -----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the helper functions that VE uses to lower LLVM code into a
10 // selection DAG. For example, hiding SDLoc, and easy to use SDNodeFlags.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_VE_VECUSTOMDAG_H
15 #define LLVM_LIB_TARGET_VE_VECUSTOMDAG_H
16 
17 #include "VE.h"
18 #include "VEISelLowering.h"
21 
22 namespace llvm {
23 
24 Optional<unsigned> getVVPOpcode(unsigned Opcode);
25 
26 bool isVVPUnaryOp(unsigned Opcode);
27 bool isVVPBinaryOp(unsigned Opcode);
28 bool isVVPReductionOp(unsigned Opcode);
29 
30 MVT splitVectorType(MVT VT);
31 
32 bool isPackedVectorType(EVT SomeVT);
33 
34 bool isMaskType(EVT SomeVT);
35 
36 bool isMaskArithmetic(SDValue Op);
37 
38 bool isVVPOrVEC(unsigned);
39 
40 bool supportsPackedMode(unsigned Opcode, EVT IdiomVT);
41 
42 bool isPackingSupportOpcode(unsigned Opc);
43 
44 bool maySafelyIgnoreMask(SDValue Op);
45 
46 /// The VE backend uses a two-staged process to lower and legalize vector
47 /// instructions:
48 //
49 /// 1. VP and standard vector SDNodes are lowered to SDNodes of the VVP_* layer.
50 //
51 // All VVP nodes have a mask and an Active Vector Length (AVL) parameter.
52 // The AVL parameters refers to the element position in the vector the VVP
53 // node operates on.
54 //
55 //
56 // 2. The VVP SDNodes are legalized. The AVL in a legal VVP node refers to
57 // chunks of 64bit. We track this by wrapping the AVL in a LEGALAVL node.
58 //
59 // The AVL mechanism in the VE architecture always refers to chunks of
60 // 64bit, regardless of the actual element type vector instructions are
61 // operating on. For vector types v256.32 or v256.64 nothing needs to be
62 // legalized since each element occupies a 64bit chunk - there is no
63 // difference between counting 64bit chunks or element positions. However,
64 // all vector types with > 256 elements store more than one logical element
65 // per 64bit chunk and need to be transformed.
66 // However legalization is performed, the resulting legal VVP SDNodes will
67 // have a LEGALAVL node as their AVL operand. The LEGALAVL nodes wraps
68 // around an AVL that refers to 64 bit chunks just as the architecture
69 // demands - that is, the wrapped AVL is the correct setting for the VL
70 // register for this VVP operation to get the desired behavior.
71 //
72 /// AVL Functions {
73 // The AVL operand position of this node.
74 Optional<int> getAVLPos(unsigned);
75 
76 // Whether this is a LEGALAVL node.
77 bool isLegalAVL(SDValue AVL);
78 
79 // The AVL operand of this node.
80 SDValue getNodeAVL(SDValue);
81 
82 // Mask position of this node.
83 Optional<int> getMaskPos(unsigned);
84 
85 SDValue getNodeMask(SDValue);
86 
87 // Return the AVL operand of this node. If it is a LEGALAVL node, unwrap it.
88 // Return with the boolean whether unwrapping happened.
89 std::pair<SDValue, bool> getAnnotatedNodeAVL(SDValue);
90 
91 /// } AVL Functions
92 
93 /// Node Properties {
94 
95 Optional<EVT> getIdiomaticVectorType(SDNode *Op);
96 
97 SDValue getLoadStoreStride(SDValue Op, VECustomDAG &CDAG);
98 
99 SDValue getMemoryPtr(SDValue Op);
100 
101 SDValue getNodeChain(SDValue Op);
102 
103 SDValue getStoredValue(SDValue Op);
104 
105 SDValue getNodePassthru(SDValue Op);
106 
107 SDValue getGatherScatterIndex(SDValue Op);
108 
109 SDValue getGatherScatterScale(SDValue Op);
110 
111 unsigned getScalarReductionOpcode(unsigned VVPOC, bool IsMask);
112 
113 // Whether this VP_REDUCE_*/ VECREDUCE_*/VVP_REDUCE_* SDNode has a start
114 // parameter.
115 bool hasReductionStartParam(unsigned VVPOC);
116 
117 /// } Node Properties
118 
119 enum class Packing {
120  Normal = 0, // 256 element standard mode.
121  Dense = 1 // 512 element packed mode.
122 };
123 
124 // Get the vector or mask register type for this packing and element type.
125 MVT getLegalVectorType(Packing P, MVT ElemVT);
126 
127 // Whether this type belongs to a packed mask or vector register.
129 
130 enum class PackElem : int8_t {
131  Lo = 0, // Integer (63, 32]
132  Hi = 1 // Float (32, 0]
133 };
134 
139  : Mask(Mask), AVL(AVL) {}
140 };
141 
142 class VECustomDAG {
143  SelectionDAG &DAG;
144  SDLoc DL;
145 
146 public:
147  SelectionDAG *getDAG() const { return &DAG; }
148 
149  VECustomDAG(SelectionDAG &DAG, SDLoc DL) : DAG(DAG), DL(DL) {}
150 
151  VECustomDAG(SelectionDAG &DAG, SDValue WhereOp) : DAG(DAG), DL(WhereOp) {}
152 
153  VECustomDAG(SelectionDAG &DAG, const SDNode *WhereN) : DAG(DAG), DL(WhereN) {}
154 
155  /// getNode {
157  Optional<SDNodeFlags> Flags = None) const {
158  auto N = DAG.getNode(OC, DL, VTL, OpV);
159  if (Flags)
160  N->setFlags(*Flags);
161  return N;
162  }
163 
165  Optional<SDNodeFlags> Flags = None) const {
166  auto N = DAG.getNode(OC, DL, ResVT, OpV);
167  if (Flags)
168  N->setFlags(*Flags);
169  return N;
170  }
171 
172  SDValue getNode(unsigned OC, EVT ResVT, ArrayRef<SDValue> OpV,
173  Optional<SDNodeFlags> Flags = None) const {
174  auto N = DAG.getNode(OC, DL, ResVT, OpV);
175  if (Flags)
176  N->setFlags(*Flags);
177  return N;
178  }
179 
180  SDValue getUNDEF(EVT VT) const { return DAG.getUNDEF(VT); }
181  /// } getNode
182 
183  /// Legalizing getNode {
184  SDValue getLegalReductionOpVVP(unsigned VVPOpcode, EVT ResVT, SDValue StartV,
185  SDValue VectorV, SDValue Mask, SDValue AVL,
186  SDNodeFlags Flags) const;
187  /// } Legalizing getNode
188 
189  /// Packing {
190  SDValue getUnpack(EVT DestVT, SDValue Vec, PackElem Part, SDValue AVL) const;
191  SDValue getPack(EVT DestVT, SDValue LoVec, SDValue HiVec, SDValue AVL) const;
192  /// } Packing
193 
195  return DAG.getMergeValues(Values, DL);
196  }
197 
198  SDValue getConstant(uint64_t Val, EVT VT, bool IsTarget = false,
199  bool IsOpaque = false) const;
200 
201  SDValue getConstantMask(Packing Packing, bool AllTrue) const;
202  SDValue getMaskBroadcast(EVT ResultVT, SDValue Scalar, SDValue AVL) const;
203  SDValue getBroadcast(EVT ResultVT, SDValue Scalar, SDValue AVL) const;
204 
205  // Wrap AVL in a LEGALAVL node (unless it is one already).
206  SDValue annotateLegalAVL(SDValue AVL) const;
208  PackElem Part) const;
209 
210  // Splitting support
211  SDValue getSplitPtrOffset(SDValue Ptr, SDValue ByteStride,
212  PackElem Part) const;
213  SDValue getSplitPtrStride(SDValue PackStride) const;
215  SDValue Mask, SDValue AVL) const;
216  EVT getVectorVT(EVT ElemVT, unsigned NumElems) const {
217  return EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems);
218  }
219 };
220 
221 } // namespace llvm
222 
223 #endif // LLVM_LIB_TARGET_VE_VECUSTOMDAG_H
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::Packing::Normal
@ Normal
llvm::getNodeChain
SDValue getNodeChain(SDValue Op)
Node Properties {.
Definition: VECustomDAG.cpp:218
llvm::PackElem
PackElem
Definition: VECustomDAG.h:130
llvm::SDLoc
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Definition: SelectionDAGNodes.h:1090
llvm::getNodeMask
SDValue getNodeMask(SDValue Op)
Definition: VECustomDAG.cpp:390
P
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
Definition: README-SSE.txt:411
llvm::VECustomDAG::getMergeValues
SDValue getMergeValues(ArrayRef< SDValue > Values) const
} Packing
Definition: VECustomDAG.h:194
llvm::isPackedVectorType
bool isPackedVectorType(EVT SomeVT)
Definition: VECustomDAG.cpp:22
llvm::VECustomDAG::getMaskBroadcast
SDValue getMaskBroadcast(EVT ResultVT, SDValue Scalar, SDValue AVL) const
Definition: VECustomDAG.cpp:422
llvm::isMaskArithmetic
bool isMaskArithmetic(SDValue Op)
Definition: VECustomDAG.cpp:50
llvm::SDNode
Represents one node in the SelectionDAG.
Definition: SelectionDAGNodes.h:454
llvm::EVT::getVectorVT
static EVT getVectorVT(LLVMContext &Context, EVT VT, unsigned NumElements, bool IsScalable=false)
Returns the EVT that represents a vector NumElements in length, where each element is of type VT.
Definition: ValueTypes.h:73
llvm::splitVectorType
MVT splitVectorType(MVT VT)
Definition: VECustomDAG.cpp:28
llvm::Optional
Definition: APInt.h:33
llvm::Packing::Dense
@ Dense
llvm::getTypePacking
Packing getTypePacking(EVT VT)
Definition: VECustomDAG.cpp:39
VEISelLowering.h
llvm::VECustomDAG::getPack
SDValue getPack(EVT DestVT, SDValue LoVec, SDValue HiVec, SDValue AVL) const
Definition: VECustomDAG.cpp:490
SelectionDAG.h
llvm::getMaskPos
Optional< int > getMaskPos(unsigned Opc)
Definition: VECustomDAG.cpp:191
llvm::SelectionDAG::getContext
LLVMContext * getContext() const
Definition: SelectionDAG.h:462
llvm::VETargetMasks::Mask
SDValue Mask
Definition: VECustomDAG.h:136
llvm::BitmaskEnumDetail::Mask
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition: BitmaskEnum.h:80
TargetLowering.h
llvm::VECustomDAG::getDAG
SelectionDAG * getDAG() const
Definition: VECustomDAG.h:147
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:220
llvm::getStoredValue
SDValue getStoredValue(SDValue Op)
Definition: VECustomDAG.cpp:332
llvm::SelectionDAG::getUNDEF
SDValue getUNDEF(EVT VT)
Return an UNDEF node. UNDEF does not have a useful SDLoc.
Definition: SelectionDAG.h:971
llvm::EVT
Extended Value Type.
Definition: ValueTypes.h:34
llvm::VECustomDAG::VECustomDAG
VECustomDAG(SelectionDAG &DAG, const SDNode *WhereN)
Definition: VECustomDAG.h:153
llvm::dwarf::Index
Index
Definition: Dwarf.h:472
llvm::VECustomDAG::getGatherScatterAddress
SDValue getGatherScatterAddress(SDValue BasePtr, SDValue Scale, SDValue Index, SDValue Mask, SDValue AVL) const
Definition: VECustomDAG.cpp:536
llvm::VECustomDAG::getBroadcast
SDValue getBroadcast(EVT ResultVT, SDValue Scalar, SDValue AVL) const
Definition: VECustomDAG.cpp:451
llvm::VECustomDAG::getNode
SDValue getNode(unsigned OC, EVT ResVT, ArrayRef< SDValue > OpV, Optional< SDNodeFlags > Flags=None) const
Definition: VECustomDAG.h:172
llvm::getNodeAVL
SDValue getNodeAVL(SDValue Op)
} Node Properties
Definition: VECustomDAG.cpp:385
llvm::VETargetMasks::VETargetMasks
VETargetMasks(SDValue Mask=SDValue(), SDValue AVL=SDValue())
Definition: VECustomDAG.h:138
llvm::PackElem::Hi
@ Hi
llvm::VECustomDAG::VECustomDAG
VECustomDAG(SelectionDAG &DAG, SDValue WhereOp)
Definition: VECustomDAG.h:151
llvm::None
const NoneType None
Definition: None.h:24
llvm::getAnnotatedNodeAVL
std::pair< SDValue, bool > getAnnotatedNodeAVL(SDValue Op)
Definition: VECustomDAG.cpp:395
llvm::isPackingSupportOpcode
bool isPackingSupportOpcode(unsigned Opc)
Definition: VECustomDAG.cpp:116
llvm::VECustomDAG::getNode
SDValue getNode(unsigned OC, ArrayRef< EVT > ResVT, ArrayRef< SDValue > OpV, Optional< SDNodeFlags > Flags=None) const
Definition: VECustomDAG.h:164
llvm::VECustomDAG::getConstantMask
SDValue getConstantMask(Packing Packing, bool AllTrue) const
Definition: VECustomDAG.cpp:409
uint64_t
llvm::supportsPackedMode
bool supportsPackedMode(unsigned Opcode, EVT IdiomVT)
Definition: VECustomDAG.cpp:101
llvm::SelectionDAG::getNode
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
Definition: SelectionDAG.cpp:8851
llvm::PackElem::Lo
@ Lo
llvm::VECustomDAG::getUNDEF
SDValue getUNDEF(EVT VT) const
Definition: VECustomDAG.h:180
llvm::VECustomDAG::annotateLegalAVL
SDValue annotateLegalAVL(SDValue AVL) const
Definition: VECustomDAG.cpp:474
llvm::VECustomDAG::getUnpack
SDValue getUnpack(EVT DestVT, SDValue Vec, PackElem Part, SDValue AVL) const
} Legalizing getNode
Definition: VECustomDAG.cpp:480
llvm::VECustomDAG::getLegalReductionOpVVP
SDValue getLegalReductionOpVVP(unsigned VVPOpcode, EVT ResVT, SDValue StartV, SDValue VectorV, SDValue Mask, SDValue AVL, SDNodeFlags Flags) const
} getNode
Definition: VECustomDAG.cpp:562
llvm::SystemZISD::OC
@ OC
Definition: SystemZISelLowering.h:122
llvm::VECustomDAG::getSplitPtrOffset
SDValue getSplitPtrOffset(SDValue Ptr, SDValue ByteStride, PackElem Part) const
Definition: VECustomDAG.cpp:521
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::getIdiomaticVectorType
Optional< EVT > getIdiomaticVectorType(SDNode *Op)
} AVL Functions
Definition: VECustomDAG.cpp:243
llvm::VECustomDAG
Definition: VECustomDAG.h:142
llvm::isLegalAVL
bool isLegalAVL(SDValue AVL)
Definition: VECustomDAG.cpp:214
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::isVVPOrVEC
bool isVVPOrVEC(unsigned Opcode)
Definition: VECustomDAG.cpp:126
llvm::maySafelyIgnoreMask
bool maySafelyIgnoreMask(SDValue Op)
Definition: VECustomDAG.cpp:85
llvm::getGatherScatterIndex
SDValue getGatherScatterIndex(SDValue Op)
Definition: VECustomDAG.cpp:316
llvm::VECustomDAG::getVectorVT
EVT getVectorVT(EVT ElemVT, unsigned NumElems) const
Definition: VECustomDAG.h:216
llvm::SDVTList
This represents a list of ValueType's that has been intern'd by a SelectionDAG.
Definition: SelectionDAGNodes.h:78
llvm::isVVPBinaryOp
bool isVVPBinaryOp(unsigned VVPOpcode)
Definition: VECustomDAG.cpp:146
llvm::getScalarReductionOpcode
unsigned getScalarReductionOpcode(unsigned VVPOC, bool IsMask)
Definition: VECustomDAG.cpp:369
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:348
llvm::isVVPUnaryOp
bool isVVPUnaryOp(unsigned VVPOpcode)
Definition: VECustomDAG.cpp:136
llvm::getNodePassthru
SDValue getNodePassthru(SDValue Op)
Definition: VECustomDAG.cpp:353
llvm::VECustomDAG::getConstant
SDValue getConstant(uint64_t Val, EVT VT, bool IsTarget=false, bool IsOpaque=false) const
Definition: VECustomDAG.cpp:404
llvm::Packing
Packing
} Node Properties
Definition: VECustomDAG.h:119
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition: SelectionDAGNodes.h:137
llvm::getVVPOpcode
Optional< unsigned > getVVPOpcode(unsigned Opcode)
Definition: VECustomDAG.cpp:62
llvm::SDNodeFlags
These are IR-level optimization flags that may be propagated to SDNodes.
Definition: SelectionDAGNodes.h:370
llvm::VETargetMasks
Definition: VECustomDAG.h:135
llvm::isVVPReductionOp
bool isVVPReductionOp(unsigned Opcode)
Definition: VECustomDAG.cpp:156
VE.h
llvm::VECustomDAG::getSplitPtrStride
SDValue getSplitPtrStride(SDValue PackStride) const
Definition: VECustomDAG.cpp:530
llvm::VECustomDAG::getNode
SDValue getNode(unsigned OC, SDVTList VTL, ArrayRef< SDValue > OpV, Optional< SDNodeFlags > Flags=None) const
getNode {
Definition: VECustomDAG.h:156
llvm::getGatherScatterScale
SDValue getGatherScatterScale(SDValue Op)
Definition: VECustomDAG.cpp:324
llvm::VETargetMasks::AVL
SDValue AVL
Definition: VECustomDAG.h:137
N
#define N
llvm::getAVLPos
Optional< int > getAVLPos(unsigned Opc)
The VE backend uses a two-staged process to lower and legalize vector instructions:
Definition: VECustomDAG.cpp:166
llvm::getLegalVectorType
MVT getLegalVectorType(Packing P, MVT ElemVT)
Definition: VECustomDAG.cpp:34
llvm::getLoadStoreStride
SDValue getLoadStoreStride(SDValue Op, VECustomDAG &CDAG)
Definition: VECustomDAG.cpp:292
llvm::isMaskType
bool isMaskType(EVT SomeVT)
Definition: VECustomDAG.cpp:44
llvm::VECustomDAG::VECustomDAG
VECustomDAG(SelectionDAG &DAG, SDLoc DL)
Definition: VECustomDAG.h:149
llvm::hasReductionStartParam
bool hasReductionStartParam(unsigned OPC)
Definition: VECustomDAG.cpp:362
llvm::getMemoryPtr
SDValue getMemoryPtr(SDValue Op)
Definition: VECustomDAG.cpp:230
llvm::SelectionDAG::getMergeValues
SDValue getMergeValues(ArrayRef< SDValue > Ops, const SDLoc &dl)
Create a MERGE_VALUES node from the given operands.
Definition: SelectionDAG.cpp:7531
llvm::VECustomDAG::getTargetSplitMask
VETargetMasks getTargetSplitMask(SDValue RawMask, SDValue RawAVL, PackElem Part) const
Definition: VECustomDAG.cpp:498