LLVM 17.0.0git
DWARFExpression.cpp
Go to the documentation of this file.
1//===-- DWARFExpression.cpp -----------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
11#include "llvm/Support/Format.h"
12#include <cassert>
13#include <cstdint>
14#include <vector>
15
16using namespace llvm;
17using namespace dwarf;
18
19namespace llvm {
20
21typedef std::vector<DWARFExpression::Operation::Description> DescVector;
22
24 DescVector Descriptions;
26 typedef Op::Description Desc;
27
28 Descriptions.resize(0xff);
29 Descriptions[DW_OP_addr] = Desc(Op::Dwarf2, Op::SizeAddr);
30 Descriptions[DW_OP_deref] = Desc(Op::Dwarf2);
31 Descriptions[DW_OP_const1u] = Desc(Op::Dwarf2, Op::Size1);
32 Descriptions[DW_OP_const1s] = Desc(Op::Dwarf2, Op::SignedSize1);
33 Descriptions[DW_OP_const2u] = Desc(Op::Dwarf2, Op::Size2);
34 Descriptions[DW_OP_const2s] = Desc(Op::Dwarf2, Op::SignedSize2);
35 Descriptions[DW_OP_const4u] = Desc(Op::Dwarf2, Op::Size4);
36 Descriptions[DW_OP_const4s] = Desc(Op::Dwarf2, Op::SignedSize4);
37 Descriptions[DW_OP_const8u] = Desc(Op::Dwarf2, Op::Size8);
38 Descriptions[DW_OP_const8s] = Desc(Op::Dwarf2, Op::SignedSize8);
39 Descriptions[DW_OP_constu] = Desc(Op::Dwarf2, Op::SizeLEB);
40 Descriptions[DW_OP_consts] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
41 Descriptions[DW_OP_dup] = Desc(Op::Dwarf2);
42 Descriptions[DW_OP_drop] = Desc(Op::Dwarf2);
43 Descriptions[DW_OP_over] = Desc(Op::Dwarf2);
44 Descriptions[DW_OP_pick] = Desc(Op::Dwarf2, Op::Size1);
45 Descriptions[DW_OP_swap] = Desc(Op::Dwarf2);
46 Descriptions[DW_OP_rot] = Desc(Op::Dwarf2);
47 Descriptions[DW_OP_xderef] = Desc(Op::Dwarf2);
48 Descriptions[DW_OP_abs] = Desc(Op::Dwarf2);
49 Descriptions[DW_OP_and] = Desc(Op::Dwarf2);
50 Descriptions[DW_OP_div] = Desc(Op::Dwarf2);
51 Descriptions[DW_OP_minus] = Desc(Op::Dwarf2);
52 Descriptions[DW_OP_mod] = Desc(Op::Dwarf2);
53 Descriptions[DW_OP_mul] = Desc(Op::Dwarf2);
54 Descriptions[DW_OP_neg] = Desc(Op::Dwarf2);
55 Descriptions[DW_OP_not] = Desc(Op::Dwarf2);
56 Descriptions[DW_OP_or] = Desc(Op::Dwarf2);
57 Descriptions[DW_OP_plus] = Desc(Op::Dwarf2);
58 Descriptions[DW_OP_plus_uconst] = Desc(Op::Dwarf2, Op::SizeLEB);
59 Descriptions[DW_OP_shl] = Desc(Op::Dwarf2);
60 Descriptions[DW_OP_shr] = Desc(Op::Dwarf2);
61 Descriptions[DW_OP_shra] = Desc(Op::Dwarf2);
62 Descriptions[DW_OP_xor] = Desc(Op::Dwarf2);
63 Descriptions[DW_OP_skip] = Desc(Op::Dwarf2, Op::SignedSize2);
64 Descriptions[DW_OP_bra] = Desc(Op::Dwarf2, Op::SignedSize2);
65 Descriptions[DW_OP_eq] = Desc(Op::Dwarf2);
66 Descriptions[DW_OP_ge] = Desc(Op::Dwarf2);
67 Descriptions[DW_OP_gt] = Desc(Op::Dwarf2);
68 Descriptions[DW_OP_le] = Desc(Op::Dwarf2);
69 Descriptions[DW_OP_lt] = Desc(Op::Dwarf2);
70 Descriptions[DW_OP_ne] = Desc(Op::Dwarf2);
71 for (uint16_t LA = DW_OP_lit0; LA <= DW_OP_lit31; ++LA)
72 Descriptions[LA] = Desc(Op::Dwarf2);
73 for (uint16_t LA = DW_OP_reg0; LA <= DW_OP_reg31; ++LA)
74 Descriptions[LA] = Desc(Op::Dwarf2);
75 for (uint16_t LA = DW_OP_breg0; LA <= DW_OP_breg31; ++LA)
76 Descriptions[LA] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
77 Descriptions[DW_OP_regx] = Desc(Op::Dwarf2, Op::SizeLEB);
78 Descriptions[DW_OP_fbreg] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
79 Descriptions[DW_OP_bregx] = Desc(Op::Dwarf2, Op::SizeLEB, Op::SignedSizeLEB);
80 Descriptions[DW_OP_piece] = Desc(Op::Dwarf2, Op::SizeLEB);
81 Descriptions[DW_OP_deref_size] = Desc(Op::Dwarf2, Op::Size1);
82 Descriptions[DW_OP_xderef_size] = Desc(Op::Dwarf2, Op::Size1);
83 Descriptions[DW_OP_nop] = Desc(Op::Dwarf2);
84 Descriptions[DW_OP_push_object_address] = Desc(Op::Dwarf3);
85 Descriptions[DW_OP_call2] = Desc(Op::Dwarf3, Op::Size2);
86 Descriptions[DW_OP_call4] = Desc(Op::Dwarf3, Op::Size4);
87 Descriptions[DW_OP_call_ref] = Desc(Op::Dwarf3, Op::SizeRefAddr);
88 Descriptions[DW_OP_form_tls_address] = Desc(Op::Dwarf3);
89 Descriptions[DW_OP_call_frame_cfa] = Desc(Op::Dwarf3);
90 Descriptions[DW_OP_bit_piece] = Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeLEB);
91 Descriptions[DW_OP_implicit_value] =
92 Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeBlock);
93 Descriptions[DW_OP_stack_value] = Desc(Op::Dwarf3);
94 Descriptions[DW_OP_WASM_location] =
95 Desc(Op::Dwarf4, Op::SizeLEB, Op::WasmLocationArg);
96 Descriptions[DW_OP_GNU_push_tls_address] = Desc(Op::Dwarf3);
97 Descriptions[DW_OP_addrx] = Desc(Op::Dwarf4, Op::SizeLEB);
98 Descriptions[DW_OP_GNU_addr_index] = Desc(Op::Dwarf4, Op::SizeLEB);
99 Descriptions[DW_OP_GNU_const_index] = Desc(Op::Dwarf4, Op::SizeLEB);
100 Descriptions[DW_OP_GNU_entry_value] = Desc(Op::Dwarf4, Op::SizeLEB);
101
102 Descriptions[DW_OP_convert] = Desc(Op::Dwarf5, Op::BaseTypeRef);
103 Descriptions[DW_OP_entry_value] = Desc(Op::Dwarf5, Op::SizeLEB);
104 Descriptions[DW_OP_regval_type] =
105 Desc(Op::Dwarf5, Op::SizeLEB, Op::BaseTypeRef);
106
107 return Descriptions;
108}
109
111 // FIXME: Make this constexpr once all compilers are smart enough to do it.
112 static DescVector Descriptions = getDescriptions();
113 // Handle possible corrupted or unsupported operation.
114 if (OpCode >= Descriptions.size())
115 return {};
116 return Descriptions[OpCode];
117}
118
119bool DWARFExpression::Operation::extract(DataExtractor Data,
120 uint8_t AddressSize, uint64_t Offset,
121 std::optional<DwarfFormat> Format) {
122 EndOffset = Offset;
123 Opcode = Data.getU8(&Offset);
124
125 Desc = getOpDesc(Opcode);
126 if (Desc.Version == Operation::DwarfNA)
127 return false;
128
129 for (unsigned Operand = 0; Operand < 2; ++Operand) {
130 unsigned Size = Desc.Op[Operand];
131 unsigned Signed = Size & Operation::SignBit;
132
133 if (Size == Operation::SizeNA)
134 break;
135
136 switch (Size & ~Operation::SignBit) {
137 case Operation::Size1:
138 Operands[Operand] = Data.getU8(&Offset);
139 if (Signed)
140 Operands[Operand] = (int8_t)Operands[Operand];
141 break;
142 case Operation::Size2:
143 Operands[Operand] = Data.getU16(&Offset);
144 if (Signed)
145 Operands[Operand] = (int16_t)Operands[Operand];
146 break;
147 case Operation::Size4:
148 Operands[Operand] = Data.getU32(&Offset);
149 if (Signed)
150 Operands[Operand] = (int32_t)Operands[Operand];
151 break;
152 case Operation::Size8:
153 Operands[Operand] = Data.getU64(&Offset);
154 break;
156 Operands[Operand] = Data.getUnsigned(&Offset, AddressSize);
157 break;
159 if (!Format)
160 return false;
161 Operands[Operand] =
162 Data.getUnsigned(&Offset, dwarf::getDwarfOffsetByteSize(*Format));
163 break;
165 if (Signed)
166 Operands[Operand] = Data.getSLEB128(&Offset);
167 else
168 Operands[Operand] = Data.getULEB128(&Offset);
169 break;
171 Operands[Operand] = Data.getULEB128(&Offset);
172 break;
174 assert(Operand == 1);
175 switch (Operands[0]) {
176 case 0:
177 case 1:
178 case 2:
179 case 4:
180 Operands[Operand] = Data.getULEB128(&Offset);
181 break;
182 case 3: // global as uint32
183 Operands[Operand] = Data.getU32(&Offset);
184 break;
185 default:
186 return false; // Unknown Wasm location
187 }
188 break;
190 // We need a size, so this cannot be the first operand
191 if (Operand == 0)
192 return false;
193 // Store the offset of the block as the value.
194 Operands[Operand] = Offset;
195 Offset += Operands[Operand - 1];
196 break;
197 default:
198 llvm_unreachable("Unknown DWARFExpression Op size");
199 }
200
201 OperandEndOffsets[Operand] = Offset;
202 }
203
204 EndOffset = Offset;
205 return true;
206}
207
209 DIDumpOptions DumpOpts,
210 const uint64_t Operands[2],
211 unsigned Operand) {
212 assert(Operand < 2 && "operand out of bounds");
213 auto Die = U->getDIEForOffset(U->getOffset() + Operands[Operand]);
214 if (Die && Die.getTag() == dwarf::DW_TAG_base_type) {
215 OS << " (";
216 if (DumpOpts.Verbose)
217 OS << format("0x%08" PRIx64 " -> ", Operands[Operand]);
218 OS << format("0x%08" PRIx64 ")", U->getOffset() + Operands[Operand]);
219 if (auto Name = dwarf::toString(Die.find(dwarf::DW_AT_name)))
220 OS << " \"" << *Name << "\"";
221 } else {
222 OS << format(" <invalid base_type ref: 0x%" PRIx64 ">",
223 Operands[Operand]);
224 }
225}
226
228 DIDumpOptions DumpOpts,
229 uint8_t Opcode,
230 const uint64_t Operands[2]) {
231 if (!DumpOpts.GetNameForDWARFReg)
232 return false;
233
234 uint64_t DwarfRegNum;
235 unsigned OpNum = 0;
236
237 if (Opcode == DW_OP_bregx || Opcode == DW_OP_regx ||
238 Opcode == DW_OP_regval_type)
239 DwarfRegNum = Operands[OpNum++];
240 else if (Opcode >= DW_OP_breg0 && Opcode < DW_OP_bregx)
241 DwarfRegNum = Opcode - DW_OP_breg0;
242 else
243 DwarfRegNum = Opcode - DW_OP_reg0;
244
245 auto RegName = DumpOpts.GetNameForDWARFReg(DwarfRegNum, DumpOpts.IsEH);
246 if (!RegName.empty()) {
247 if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
248 Opcode == DW_OP_bregx)
249 OS << ' ' << RegName << format("%+" PRId64, Operands[OpNum]);
250 else
251 OS << ' ' << RegName.data();
252
253 if (Opcode == DW_OP_regval_type)
254 prettyPrintBaseTypeRef(U, OS, DumpOpts, Operands, 1);
255 return true;
256 }
257
258 return false;
259}
260
262 const DWARFExpression *Expr,
263 DWARFUnit *U) const {
264 if (Error) {
265 OS << "<decoding error>";
266 return false;
267 }
268
270 assert(!Name.empty() && "DW_OP has no name!");
271 OS << Name;
272
273 if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
274 (Opcode >= DW_OP_reg0 && Opcode <= DW_OP_reg31) ||
275 Opcode == DW_OP_bregx || Opcode == DW_OP_regx ||
276 Opcode == DW_OP_regval_type)
277 if (prettyPrintRegisterOp(U, OS, DumpOpts, Opcode, Operands))
278 return true;
279
280 for (unsigned Operand = 0; Operand < 2; ++Operand) {
281 unsigned Size = Desc.Op[Operand];
282 unsigned Signed = Size & Operation::SignBit;
283
284 if (Size == Operation::SizeNA)
285 break;
286
287 if (Size == Operation::BaseTypeRef && U) {
288 // For DW_OP_convert the operand may be 0 to indicate that conversion to
289 // the generic type should be done. The same holds for DW_OP_reinterpret,
290 // which is currently not supported.
291 if (Opcode == DW_OP_convert && Operands[Operand] == 0)
292 OS << " 0x0";
293 else
294 prettyPrintBaseTypeRef(U, OS, DumpOpts, Operands, Operand);
295 } else if (Size == Operation::WasmLocationArg) {
296 assert(Operand == 1);
297 switch (Operands[0]) {
298 case 0:
299 case 1:
300 case 2:
301 case 3: // global as uint32
302 case 4:
303 OS << format(" 0x%" PRIx64, Operands[Operand]);
304 break;
305 default: assert(false);
306 }
307 } else if (Size == Operation::SizeBlock) {
308 uint64_t Offset = Operands[Operand];
309 for (unsigned i = 0; i < Operands[Operand - 1]; ++i)
310 OS << format(" 0x%02x", Expr->Data.getU8(&Offset));
311 } else {
312 if (Signed)
313 OS << format(" %+" PRId64, (int64_t)Operands[Operand]);
314 else if (Opcode != DW_OP_entry_value &&
315 Opcode != DW_OP_GNU_entry_value)
316 OS << format(" 0x%" PRIx64, Operands[Operand]);
317 }
318 }
319 return true;
320}
321
323 DWARFUnit *U, bool IsEH) const {
324 uint32_t EntryValExprSize = 0;
325 uint64_t EntryValStartOffset = 0;
326 if (Data.getData().empty())
327 OS << "<empty>";
328
329 for (auto &Op : *this) {
330 DumpOpts.IsEH = IsEH;
331 if (!Op.print(OS, DumpOpts, this, U)) {
332 uint64_t FailOffset = Op.getEndOffset();
333 while (FailOffset < Data.getData().size())
334 OS << format(" %02x", Data.getU8(&FailOffset));
335 return;
336 }
337
338 if (Op.getCode() == DW_OP_entry_value ||
339 Op.getCode() == DW_OP_GNU_entry_value) {
340 OS << "(";
341 EntryValExprSize = Op.getRawOperand(0);
342 EntryValStartOffset = Op.getEndOffset();
343 continue;
344 }
345
346 if (EntryValExprSize) {
347 EntryValExprSize -= Op.getEndOffset() - EntryValStartOffset;
348 if (EntryValExprSize == 0)
349 OS << ")";
350 }
351
352 if (Op.getEndOffset() < Data.getData().size())
353 OS << ", ";
354 }
355}
356
358 for (unsigned Operand = 0; Operand < 2; ++Operand) {
359 unsigned Size = Op.Desc.Op[Operand];
360
361 if (Size == Operation::SizeNA)
362 break;
363
365 // For DW_OP_convert the operand may be 0 to indicate that conversion to
366 // the generic type should be done, so don't look up a base type in that
367 // case. The same holds for DW_OP_reinterpret, which is currently not
368 // supported.
369 if (Op.Opcode == DW_OP_convert && Op.Operands[Operand] == 0)
370 continue;
371 auto Die = U->getDIEForOffset(U->getOffset() + Op.Operands[Operand]);
372 if (!Die || Die.getTag() != dwarf::DW_TAG_base_type)
373 return false;
374 }
375 }
376
377 return true;
378}
379
381 for (auto &Op : *this)
382 if (!Operation::verify(Op, U))
383 return false;
384
385 return true;
386}
387
388/// A user-facing string representation of a DWARF expression. This might be an
389/// Address expression, in which case it will be implicitly dereferenced, or a
390/// Value expression.
392 enum ExprKind {
395 };
398
399 PrintedExpr(ExprKind K = Address) : Kind(K) {}
400};
401
405 std::function<StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg =
406 nullptr) {
408
409 while (I != E) {
410 const DWARFExpression::Operation &Op = *I;
411 uint8_t Opcode = Op.getCode();
412 switch (Opcode) {
413 case dwarf::DW_OP_regx: {
414 // DW_OP_regx: A register, with the register num given as an operand.
415 // Printed as the plain register name.
416 uint64_t DwarfRegNum = Op.getRawOperand(0);
417 auto RegName = GetNameForDWARFReg(DwarfRegNum, false);
418 if (RegName.empty())
419 return false;
420 raw_svector_ostream S(Stack.emplace_back(PrintedExpr::Value).String);
421 S << RegName;
422 break;
423 }
424 case dwarf::DW_OP_bregx: {
425 int DwarfRegNum = Op.getRawOperand(0);
426 int64_t Offset = Op.getRawOperand(1);
427 auto RegName = GetNameForDWARFReg(DwarfRegNum, false);
428 if (RegName.empty())
429 return false;
430 raw_svector_ostream S(Stack.emplace_back().String);
431 S << RegName;
432 if (Offset)
433 S << format("%+" PRId64, Offset);
434 break;
435 }
436 case dwarf::DW_OP_entry_value:
437 case dwarf::DW_OP_GNU_entry_value: {
438 // DW_OP_entry_value contains a sub-expression which must be rendered
439 // separately.
440 uint64_t SubExprLength = Op.getRawOperand(0);
441 DWARFExpression::iterator SubExprEnd = I.skipBytes(SubExprLength);
442 ++I;
443 raw_svector_ostream S(Stack.emplace_back().String);
444 S << "entry(";
445 printCompactDWARFExpr(S, I, SubExprEnd, GetNameForDWARFReg);
446 S << ")";
447 I = SubExprEnd;
448 continue;
449 }
450 case dwarf::DW_OP_stack_value: {
451 // The top stack entry should be treated as the actual value of tne
452 // variable, rather than the address of the variable in memory.
453 assert(!Stack.empty());
454 Stack.back().Kind = PrintedExpr::Value;
455 break;
456 }
457 default:
458 if (Opcode >= dwarf::DW_OP_reg0 && Opcode <= dwarf::DW_OP_reg31) {
459 // DW_OP_reg<N>: A register, with the register num implied by the
460 // opcode. Printed as the plain register name.
461 uint64_t DwarfRegNum = Opcode - dwarf::DW_OP_reg0;
462 auto RegName = GetNameForDWARFReg(DwarfRegNum, false);
463 if (RegName.empty())
464 return false;
465 raw_svector_ostream S(Stack.emplace_back(PrintedExpr::Value).String);
466 S << RegName;
467 } else if (Opcode >= dwarf::DW_OP_breg0 &&
468 Opcode <= dwarf::DW_OP_breg31) {
469 int DwarfRegNum = Opcode - dwarf::DW_OP_breg0;
470 int64_t Offset = Op.getRawOperand(0);
471 auto RegName = GetNameForDWARFReg(DwarfRegNum, false);
472 if (RegName.empty())
473 return false;
474 raw_svector_ostream S(Stack.emplace_back().String);
475 S << RegName;
476 if (Offset)
477 S << format("%+" PRId64, Offset);
478 } else {
479 // If we hit an unknown operand, we don't know its effect on the stack,
480 // so bail out on the whole expression.
481 OS << "<unknown op " << dwarf::OperationEncodingString(Opcode) << " ("
482 << (int)Opcode << ")>";
483 return false;
484 }
485 break;
486 }
487 ++I;
488 }
489
490 assert(Stack.size() == 1 && "expected one value on stack");
491
492 if (Stack.front().Kind == PrintedExpr::Address)
493 OS << "[" << Stack.front().String << "]";
494 else
495 OS << Stack.front().String;
496
497 return true;
498}
499
502 std::function<StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg) {
503 return printCompactDWARFExpr(OS, begin(), end(), GetNameForDWARFReg);
504}
505
507 if (AddressSize != RHS.AddressSize || Format != RHS.Format)
508 return false;
509 return Data.getData() == RHS.Data.getData();
510}
511
512} // namespace llvm
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
std::string Name
uint64_t Size
#define RegName(no)
#define I(x, y, z)
Definition: MD5.cpp:58
mir Rename Register Operands
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
raw_pwrite_stream & OS
Value * RHS
This class represents an Operation in the Expression.
@ DwarfNA
Serves as a marker for unused entries.
static bool verify(const Operation &Op, DWARFUnit *U)
Verify Op. Does not affect the return of isError().
bool print(raw_ostream &OS, DIDumpOptions DumpOpts, const DWARFExpression *Expr, DWARFUnit *U) const
@ SizeBlock
Preceding operand contains block size.
@ SizeNA
Unused operands get this encoding.
An iterator to go through the expression operations.
bool verify(DWARFUnit *U)
iterator end() const
static bool prettyPrintRegisterOp(DWARFUnit *U, raw_ostream &OS, DIDumpOptions DumpOpts, uint8_t Opcode, const uint64_t Operands[2])
iterator begin() const
bool printCompact(raw_ostream &OS, std::function< StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg=nullptr)
Print the expression in a format intended to be compact and useful to a user, but not perfectly unamb...
bool operator==(const DWARFExpression &RHS) const
void print(raw_ostream &OS, DIDumpOptions DumpOpts, DWARFUnit *U, bool IsEH=false) const
uint8_t getU8(uint64_t *offset_ptr, Error *Err=nullptr) const
Extract a uint8_t value from *offset_ptr.
Lightweight error class with error context and mandatory checking.
Definition: Error.h:156
SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...
Definition: SmallString.h:26
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1200
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
A raw_ostream that writes to an SmallVector or SmallString.
Definition: raw_ostream.h:672
StringRef OperationEncodingString(unsigned Encoding)
Definition: Dwarf.cpp:138
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
std::optional< const char * > toString(const std::optional< DWARFFormValue > &V)
Take an optional DWARFFormValue and try to extract a string value from it.
uint8_t getDwarfOffsetByteSize(DwarfFormat Format)
The size of a reference determined by the DWARF 32/64-bit format.
Definition: Dwarf.h:718
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:406
static DWARFExpression::Operation::Description getOpDesc(unsigned OpCode)
static bool printCompactDWARFExpr(raw_ostream &OS, DWARFExpression::iterator I, const DWARFExpression::iterator E, std::function< StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg=nullptr)
static void prettyPrintBaseTypeRef(DWARFUnit *U, raw_ostream &OS, DIDumpOptions DumpOpts, const uint64_t Operands[2], unsigned Operand)
std::vector< DWARFExpression::Operation::Description > DescVector
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:124
static DescVector getDescriptions()
Container for dump options that control which debug information will be dumped.
Definition: DIContext.h:189
std::function< llvm::StringRef(uint64_t DwarfRegNum, bool IsEH)> GetNameForDWARFReg
Definition: DIContext.h:204
Description of the encoding of one expression Op.
DwarfVersion Version
Dwarf version where the Op was introduced.
Encoding Op[2]
Encoding for Op operands, or SizeNA.
A user-facing string representation of a DWARF expression.
PrintedExpr(ExprKind K=Address)
SmallString< 16 > String