LLVM  16.0.0git
DWARFExpression.cpp
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1 //===-- DWARFExpression.cpp -----------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
11 #include "llvm/MC/MCRegisterInfo.h"
12 #include "llvm/Support/Format.h"
13 #include <cassert>
14 #include <cstdint>
15 #include <vector>
16 
17 using namespace llvm;
18 using namespace dwarf;
19 
20 namespace llvm {
21 
22 typedef std::vector<DWARFExpression::Operation::Description> DescVector;
23 
25  DescVector Descriptions;
27  typedef Op::Description Desc;
28 
29  Descriptions.resize(0xff);
30  Descriptions[DW_OP_addr] = Desc(Op::Dwarf2, Op::SizeAddr);
31  Descriptions[DW_OP_deref] = Desc(Op::Dwarf2);
32  Descriptions[DW_OP_const1u] = Desc(Op::Dwarf2, Op::Size1);
33  Descriptions[DW_OP_const1s] = Desc(Op::Dwarf2, Op::SignedSize1);
34  Descriptions[DW_OP_const2u] = Desc(Op::Dwarf2, Op::Size2);
35  Descriptions[DW_OP_const2s] = Desc(Op::Dwarf2, Op::SignedSize2);
36  Descriptions[DW_OP_const4u] = Desc(Op::Dwarf2, Op::Size4);
37  Descriptions[DW_OP_const4s] = Desc(Op::Dwarf2, Op::SignedSize4);
38  Descriptions[DW_OP_const8u] = Desc(Op::Dwarf2, Op::Size8);
39  Descriptions[DW_OP_const8s] = Desc(Op::Dwarf2, Op::SignedSize8);
40  Descriptions[DW_OP_constu] = Desc(Op::Dwarf2, Op::SizeLEB);
41  Descriptions[DW_OP_consts] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
42  Descriptions[DW_OP_dup] = Desc(Op::Dwarf2);
43  Descriptions[DW_OP_drop] = Desc(Op::Dwarf2);
44  Descriptions[DW_OP_over] = Desc(Op::Dwarf2);
45  Descriptions[DW_OP_pick] = Desc(Op::Dwarf2, Op::Size1);
46  Descriptions[DW_OP_swap] = Desc(Op::Dwarf2);
47  Descriptions[DW_OP_rot] = Desc(Op::Dwarf2);
48  Descriptions[DW_OP_xderef] = Desc(Op::Dwarf2);
49  Descriptions[DW_OP_abs] = Desc(Op::Dwarf2);
50  Descriptions[DW_OP_and] = Desc(Op::Dwarf2);
51  Descriptions[DW_OP_div] = Desc(Op::Dwarf2);
52  Descriptions[DW_OP_minus] = Desc(Op::Dwarf2);
53  Descriptions[DW_OP_mod] = Desc(Op::Dwarf2);
54  Descriptions[DW_OP_mul] = Desc(Op::Dwarf2);
55  Descriptions[DW_OP_neg] = Desc(Op::Dwarf2);
56  Descriptions[DW_OP_not] = Desc(Op::Dwarf2);
57  Descriptions[DW_OP_or] = Desc(Op::Dwarf2);
58  Descriptions[DW_OP_plus] = Desc(Op::Dwarf2);
59  Descriptions[DW_OP_plus_uconst] = Desc(Op::Dwarf2, Op::SizeLEB);
60  Descriptions[DW_OP_shl] = Desc(Op::Dwarf2);
61  Descriptions[DW_OP_shr] = Desc(Op::Dwarf2);
62  Descriptions[DW_OP_shra] = Desc(Op::Dwarf2);
63  Descriptions[DW_OP_xor] = Desc(Op::Dwarf2);
64  Descriptions[DW_OP_skip] = Desc(Op::Dwarf2, Op::SignedSize2);
65  Descriptions[DW_OP_bra] = Desc(Op::Dwarf2, Op::SignedSize2);
66  Descriptions[DW_OP_eq] = Desc(Op::Dwarf2);
67  Descriptions[DW_OP_ge] = Desc(Op::Dwarf2);
68  Descriptions[DW_OP_gt] = Desc(Op::Dwarf2);
69  Descriptions[DW_OP_le] = Desc(Op::Dwarf2);
70  Descriptions[DW_OP_lt] = Desc(Op::Dwarf2);
71  Descriptions[DW_OP_ne] = Desc(Op::Dwarf2);
72  for (uint16_t LA = DW_OP_lit0; LA <= DW_OP_lit31; ++LA)
73  Descriptions[LA] = Desc(Op::Dwarf2);
74  for (uint16_t LA = DW_OP_reg0; LA <= DW_OP_reg31; ++LA)
75  Descriptions[LA] = Desc(Op::Dwarf2);
76  for (uint16_t LA = DW_OP_breg0; LA <= DW_OP_breg31; ++LA)
77  Descriptions[LA] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
78  Descriptions[DW_OP_regx] = Desc(Op::Dwarf2, Op::SizeLEB);
79  Descriptions[DW_OP_fbreg] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
80  Descriptions[DW_OP_bregx] = Desc(Op::Dwarf2, Op::SizeLEB, Op::SignedSizeLEB);
81  Descriptions[DW_OP_piece] = Desc(Op::Dwarf2, Op::SizeLEB);
82  Descriptions[DW_OP_deref_size] = Desc(Op::Dwarf2, Op::Size1);
83  Descriptions[DW_OP_xderef_size] = Desc(Op::Dwarf2, Op::Size1);
84  Descriptions[DW_OP_nop] = Desc(Op::Dwarf2);
85  Descriptions[DW_OP_push_object_address] = Desc(Op::Dwarf3);
86  Descriptions[DW_OP_call2] = Desc(Op::Dwarf3, Op::Size2);
87  Descriptions[DW_OP_call4] = Desc(Op::Dwarf3, Op::Size4);
88  Descriptions[DW_OP_call_ref] = Desc(Op::Dwarf3, Op::SizeRefAddr);
89  Descriptions[DW_OP_form_tls_address] = Desc(Op::Dwarf3);
90  Descriptions[DW_OP_call_frame_cfa] = Desc(Op::Dwarf3);
91  Descriptions[DW_OP_bit_piece] = Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeLEB);
92  Descriptions[DW_OP_implicit_value] =
93  Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeBlock);
94  Descriptions[DW_OP_stack_value] = Desc(Op::Dwarf3);
95  Descriptions[DW_OP_WASM_location] =
96  Desc(Op::Dwarf4, Op::SizeLEB, Op::WasmLocationArg);
97  Descriptions[DW_OP_GNU_push_tls_address] = Desc(Op::Dwarf3);
98  Descriptions[DW_OP_addrx] = Desc(Op::Dwarf4, Op::SizeLEB);
99  Descriptions[DW_OP_GNU_addr_index] = Desc(Op::Dwarf4, Op::SizeLEB);
100  Descriptions[DW_OP_GNU_const_index] = Desc(Op::Dwarf4, Op::SizeLEB);
101  Descriptions[DW_OP_GNU_entry_value] = Desc(Op::Dwarf4, Op::SizeLEB);
102 
103  Descriptions[DW_OP_convert] = Desc(Op::Dwarf5, Op::BaseTypeRef);
104  Descriptions[DW_OP_entry_value] = Desc(Op::Dwarf5, Op::SizeLEB);
105  Descriptions[DW_OP_regval_type] =
106  Desc(Op::Dwarf5, Op::SizeLEB, Op::BaseTypeRef);
107 
108  return Descriptions;
109 }
110 
112  // FIXME: Make this constexpr once all compilers are smart enough to do it.
113  static DescVector Descriptions = getDescriptions();
114  // Handle possible corrupted or unsupported operation.
115  if (OpCode >= Descriptions.size())
116  return {};
117  return Descriptions[OpCode];
118 }
119 
120 bool DWARFExpression::Operation::extract(DataExtractor Data,
121  uint8_t AddressSize, uint64_t Offset,
122  std::optional<DwarfFormat> Format) {
123  EndOffset = Offset;
124  Opcode = Data.getU8(&Offset);
125 
126  Desc = getOpDesc(Opcode);
127  if (Desc.Version == Operation::DwarfNA)
128  return false;
129 
130  for (unsigned Operand = 0; Operand < 2; ++Operand) {
131  unsigned Size = Desc.Op[Operand];
132  unsigned Signed = Size & Operation::SignBit;
133 
134  if (Size == Operation::SizeNA)
135  break;
136 
137  switch (Size & ~Operation::SignBit) {
138  case Operation::Size1:
139  Operands[Operand] = Data.getU8(&Offset);
140  if (Signed)
141  Operands[Operand] = (int8_t)Operands[Operand];
142  break;
143  case Operation::Size2:
144  Operands[Operand] = Data.getU16(&Offset);
145  if (Signed)
146  Operands[Operand] = (int16_t)Operands[Operand];
147  break;
148  case Operation::Size4:
149  Operands[Operand] = Data.getU32(&Offset);
150  if (Signed)
151  Operands[Operand] = (int32_t)Operands[Operand];
152  break;
153  case Operation::Size8:
154  Operands[Operand] = Data.getU64(&Offset);
155  break;
156  case Operation::SizeAddr:
157  Operands[Operand] = Data.getUnsigned(&Offset, AddressSize);
158  break;
159  case Operation::SizeRefAddr:
160  if (!Format)
161  return false;
162  Operands[Operand] =
163  Data.getUnsigned(&Offset, dwarf::getDwarfOffsetByteSize(*Format));
164  break;
165  case Operation::SizeLEB:
166  if (Signed)
167  Operands[Operand] = Data.getSLEB128(&Offset);
168  else
169  Operands[Operand] = Data.getULEB128(&Offset);
170  break;
171  case Operation::BaseTypeRef:
172  Operands[Operand] = Data.getULEB128(&Offset);
173  break;
174  case Operation::WasmLocationArg:
175  assert(Operand == 1);
176  switch (Operands[0]) {
177  case 0:
178  case 1:
179  case 2:
180  case 4:
181  Operands[Operand] = Data.getULEB128(&Offset);
182  break;
183  case 3: // global as uint32
184  Operands[Operand] = Data.getU32(&Offset);
185  break;
186  default:
187  return false; // Unknown Wasm location
188  }
189  break;
190  case Operation::SizeBlock:
191  // We need a size, so this cannot be the first operand
192  if (Operand == 0)
193  return false;
194  // Store the offset of the block as the value.
195  Operands[Operand] = Offset;
196  Offset += Operands[Operand - 1];
197  break;
198  default:
199  llvm_unreachable("Unknown DWARFExpression Op size");
200  }
201 
202  OperandEndOffsets[Operand] = Offset;
203  }
204 
205  EndOffset = Offset;
206  return true;
207 }
208 
210  DIDumpOptions DumpOpts,
211  const uint64_t Operands[2],
212  unsigned Operand) {
213  assert(Operand < 2 && "operand out of bounds");
214  auto Die = U->getDIEForOffset(U->getOffset() + Operands[Operand]);
215  if (Die && Die.getTag() == dwarf::DW_TAG_base_type) {
216  OS << " (";
217  if (DumpOpts.Verbose)
218  OS << format("0x%08" PRIx64 " -> ", Operands[Operand]);
219  OS << format("0x%08" PRIx64 ")", U->getOffset() + Operands[Operand]);
220  if (auto Name = dwarf::toString(Die.find(dwarf::DW_AT_name)))
221  OS << " \"" << *Name << "\"";
222  } else {
223  OS << format(" <invalid base_type ref: 0x%" PRIx64 ">",
224  Operands[Operand]);
225  }
226 }
227 
229  DWARFUnit *U, raw_ostream &OS, DIDumpOptions DumpOpts, uint8_t Opcode,
230  const uint64_t Operands[2], const MCRegisterInfo *MRI, bool isEH) {
231  if (!MRI)
232  return false;
233 
234  uint64_t DwarfRegNum;
235  unsigned OpNum = 0;
236 
237  if (Opcode == DW_OP_bregx || Opcode == DW_OP_regx ||
238  Opcode == DW_OP_regval_type)
239  DwarfRegNum = Operands[OpNum++];
240  else if (Opcode >= DW_OP_breg0 && Opcode < DW_OP_bregx)
241  DwarfRegNum = Opcode - DW_OP_breg0;
242  else
243  DwarfRegNum = Opcode - DW_OP_reg0;
244 
245  if (std::optional<unsigned> LLVMRegNum =
246  MRI->getLLVMRegNum(DwarfRegNum, isEH)) {
247  if (const char *RegName = MRI->getName(*LLVMRegNum)) {
248  if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
249  Opcode == DW_OP_bregx)
250  OS << format(" %s%+" PRId64, RegName, Operands[OpNum]);
251  else
252  OS << ' ' << RegName;
253 
254  if (Opcode == DW_OP_regval_type)
255  prettyPrintBaseTypeRef(U, OS, DumpOpts, Operands, 1);
256  return true;
257  }
258  }
259 
260  return false;
261 }
262 
264  const DWARFExpression *Expr,
265  const MCRegisterInfo *RegInfo,
266  DWARFUnit *U, bool isEH) const {
267  if (Error) {
268  OS << "<decoding error>";
269  return false;
270  }
271 
272  StringRef Name = OperationEncodingString(Opcode);
273  assert(!Name.empty() && "DW_OP has no name!");
274  OS << Name;
275 
276  if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
277  (Opcode >= DW_OP_reg0 && Opcode <= DW_OP_reg31) ||
278  Opcode == DW_OP_bregx || Opcode == DW_OP_regx ||
279  Opcode == DW_OP_regval_type)
280  if (prettyPrintRegisterOp(U, OS, DumpOpts, Opcode, Operands, RegInfo, isEH))
281  return true;
282 
283  for (unsigned Operand = 0; Operand < 2; ++Operand) {
284  unsigned Size = Desc.Op[Operand];
285  unsigned Signed = Size & Operation::SignBit;
286 
287  if (Size == Operation::SizeNA)
288  break;
289 
290  if (Size == Operation::BaseTypeRef && U) {
291  // For DW_OP_convert the operand may be 0 to indicate that conversion to
292  // the generic type should be done. The same holds for DW_OP_reinterpret,
293  // which is currently not supported.
294  if (Opcode == DW_OP_convert && Operands[Operand] == 0)
295  OS << " 0x0";
296  else
297  prettyPrintBaseTypeRef(U, OS, DumpOpts, Operands, Operand);
298  } else if (Size == Operation::WasmLocationArg) {
299  assert(Operand == 1);
300  switch (Operands[0]) {
301  case 0:
302  case 1:
303  case 2:
304  case 3: // global as uint32
305  case 4:
306  OS << format(" 0x%" PRIx64, Operands[Operand]);
307  break;
308  default: assert(false);
309  }
310  } else if (Size == Operation::SizeBlock) {
311  uint64_t Offset = Operands[Operand];
312  for (unsigned i = 0; i < Operands[Operand - 1]; ++i)
313  OS << format(" 0x%02x", Expr->Data.getU8(&Offset));
314  } else {
315  if (Signed)
316  OS << format(" %+" PRId64, (int64_t)Operands[Operand]);
317  else if (Opcode != DW_OP_entry_value &&
318  Opcode != DW_OP_GNU_entry_value)
319  OS << format(" 0x%" PRIx64, Operands[Operand]);
320  }
321  }
322  return true;
323 }
324 
326  const MCRegisterInfo *RegInfo, DWARFUnit *U,
327  bool IsEH) const {
328  uint32_t EntryValExprSize = 0;
329  uint64_t EntryValStartOffset = 0;
330  if (Data.getData().empty())
331  OS << "<empty>";
332 
333  for (auto &Op : *this) {
334  if (!Op.print(OS, DumpOpts, this, RegInfo, U, IsEH)) {
335  uint64_t FailOffset = Op.getEndOffset();
336  while (FailOffset < Data.getData().size())
337  OS << format(" %02x", Data.getU8(&FailOffset));
338  return;
339  }
340 
341  if (Op.getCode() == DW_OP_entry_value ||
342  Op.getCode() == DW_OP_GNU_entry_value) {
343  OS << "(";
344  EntryValExprSize = Op.getRawOperand(0);
345  EntryValStartOffset = Op.getEndOffset();
346  continue;
347  }
348 
349  if (EntryValExprSize) {
350  EntryValExprSize -= Op.getEndOffset() - EntryValStartOffset;
351  if (EntryValExprSize == 0)
352  OS << ")";
353  }
354 
355  if (Op.getEndOffset() < Data.getData().size())
356  OS << ", ";
357  }
358 }
359 
361  for (unsigned Operand = 0; Operand < 2; ++Operand) {
362  unsigned Size = Op.Desc.Op[Operand];
363 
364  if (Size == Operation::SizeNA)
365  break;
366 
367  if (Size == Operation::BaseTypeRef) {
368  // For DW_OP_convert the operand may be 0 to indicate that conversion to
369  // the generic type should be done, so don't look up a base type in that
370  // case. The same holds for DW_OP_reinterpret, which is currently not
371  // supported.
372  if (Op.Opcode == DW_OP_convert && Op.Operands[Operand] == 0)
373  continue;
374  auto Die = U->getDIEForOffset(U->getOffset() + Op.Operands[Operand]);
375  if (!Die || Die.getTag() != dwarf::DW_TAG_base_type)
376  return false;
377  }
378  }
379 
380  return true;
381 }
382 
384  for (auto &Op : *this)
385  if (!Operation::verify(Op, U))
386  return false;
387 
388  return true;
389 }
390 
391 /// A user-facing string representation of a DWARF expression. This might be an
392 /// Address expression, in which case it will be implicitly dereferenced, or a
393 /// Value expression.
394 struct PrintedExpr {
395  enum ExprKind {
398  };
401 
402  PrintedExpr(ExprKind K = Address) : Kind(K) {}
403 };
404 
407  const MCRegisterInfo &MRI) {
409 
410  while (I != E) {
411  const DWARFExpression::Operation &Op = *I;
412  uint8_t Opcode = Op.getCode();
413  switch (Opcode) {
414  case dwarf::DW_OP_regx: {
415  // DW_OP_regx: A register, with the register num given as an operand.
416  // Printed as the plain register name.
417  uint64_t DwarfRegNum = Op.getRawOperand(0);
418  std::optional<unsigned> LLVMRegNum =
419  MRI.getLLVMRegNum(DwarfRegNum, false);
420  if (!LLVMRegNum) {
421  OS << "<unknown register " << DwarfRegNum << ">";
422  return false;
423  }
424  raw_svector_ostream S(Stack.emplace_back(PrintedExpr::Value).String);
425  S << MRI.getName(*LLVMRegNum);
426  break;
427  }
428  case dwarf::DW_OP_bregx: {
429  int DwarfRegNum = Op.getRawOperand(0);
430  int64_t Offset = Op.getRawOperand(1);
431  std::optional<unsigned> LLVMRegNum =
432  MRI.getLLVMRegNum(DwarfRegNum, false);
433  if (!LLVMRegNum) {
434  OS << "<unknown register " << DwarfRegNum << ">";
435  return false;
436  }
437  raw_svector_ostream S(Stack.emplace_back().String);
438  S << MRI.getName(*LLVMRegNum);
439  if (Offset)
440  S << format("%+" PRId64, Offset);
441  break;
442  }
443  case dwarf::DW_OP_entry_value:
444  case dwarf::DW_OP_GNU_entry_value: {
445  // DW_OP_entry_value contains a sub-expression which must be rendered
446  // separately.
447  uint64_t SubExprLength = Op.getRawOperand(0);
448  DWARFExpression::iterator SubExprEnd = I.skipBytes(SubExprLength);
449  ++I;
450  raw_svector_ostream S(Stack.emplace_back().String);
451  S << "entry(";
452  printCompactDWARFExpr(S, I, SubExprEnd, MRI);
453  S << ")";
454  I = SubExprEnd;
455  continue;
456  }
457  case dwarf::DW_OP_stack_value: {
458  // The top stack entry should be treated as the actual value of tne
459  // variable, rather than the address of the variable in memory.
460  assert(!Stack.empty());
461  Stack.back().Kind = PrintedExpr::Value;
462  break;
463  }
464  default:
465  if (Opcode >= dwarf::DW_OP_reg0 && Opcode <= dwarf::DW_OP_reg31) {
466  // DW_OP_reg<N>: A register, with the register num implied by the
467  // opcode. Printed as the plain register name.
468  uint64_t DwarfRegNum = Opcode - dwarf::DW_OP_reg0;
469  std::optional<unsigned> LLVMRegNum =
470  MRI.getLLVMRegNum(DwarfRegNum, false);
471  if (!LLVMRegNum) {
472  OS << "<unknown register " << DwarfRegNum << ">";
473  return false;
474  }
475  raw_svector_ostream S(Stack.emplace_back(PrintedExpr::Value).String);
476  S << MRI.getName(*LLVMRegNum);
477  } else if (Opcode >= dwarf::DW_OP_breg0 &&
478  Opcode <= dwarf::DW_OP_breg31) {
479  int DwarfRegNum = Opcode - dwarf::DW_OP_breg0;
480  int64_t Offset = Op.getRawOperand(0);
481  std::optional<unsigned> LLVMRegNum =
482  MRI.getLLVMRegNum(DwarfRegNum, false);
483  if (!LLVMRegNum) {
484  OS << "<unknown register " << DwarfRegNum << ">";
485  return false;
486  }
487  raw_svector_ostream S(Stack.emplace_back().String);
488  S << MRI.getName(*LLVMRegNum);
489  if (Offset)
490  S << format("%+" PRId64, Offset);
491  } else {
492  // If we hit an unknown operand, we don't know its effect on the stack,
493  // so bail out on the whole expression.
494  OS << "<unknown op " << dwarf::OperationEncodingString(Opcode) << " ("
495  << (int)Opcode << ")>";
496  return false;
497  }
498  break;
499  }
500  ++I;
501  }
502 
503  assert(Stack.size() == 1 && "expected one value on stack");
504 
505  if (Stack.front().Kind == PrintedExpr::Address)
506  OS << "[" << Stack.front().String << "]";
507  else
508  OS << Stack.front().String;
509 
510  return true;
511 }
512 
514  return printCompactDWARFExpr(OS, begin(), end(), MRI);
515 }
516 
518  if (AddressSize != RHS.AddressSize || Format != RHS.Format)
519  return false;
520  return Data.getData() == RHS.Data.getData();
521 }
522 
523 } // namespace llvm
i
i
Definition: README.txt:29
llvm::DWARFExpression::iterator
An iterator to go through the expression operations.
Definition: DWARFExpression.h:108
Signed
@ Signed
Definition: NVPTXISelLowering.cpp:4715
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1199
llvm::getOpDesc
static DWARFExpression::Operation::Description getOpDesc(unsigned OpCode)
Definition: DWARFExpression.cpp:111
llvm::DWARFExpression::Operation::verify
static bool verify(const Operation &Op, DWARFUnit *U)
Verify Op. Does not affect the return of isError().
Definition: DWARFExpression.cpp:360
llvm::DWARFExpression::operator==
bool operator==(const DWARFExpression &RHS) const
Definition: DWARFExpression.cpp:517
llvm::sys::path::end
const_iterator end(StringRef path)
Get end iterator over path.
Definition: Path.cpp:235
llvm::sys::path::begin
const_iterator begin(StringRef path, Style style=Style::native)
Get begin iterator over path.
Definition: Path.cpp:226
llvm::PrintedExpr::PrintedExpr
PrintedExpr(ExprKind K=Address)
Definition: DWARFExpression.cpp:402
llvm::DWARFExpression::print
void print(raw_ostream &OS, DIDumpOptions DumpOpts, const MCRegisterInfo *RegInfo, DWARFUnit *U, bool IsEH=false) const
Definition: DWARFExpression.cpp:325
RHS
Value * RHS
Definition: X86PartialReduction.cpp:76
Format.h
llvm::Data
@ Data
Definition: SIMachineScheduler.h:55
llvm::DWARFExpression::printCompact
bool printCompact(raw_ostream &OS, const MCRegisterInfo &RegInfo)
Print the expression in a format intended to be compact and useful to a user, but not perfectly unamb...
Definition: DWARFExpression.cpp:513
llvm::PrintedExpr
A user-facing string representation of a DWARF expression.
Definition: DWARFExpression.cpp:394
llvm::DIDumpOptions::Verbose
bool Verbose
Definition: DIContext.h:200
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::DWARFExpression::Operation
This class represents an Operation in the Expression.
Definition: DWARFExpression.h:33
int
Clang compiles this i1 i64 store i64 i64 store i64 i64 store i64 i64 store i64 align Which gets codegen d xmm0 movaps rbp movaps rbp movaps rbp movaps rbp rbp rbp rbp rbp It would be better to have movq s of instead of the movaps s LLVM produces ret int
Definition: README.txt:536
llvm::dwarf::toString
std::optional< const char * > toString(const std::optional< DWARFFormValue > &V)
Take an optional DWARFFormValue and try to extract a string value from it.
Definition: DWARFFormValue.h:177
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:53
llvm::SmallString< 16 >
Operands
mir Rename Register Operands
Definition: MIRNamerPass.cpp:74
llvm::PrintedExpr::Address
@ Address
Definition: DWARFExpression.cpp:396
llvm::AMDGPU::Hwreg::Offset
Offset
Definition: SIDefines.h:419
llvm::DWARFExpression::prettyPrintRegisterOp
static bool prettyPrintRegisterOp(DWARFUnit *U, raw_ostream &OS, DIDumpOptions DumpOpts, uint8_t Opcode, const uint64_t Operands[2], const MCRegisterInfo *MRI, bool isEH)
Definition: DWARFExpression.cpp:228
uint64_t
llvm::PrintedExpr::Value
@ Value
Definition: DWARFExpression.cpp:397
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::PrintedExpr::Kind
ExprKind Kind
Definition: DWARFExpression.cpp:399
DWARFUnit.h
MCRegisterInfo.h
llvm::DWARFExpression::Operation::Description
Description of the encoding of one expression Op.
Definition: DWARFExpression.h:65
llvm::prettyPrintBaseTypeRef
static void prettyPrintBaseTypeRef(DWARFUnit *U, raw_ostream &OS, DIDumpOptions DumpOpts, const uint64_t Operands[2], unsigned Operand)
Definition: DWARFExpression.cpp:209
llvm::DWARFExpression
Definition: DWARFExpression.h:23
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
uint32_t
S
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
Definition: README.txt:210
llvm::format
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:124
llvm::MCRegisterInfo
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Definition: MCRegisterInfo.h:135
llvm::DataExtractor::getU8
uint8_t getU8(uint64_t *offset_ptr, Error *Err=nullptr) const
Extract a uint8_t value from *offset_ptr.
Definition: DataExtractor.cpp:79
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::RISCVISD::LA
@ LA
Definition: RISCVISelLowering.h:330
llvm::printCompactDWARFExpr
static bool printCompactDWARFExpr(raw_ostream &OS, DWARFExpression::iterator I, const DWARFExpression::iterator E, const MCRegisterInfo &MRI)
Definition: DWARFExpression.cpp:405
uint16_t
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:351
llvm::DWARFUnit
Definition: DWARFUnit.h:206
llvm::Error
Lightweight error class with error context and mandatory checking.
Definition: Error.h:155
llvm::DWARFUnit::getOffset
uint64_t getOffset() const
Definition: DWARFUnit.h:314
DWARFExpression.h
verify
ppc ctr loops verify
Definition: PPCCTRLoopsVerify.cpp:76
llvm::DataExtractor
Definition: DataExtractor.h:41
llvm::raw_svector_ostream
A raw_ostream that writes to an SmallVector or SmallString.
Definition: raw_ostream.h:659
RegName
#define RegName(no)
llvm::DWARFExpression::verify
bool verify(DWARFUnit *U)
Definition: DWARFExpression.cpp:383
llvm::DWARFUnit::getDIEForOffset
DWARFDie getDIEForOffset(uint64_t Offset)
Return the DIE object for a given offset Offset inside the unit's DIE vector.
Definition: DWARFUnit.h:516
llvm::PrintedExpr::ExprKind
ExprKind
Definition: DWARFExpression.cpp:395
llvm::dwarf::getDwarfOffsetByteSize
uint8_t getDwarfOffsetByteSize(DwarfFormat Format)
The size of a reference determined by the DWARF 32/64-bit format.
Definition: Dwarf.h:658
llvm::PrintedExpr::String
SmallString< 16 > String
Definition: DWARFExpression.cpp:400
llvm::getDescriptions
static DescVector getDescriptions()
Definition: DWARFExpression.cpp:24
llvm::DescVector
std::vector< DWARFExpression::Operation::Description > DescVector
Definition: DWARFExpression.cpp:22
llvm::DWARFExpression::Operation::print
bool print(raw_ostream &OS, DIDumpOptions DumpOpts, const DWARFExpression *Expr, const MCRegisterInfo *RegInfo, DWARFUnit *U, bool isEH) const
Definition: DWARFExpression.cpp:263
llvm::dwarf::OperationEncodingString
StringRef OperationEncodingString(unsigned Encoding)
Definition: Dwarf.cpp:138
llvm::DIDumpOptions
Container for dump options that control which debug information will be dumped.
Definition: DIContext.h:189