VPlanAnalysis.h

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//===- VPlanAnalysis.h - Various Analyses working on VPlan ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
 
#ifndef LLVM_TRANSFORMS_VECTORIZE_VPLANANALYSIS_H
#define LLVM_TRANSFORMS_VECTORIZE_VPLANANALYSIS_H
 
#include "VPlan.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/MapVector.h"
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/Type.h"
 
namespace llvm {
 
class VPRecipeBase;
class VPlan;
class VPDominatorTree;
class TargetTransformInfo;
class InstructionCost;
 
struct VPCostContext;
 
// Collect a VPlan's ephemeral recipes (those used only by an assume).
void collectEphemeralRecipesForVPlan(VPlan &Plan,
                                     DenseSet<VPRecipeBase *> &EphRecipes);
 
/// Returns true if the memory accesses in outer loop plain CFG \p Plan can be
/// vectorized.
bool proveOuterLoopMemorySafety(VPlan &Plan, PredicatedScalarEvolution &PSE,
                                AAResults &AA, const VPDominatorTree &VPDT,
                                const Loop *OuterLoop);
 
/// A struct that represents some properties of the register usage
/// of a loop.
struct VPRegisterUsage {
  /// Holds the number of loop invariant values that are used in the loop.
  /// The key is ClassID of target-provided register class.
  SmallMapVector<unsigned, unsigned, 4> LoopInvariantRegs;
  /// Holds the maximum number of concurrent live intervals in the loop.
  /// The key is ClassID of target-provided register class.
  SmallMapVector<unsigned, unsigned, 4> MaxLocalUsers;
 
  /// Calculate the estimated cost of any spills due to using more registers
  /// than the number available for the target. If non-zero, OverrideMaxNumRegs
  /// is used in place of the target's number of registers.
  InstructionCost spillCost(const TargetTransformInfo &TTI,
                            TargetTransformInfo::TargetCostKind CostKind,
                            unsigned OverrideMaxNumRegs = 0) const;
};
 
/// Estimate the register usage for \p Plan and vectorization factors in \p VFs
/// by calculating the highest number of values that are live at a single
/// location as a rough estimate. Returns the register usage for each VF in \p
/// VFs.
SmallVector<VPRegisterUsage, 8>
calculateRegisterUsageForPlan(VPlan &Plan, ArrayRef<ElementCount> VFs,
                              const TargetTransformInfo &TTI);
 
} // end namespace llvm
 
#endif // LLVM_TRANSFORMS_VECTORIZE_VPLANANALYSIS_H