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LLVM
13.0.0git
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This pass provides access to the codegen interfaces that are needed for IR-level transformations. More...
#include "llvm/Analysis/TargetTransformInfo.h"
Classes | |
| class | Concept |
| struct | LSRCost |
| struct | MemCmpExpansionOptions |
| Returns options for expansion of memcmp. IsZeroCmp is. More... | |
| struct | PeelingPreferences |
| struct | ReductionData |
| Contains opcode + LHS/RHS parts of the reduction operations. More... | |
| struct | ReductionFlags |
| Flags describing the kind of vector reduction. More... | |
| struct | UnrollingPreferences |
| Parameters that control the generic loop unrolling transformation. More... | |
Public Member Functions | |
| template<typename T > | |
| TargetTransformInfo (T Impl) | |
Construct a TTI object using a type implementing the Concept API below. More... | |
| TargetTransformInfo (const DataLayout &DL) | |
Construct a baseline TTI object using a minimal implementation of the Concept API below. More... | |
| TargetTransformInfo (TargetTransformInfo &&Arg) | |
| TargetTransformInfo & | operator= (TargetTransformInfo &&RHS) |
| ~TargetTransformInfo () | |
| bool | invalidate (Function &, const PreservedAnalyses &, FunctionAnalysisManager::Invalidator &) |
| Handle the invalidation of this information. More... | |
Vector Predication Information | |
Whether the target supports the evl parameter of VP intrinsic efficiently in hardware. (see LLVM Language Reference - "Vector Predication Intrinsics") Use of evl is discouraged when that is not the case. | |
| bool | hasActiveVectorLength () const |
Generic Target Information | |
| enum | TargetCostKind { TCK_RecipThroughput, TCK_Latency, TCK_CodeSize, TCK_SizeAndLatency } |
| The kind of cost model. More... | |
| enum | TargetCostConstants { TCC_Free = 0, TCC_Basic = 1, TCC_Expensive = 4 } |
| Underlying constants for 'cost' values in this interface. More... | |
| InstructionCost | getInstructionCost (const Instruction *I, enum TargetCostKind kind) const |
| Query the cost of a specified instruction. More... | |
| int | getGEPCost (Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, TargetCostKind CostKind=TCK_SizeAndLatency) const |
| Estimate the cost of a GEP operation when lowered. More... | |
| unsigned | getInliningThresholdMultiplier () const |
| unsigned | adjustInliningThreshold (const CallBase *CB) const |
| int | getInlinerVectorBonusPercent () const |
| int | getMemcpyCost (const Instruction *I) const |
| unsigned | getEstimatedNumberOfCaseClusters (const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const |
| InstructionCost | getUserCost (const User *U, ArrayRef< const Value * > Operands, TargetCostKind CostKind) const |
| Estimate the cost of a given IR user when lowered. More... | |
| InstructionCost | getUserCost (const User *U, TargetCostKind CostKind) const |
This is a helper function which calls the two-argument getUserCost with Operands which are the current operands U has. More... | |
| BranchProbability | getPredictableBranchThreshold () const |
| If a branch or a select condition is skewed in one direction by more than this factor, it is very likely to be predicted correctly. More... | |
| bool | hasBranchDivergence () const |
| Return true if branch divergence exists. More... | |
| bool | useGPUDivergenceAnalysis () const |
| Return true if the target prefers to use GPU divergence analysis to replace the legacy version. More... | |
| bool | isSourceOfDivergence (const Value *V) const |
| Returns whether V is a source of divergence. More... | |
| bool | isAlwaysUniform (const Value *V) const |
| unsigned | getFlatAddressSpace () const |
| Returns the address space ID for a target's 'flat' address space. More... | |
| bool | collectFlatAddressOperands (SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const |
| Return any intrinsic address operand indexes which may be rewritten if they use a flat address space pointer. More... | |
| bool | isNoopAddrSpaceCast (unsigned FromAS, unsigned ToAS) const |
| unsigned | getAssumedAddrSpace (const Value *V) const |
| Value * | rewriteIntrinsicWithAddressSpace (IntrinsicInst *II, Value *OldV, Value *NewV) const |
Rewrite intrinsic call II such that OldV will be replaced with NewV, which has a different address space. More... | |
| bool | isLoweredToCall (const Function *F) const |
| Test whether calls to a function lower to actual program function calls. More... | |
| void | getUnrollingPreferences (Loop *L, ScalarEvolution &, UnrollingPreferences &UP) const |
| Get target-customized preferences for the generic loop unrolling transformation. More... | |
| bool | isHardwareLoopProfitable (Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const |
| Query the target whether it would be profitable to convert the given loop into a hardware loop. More... | |
| bool | preferPredicateOverEpilogue (Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *TLI, DominatorTree *DT, const LoopAccessInfo *LAI) const |
| Query the target whether it would be prefered to create a predicated vector loop, which can avoid the need to emit a scalar epilogue loop. More... | |
| bool | emitGetActiveLaneMask () const |
| Query the target whether lowering of the llvm.get.active.lane.mask intrinsic is supported. More... | |
| void | getPeelingPreferences (Loop *L, ScalarEvolution &SE, PeelingPreferences &PP) const |
| Get target-customized preferences for the generic loop peeling transformation. More... | |
| Optional< Instruction * > | instCombineIntrinsic (InstCombiner &IC, IntrinsicInst &II) const |
| Targets can implement their own combinations for target-specific intrinsics. More... | |
| Optional< Value * > | simplifyDemandedUseBitsIntrinsic (InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const |
| Can be used to implement target-specific instruction combining. More... | |
| Optional< Value * > | simplifyDemandedVectorEltsIntrinsic (InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const |
| Can be used to implement target-specific instruction combining. More... | |
Scalar Target Information | |
| enum | PopcntSupportKind { PSK_Software, PSK_SlowHardware, PSK_FastHardware } |
| Flags indicating the kind of support for population count. More... | |
| enum | AddressingModeKind { AMK_PreIndexed, AMK_PostIndexed, AMK_None } |
| bool | isLegalAddImmediate (int64_t Imm) const |
| Return true if the specified immediate is legal add immediate, that is the target has add instructions which can add a register with the immediate without having to materialize the immediate into a register. More... | |
| bool | isLegalICmpImmediate (int64_t Imm) const |
| Return true if the specified immediate is legal icmp immediate, that is the target has icmp instructions which can compare a register against the immediate without having to materialize the immediate into a register. More... | |
| bool | isLegalAddressingMode (Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace=0, Instruction *I=nullptr) const |
| Return true if the addressing mode represented by AM is legal for this target, for a load/store of the specified type. More... | |
| bool | isLSRCostLess (TargetTransformInfo::LSRCost &C1, TargetTransformInfo::LSRCost &C2) const |
| Return true if LSR cost of C1 is lower than C1. More... | |
| bool | isNumRegsMajorCostOfLSR () const |
| Return true if LSR major cost is number of registers. More... | |
| bool | isProfitableLSRChainElement (Instruction *I) const |
| bool | canMacroFuseCmp () const |
| Return true if the target can fuse a compare and branch. More... | |
| bool | canSaveCmp (Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI, DominatorTree *DT, AssumptionCache *AC, TargetLibraryInfo *LibInfo) const |
| Return true if the target can save a compare for loop count, for example hardware loop saves a compare. More... | |
| AddressingModeKind | getPreferredAddressingMode (const Loop *L, ScalarEvolution *SE) const |
| Return the preferred addressing mode LSR should make efforts to generate. More... | |
| bool | isLegalMaskedStore (Type *DataType, Align Alignment) const |
| Return true if the target supports masked store. More... | |
| bool | isLegalMaskedLoad (Type *DataType, Align Alignment) const |
| Return true if the target supports masked load. More... | |
| bool | isLegalNTStore (Type *DataType, Align Alignment) const |
| Return true if the target supports nontemporal store. More... | |
| bool | isLegalNTLoad (Type *DataType, Align Alignment) const |
| Return true if the target supports nontemporal load. More... | |
| bool | isLegalMaskedScatter (Type *DataType, Align Alignment) const |
| Return true if the target supports masked scatter. More... | |
| bool | isLegalMaskedGather (Type *DataType, Align Alignment) const |
| Return true if the target supports masked gather. More... | |
| bool | isLegalMaskedCompressStore (Type *DataType) const |
| Return true if the target supports masked compress store. More... | |
| bool | isLegalMaskedExpandLoad (Type *DataType) const |
| Return true if the target supports masked expand load. More... | |
| bool | hasDivRemOp (Type *DataType, bool IsSigned) const |
| Return true if the target has a unified operation to calculate division and remainder. More... | |
| bool | hasVolatileVariant (Instruction *I, unsigned AddrSpace) const |
| Return true if the given instruction (assumed to be a memory access instruction) has a volatile variant. More... | |
| bool | prefersVectorizedAddressing () const |
| Return true if target doesn't mind addresses in vectors. More... | |
| int | getScalingFactorCost (Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace=0) const |
| Return the cost of the scaling factor used in the addressing mode represented by AM for this target, for a load/store of the specified type. More... | |
| bool | LSRWithInstrQueries () const |
| Return true if the loop strength reduce pass should make Instruction* based TTI queries to isLegalAddressingMode(). More... | |
| bool | isTruncateFree (Type *Ty1, Type *Ty2) const |
| Return true if it's free to truncate a value of type Ty1 to type Ty2. More... | |
| bool | isProfitableToHoist (Instruction *I) const |
| Return true if it is profitable to hoist instruction in the then/else to before if. More... | |
| bool | useAA () const |
| bool | isTypeLegal (Type *Ty) const |
| Return true if this type is legal. More... | |
| unsigned | getRegUsageForType (Type *Ty) const |
Returns the estimated number of registers required to represent Ty. More... | |
| bool | shouldBuildLookupTables () const |
| Return true if switches should be turned into lookup tables for the target. More... | |
| bool | shouldBuildLookupTablesForConstant (Constant *C) const |
| Return true if switches should be turned into lookup tables containing this constant value for the target. More... | |
| bool | shouldBuildRelLookupTables () const |
| Return true if lookup tables should be turned into relative lookup tables. More... | |
| bool | useColdCCForColdCall (Function &F) const |
| Return true if the input function which is cold at all call sites, should use coldcc calling convention. More... | |
| unsigned | getScalarizationOverhead (VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract) const |
| Estimate the overhead of scalarizing an instruction. More... | |
| unsigned | getOperandsScalarizationOverhead (ArrayRef< const Value * > Args, ArrayRef< Type * > Tys) const |
| Estimate the overhead of scalarizing an instructions unique non-constant operands. More... | |
| bool | supportsEfficientVectorElementLoadStore () const |
| If target has efficient vector element load/store instructions, it can return true here so that insertion/extraction costs are not added to the scalarization cost of a load/store. More... | |
| bool | enableAggressiveInterleaving (bool LoopHasReductions) const |
| Don't restrict interleaved unrolling to small loops. More... | |
| MemCmpExpansionOptions | enableMemCmpExpansion (bool OptSize, bool IsZeroCmp) const |
| bool | enableInterleavedAccessVectorization () const |
| Enable matching of interleaved access groups. More... | |
| bool | enableMaskedInterleavedAccessVectorization () const |
| Enable matching of interleaved access groups that contain predicated accesses or gaps and therefore vectorized using masked vector loads/stores. More... | |
| bool | isFPVectorizationPotentiallyUnsafe () const |
| Indicate that it is potentially unsafe to automatically vectorize floating-point operations because the semantics of vector and scalar floating-point semantics may differ. More... | |
| bool | allowsMisalignedMemoryAccesses (LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace=0, Align Alignment=Align(1), bool *Fast=nullptr) const |
| Determine if the target supports unaligned memory accesses. More... | |
| PopcntSupportKind | getPopcntSupport (unsigned IntTyWidthInBit) const |
| Return hardware support for population count. More... | |
| bool | haveFastSqrt (Type *Ty) const |
| Return true if the hardware has a fast square-root instruction. More... | |
| bool | isFCmpOrdCheaperThanFCmpZero (Type *Ty) const |
| Return true if it is faster to check if a floating-point value is NaN (or not-NaN) versus a comparison against a constant FP zero value. More... | |
| InstructionCost | getFPOpCost (Type *Ty) const |
| Return the expected cost of supporting the floating point operation of the specified type. More... | |
| int | getIntImmCost (const APInt &Imm, Type *Ty, TargetCostKind CostKind) const |
| Return the expected cost of materializing for the given integer immediate of the specified type. More... | |
| int | getIntImmCostInst (unsigned Opc, unsigned Idx, const APInt &Imm, Type *Ty, TargetCostKind CostKind, Instruction *Inst=nullptr) const |
| Return the expected cost of materialization for the given integer immediate of the specified type for a given instruction. More... | |
| int | getIntImmCostIntrin (Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TargetCostKind CostKind) const |
| int | getIntImmCodeSizeCost (unsigned Opc, unsigned Idx, const APInt &Imm, Type *Ty) const |
| Return the expected cost for the given integer when optimising for size. More... | |
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
Definition at line 168 of file TargetTransformInfo.h.
| Enumerator | |
|---|---|
| AMK_PreIndexed | |
| AMK_PostIndexed | |
| AMK_None | |
Definition at line 633 of file TargetTransformInfo.h.
|
strong |
|
strong |
Represents a hint about the context in which a cast is used.
For zext/sext, the context of the cast is the operand, which must be a load of some kind. For trunc, the context is of the cast is the single user of the instruction, which must be a store of some kind.
This enum allows the vectorizer to give getCastInstrCost an idea of the type of cast it's dealing with, as not every cast is equal. For instance, the zext of a load may be free, but the zext of an interleaving load can be (very) expensive!
See getCastContextHint to compute a CastContextHint from a cast Instruction*. Callers can use it if they don't need to override the context and just want it to be calculated from the instruction.
FIXME: This handles the types of load/store that the vectorizer can produce, which are the cases where the context instruction is most likely to be incorrect. There are other situations where that can happen too, which might be handled here but in the long run a more general solution of costing multiple instructions at the same times may be better.
Definition at line 1079 of file TargetTransformInfo.h.
The type of load/store indexing.
| Enumerator | |
|---|---|
| MIM_Unindexed | No indexing. |
| MIM_PreInc | Pre-incrementing. |
| MIM_PreDec | Pre-decrementing. |
| MIM_PostInc | Post-incrementing. |
| MIM_PostDec | Post-decrementing. |
Definition at line 1285 of file TargetTransformInfo.h.
Additional information about an operand's possible values.
| Enumerator | |
|---|---|
| OK_AnyValue | |
| OK_UniformValue | |
| OK_UniformConstantValue | |
| OK_NonUniformConstantValue | |
Definition at line 895 of file TargetTransformInfo.h.
Additional properties of an operand's values.
| Enumerator | |
|---|---|
| OP_None | |
| OP_PowerOf2 | |
Definition at line 903 of file TargetTransformInfo.h.
Flags indicating the kind of support for population count.
Compared to the SW implementation, HW support is supposed to significantly boost the performance when the population is dense, and it may or may not degrade performance if the population is sparse. A HW support is considered as "Fast" if it can outperform, or is on a par with, SW implementation when the population is sparse; otherwise, it is considered as "Slow".
| Enumerator | |
|---|---|
| PSK_Software | |
| PSK_SlowHardware | |
| PSK_FastHardware | |
Definition at line 586 of file TargetTransformInfo.h.
Kind of the reduction data.
| Enumerator | |
|---|---|
| RK_None | |
| RK_Arithmetic | Not a reduction. |
| RK_MinMax | Binary reduction data. |
| RK_UnsignedMinMax | Min/max reduction data. |
Definition at line 861 of file TargetTransformInfo.h.
| Enumerator | |
|---|---|
| RGK_Scalar | |
| RGK_FixedWidthVector | |
| RGK_ScalableVector | |
Definition at line 924 of file TargetTransformInfo.h.
The various kinds of shuffle patterns for vector queries.
Definition at line 845 of file TargetTransformInfo.h.
Underlying constants for 'cost' values in this interface.
Many APIs in this interface return a cost. This enum defines the fundamental values that should be used to interpret (and produce) those costs. The costs are returned as an int rather than a member of this enumeration because it is expected that the cost of one IR instruction may have a multiplicative factor to it or otherwise won't fit directly into the enum. Moreover, it is common to sum or average costs which works better as simple integral values. Thus this enum only provides constants. Also note that the returned costs are signed integers to make it natural to add, subtract, and test with zero (a common boundary condition). It is not expected that 2^32 is a realistic cost to be modeling at any point.
Note that these costs should usually reflect the intersection of code-size cost and execution cost. A free instruction is typically one that folds into another instruction. For example, reg-to-reg moves can often be skipped by renaming the registers in the CPU, but they still are encoded and thus wouldn't be considered 'free' here.
| Enumerator | |
|---|---|
| TCC_Free | Expected to fold away in lowering. |
| TCC_Basic | The cost of a typical 'add' instruction. |
| TCC_Expensive | The cost of a 'div' instruction on x86. |
Definition at line 261 of file TargetTransformInfo.h.
The kind of cost model.
There are several different cost models that can be customized by the target. The normalization of each cost model may be target specific.
| Enumerator | |
|---|---|
| TCK_RecipThroughput | Reciprocal throughput. |
| TCK_Latency | The latency of instruction. |
| TCK_CodeSize | Instruction code size. |
| TCK_SizeAndLatency | The weighted sum of size and latency. |
Definition at line 211 of file TargetTransformInfo.h.
| llvm::TargetTransformInfo::TargetTransformInfo | ( | T | Impl | ) |
Construct a TTI object using a type implementing the Concept API below.
This is used by targets to construct a TTI wrapping their target-specific implementation that encodes appropriate costs for their target.
Definition at line 2251 of file TargetTransformInfo.h.
References T.
|
explicit |
Construct a baseline TTI object using a minimal implementation of the Concept API below.
The TTI implementation will reflect the information in the DataLayout provided if non-null.
Definition at line 184 of file TargetTransformInfo.cpp.
| TargetTransformInfo::TargetTransformInfo | ( | TargetTransformInfo && | Arg | ) |
Definition at line 189 of file TargetTransformInfo.cpp.
| TargetTransformInfo::~TargetTransformInfo | ( | ) |
Definition at line 187 of file TargetTransformInfo.cpp.
Definition at line 202 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::allowsMisalignedMemoryAccesses | ( | LLVMContext & | Context, |
| unsigned | BitWidth, | ||
| unsigned | AddressSpace = 0, |
||
| Align | Alignment = Align(1), |
||
| bool * | Fast = nullptr |
||
| ) | const |
Determine if the target supports unaligned memory accesses.
Definition at line 512 of file TargetTransformInfo.cpp.
References llvm::BitWidth, and Context.
| bool TargetTransformInfo::areFunctionArgsABICompatible | ( | const Function * | Caller, |
| const Function * | Callee, | ||
| SmallPtrSetImpl< Argument * > & | Args | ||
| ) | const |
Args will be passed to the callee. | [out] | Args | The list of compatible arguments. The implementation may filter out any incompatible args from this list. |
Definition at line 959 of file TargetTransformInfo.cpp.
References llvm::AMDGPU::HSAMD::Kernel::Key::Args, and Callee.
Referenced by llvm::ArgumentPromotionPass::areFunctionArgsABICompatible().
| bool TargetTransformInfo::areInlineCompatible | ( | const Function * | Caller, |
| const Function * | Callee | ||
| ) | const |
Definition at line 954 of file TargetTransformInfo.cpp.
References Callee.
Referenced by functionsHaveCompatibleAttributes().
| bool TargetTransformInfo::canMacroFuseCmp | ( | ) | const |
Return true if the target can fuse a compare and branch.
Loop-strength-reduction (LSR) uses that knowledge to adjust its cost calculation for the instructions in a loop.
Definition at line 358 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::canSaveCmp | ( | Loop * | L, |
| BranchInst ** | BI, | ||
| ScalarEvolution * | SE, | ||
| LoopInfo * | LI, | ||
| DominatorTree * | DT, | ||
| AssumptionCache * | AC, | ||
| TargetLibraryInfo * | LibInfo | ||
| ) | const |
Return true if the target can save a compare for loop count, for example hardware loop saves a compare.
Definition at line 362 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::collectFlatAddressOperands | ( | SmallVectorImpl< int > & | OpIndexes, |
| Intrinsic::ID | IID | ||
| ) | const |
Return any intrinsic address operand indexes which may be rewritten if they use a flat address space pointer.
Definition at line 256 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::emitGetActiveLaneMask | ( | ) | const |
Query the target whether lowering of the llvm.get.active.lane.mask intrinsic is supported.
Definition at line 292 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::enableAggressiveInterleaving | ( | bool | LoopHasReductions | ) | const |
Don't restrict interleaved unrolling to small loops.
Definition at line 490 of file TargetTransformInfo.cpp.
Referenced by llvm::LoopVectorizationCostModel::selectInterleaveCount().
| bool TargetTransformInfo::enableInterleavedAccessVectorization | ( | ) | const |
Enable matching of interleaved access groups.
Definition at line 500 of file TargetTransformInfo.cpp.
Referenced by llvm::LoopVectorizePass::processLoop().
| bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization | ( | ) | const |
Enable matching of interleaved access groups that contain predicated accesses or gaps and therefore vectorized using masked vector loads/stores.
Definition at line 504 of file TargetTransformInfo.cpp.
Referenced by useMaskedInterleavedAccesses().
| TargetTransformInfo::MemCmpExpansionOptions TargetTransformInfo::enableMemCmpExpansion | ( | bool | OptSize, |
| bool | IsZeroCmp | ||
| ) | const |
Definition at line 496 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::enableWritePrefetching | ( | ) | const |
Definition at line 648 of file TargetTransformInfo.cpp.
| int TargetTransformInfo::getAddressComputationCost | ( | Type * | Ty, |
| ScalarEvolution * | SE = nullptr, |
||
| const SCEV * | Ptr = nullptr |
||
| ) | const |
Definition at line 880 of file TargetTransformInfo.cpp.
References assert().
Referenced by chainToBasePointerCost().
| InstructionCost TargetTransformInfo::getArithmeticInstrCost | ( | unsigned | Opcode, |
| Type * | Ty, | ||
| TTI::TargetCostKind | CostKind = TTI::TCK_RecipThroughput, |
||
| OperandValueKind | Opd1Info = OK_AnyValue, |
||
| OperandValueKind | Opd2Info = OK_AnyValue, |
||
| OperandValueProperties | Opd1PropInfo = OP_None, |
||
| OperandValueProperties | Opd2PropInfo = OP_None, |
||
| ArrayRef< const Value * > | Args = ArrayRef<const Value *>(), |
||
| const Instruction * | CxtI = nullptr |
||
| ) | const |
This is an approximation of reciprocal throughput of a math/logic op.
A higher cost indicates less expected throughput. From Agner Fog's guides, reciprocal throughput is "the average number of clock cycles per instruction when the instructions are not part of a limiting dependency chain." Therefore, costs should be scaled to account for multiple execution units on the target that can process this type of instruction. For example, if there are 5 scalar integer units and 2 vector integer units that can calculate an 'add' in a single cycle, this model should indicate that the cost of the vector add instruction is 2.5 times the cost of the scalar add instruction. Args is an optional argument which holds the instruction operands values so the TTI can analyze those values searching for special cases or optimizations based on those values. CxtI is the optional original context instruction, if one exists, to provide even more information.
Definition at line 706 of file TargetTransformInfo.cpp.
References llvm::AMDGPU::HSAMD::Kernel::Key::Args, assert(), and CostKind.
Referenced by costAndCollectOperands(), llvm::FoldBranchToCommonDest(), and visitIVCast().
| InstructionCost TargetTransformInfo::getArithmeticReductionCost | ( | unsigned | Opcode, |
| VectorType * | Ty, | ||
| bool | IsPairwiseForm, | ||
| TTI::TargetCostKind | CostKind = TTI::TCK_RecipThroughput |
||
| ) | const |
Calculate the cost of performing a vector reduction.
This is the cost of reducing the vector value of type Ty to a scalar value using the operation denoted by Opcode. The form of the reduction can either be a pairwise reduction or a reduction that splits the vector at every reduction level.
Pairwise: (v0, v1, v2, v3) ((v0+v1), (v2+v3), undef, undef) Split: (v0, v1, v2, v3) ((v0+v2), (v1+v3), undef, undef)
Definition at line 894 of file TargetTransformInfo.cpp.
Definition at line 266 of file TargetTransformInfo.cpp.
Referenced by isAddressExpression().
| unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize | ( | ) | const |
Definition at line 929 of file TargetTransformInfo.cpp.
| llvm::Optional< unsigned > TargetTransformInfo::getCacheAssociativity | ( | CacheLevel | Level | ) | const |
Definition at line 629 of file TargetTransformInfo.cpp.
| unsigned TargetTransformInfo::getCacheLineSize | ( | ) | const |
Definition at line 619 of file TargetTransformInfo.cpp.
| llvm::Optional< unsigned > TargetTransformInfo::getCacheSize | ( | CacheLevel | Level | ) | const |
Definition at line 624 of file TargetTransformInfo.cpp.
| InstructionCost TargetTransformInfo::getCallInstrCost | ( | Function * | F, |
| Type * | RetTy, | ||
| ArrayRef< Type * > | Tys, | ||
| TTI::TargetCostKind | CostKind = TTI::TCK_SizeAndLatency |
||
| ) | const |
Definition at line 868 of file TargetTransformInfo.cpp.
References assert(), CostKind, and F.
Referenced by llvm::LoopVectorizationCostModel::getVectorCallCost(), and getVectorCallCosts().
|
static |
Calculates a CastContextHint from I.
This should be used by callers of getCastInstrCost if they wish to determine the context from some instruction.
I is nullptr, or if it's another type of cast. Definition at line 729 of file TargetTransformInfo.cpp.
References GatherScatter, llvm::IntrinsicInst::getIntrinsicID(), I, llvm::SPII::Load, Masked, None, Normal, and llvm::SPII::Store.
Referenced by chainToBasePointerCost(), and llvm::TargetTransformInfoImplCRTPBase< AMDGPUTTIImpl >::getUserCost().
| InstructionCost TargetTransformInfo::getCastInstrCost | ( | unsigned | Opcode, |
| Type * | Dst, | ||
| Type * | Src, | ||
| TTI::CastContextHint | CCH, | ||
| TTI::TargetCostKind | CostKind = TTI::TCK_SizeAndLatency, |
||
| const Instruction * | I = nullptr |
||
| ) | const |
Definition at line 772 of file TargetTransformInfo.cpp.
References assert(), CostKind, and I.
Referenced by chainToBasePointerCost(), costAndCollectOperands(), and llvm::BasicTTIImplBase< AMDGPUTTIImpl >::getCastInstrCost().
| InstructionCost TargetTransformInfo::getCFInstrCost | ( | unsigned | Opcode, |
| TTI::TargetCostKind | CostKind = TTI::TCK_SizeAndLatency, |
||
| const Instruction * | I = nullptr |
||
| ) | const |
Definition at line 791 of file TargetTransformInfo.cpp.
References assert(), CostKind, and I.
Referenced by findCostForOutputBlocks().
| InstructionCost TargetTransformInfo::getCmpSelInstrCost | ( | unsigned | Opcode, |
| Type * | ValTy, | ||
| Type * | CondTy = nullptr, |
||
| CmpInst::Predicate | VecPred = CmpInst::BAD_ICMP_PREDICATE, |
||
| TTI::TargetCostKind | CostKind = TTI::TCK_RecipThroughput, |
||
| const Instruction * | I = nullptr |
||
| ) | const |
VecPred parameter can be used to indicate the select is using a compare with the specified predicate as condition. When vector types are passed, VecPred must be used for all lanes. Definition at line 800 of file TargetTransformInfo.cpp.
References assert(), CostKind, and I.
Referenced by costAndCollectOperands(), findCostForOutputBlocks(), and validateAndCostRequiredSelects().
Some types may require the use of register classes that do not have any callee-saved registers, so would require a spill and fill.
Definition at line 920 of file TargetTransformInfo.cpp.
Referenced by llvm::slpvectorizer::BoUpSLP::getSpillCost().
| unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters | ( | const SwitchInst & | SI, |
| unsigned & | JTSize, | ||
| ProfileSummaryInfo * | PSI, | ||
| BlockFrequencyInfo * | BFI | ||
| ) | const |
'SI'. JTSize Set a jump table size only when SI is suitable for a jump table. Definition at line 216 of file TargetTransformInfo.cpp.
References llvm::AMDGPUISD::BFI, and SI.
| InstructionCost TargetTransformInfo::getExtendedAddReductionCost | ( | bool | IsMLA, |
| bool | IsUnsigned, | ||
| Type * | ResTy, | ||
| VectorType * | Ty, | ||
| TTI::TargetCostKind | CostKind = TTI::TCK_RecipThroughput |
||
| ) | const |
Calculate the cost of an extended reduction pattern, similar to getArithmeticReductionCost of an Add reduction with an extension and optional multiply.
This is the cost of as: ResTy vecreduce.add(ext(Ty A)), or if IsMLA flag is set then: ResTy vecreduce.add(mul(ext(Ty A), ext(Ty B)). The reduction happens on a VectorType with ResTy elements and Ty lanes.
Definition at line 912 of file TargetTransformInfo.cpp.
References CostKind.
| InstructionCost TargetTransformInfo::getExtractWithExtendCost | ( | unsigned | Opcode, |
| Type * | Dst, | ||
| VectorType * | VecTy, | ||
| unsigned | Index = -1 |
||
| ) | const |
Definition at line 783 of file TargetTransformInfo.cpp.
References assert(), and Index.
Referenced by llvm::slpvectorizer::BoUpSLP::getTreeCost().
| unsigned TargetTransformInfo::getFlatAddressSpace | ( | ) | const |
Returns the address space ID for a target's 'flat' address space.
Note this is not necessarily the same as addrspace(0), which LLVM sometimes refers to as the generic address space. The flat address space is a generic address space that can be used access multiple segments of memory with different address spaces. Access of a memory location through a pointer with this address space is expected to be legal but slower compared to the same memory location accessed through a pointer with a different address space. This is for targets with different pointer representations which can be converted with the addrspacecast instruction. If a pointer is converted to this address space, optimizations should attempt to replace the access with the source address space.
Definition at line 252 of file TargetTransformInfo.cpp.
| InstructionCost TargetTransformInfo::getFPOpCost | ( | Type * | Ty | ) | const |
Return the expected cost of supporting the floating point operation of the specified type.
Definition at line 534 of file TargetTransformInfo.cpp.
References assert().
| InstructionCost TargetTransformInfo::getGatherScatterOpCost | ( | unsigned | Opcode, |
| Type * | DataTy, | ||
| const Value * | Ptr, | ||
| bool | VariableMask, | ||
| Align | Alignment, | ||
| TTI::TargetCostKind | CostKind = TTI::TCK_RecipThroughput, |
||
| const Instruction * | I = nullptr |
||
| ) | const |
Opcode - is a type of memory access Load or Store DataTy - a vector type of the data to be loaded or stored Ptr - pointer [or vector of pointers] - address[es] in memory VariableMask - true when the memory access is predicated with a mask that is not a compile-time constant Alignment - alignment of single element I - the optional original context instruction, if one exists, e.g. the load/store to transform or the call to the gather/scatter intrinsic Definition at line 839 of file TargetTransformInfo.cpp.
| int TargetTransformInfo::getGEPCost | ( | Type * | PointeeType, |
| const Value * | Ptr, | ||
| ArrayRef< const Value * > | Operands, | ||
| TTI::TargetCostKind | CostKind = TCK_SizeAndLatency |
||
| ) | const |
Estimate the cost of a GEP operation when lowered.
Definition at line 210 of file TargetTransformInfo.cpp.
References CostKind, and Operands.
Referenced by isGEPFoldable().
| unsigned TargetTransformInfo::getGISelRematGlobalCost | ( | ) | const |
Definition at line 1032 of file TargetTransformInfo.cpp.
Referenced by llvm::TargetLoweringBase::shouldLocalize().
| int TargetTransformInfo::getInlinerVectorBonusPercent | ( | ) | const |
Vector bonuses: We want to more aggressively inline vector-dense kernels and apply this bonus based on the percentage of vector instructions. A bonus is applied if the vector instructions exceed 50% and half that amount is applied if it exceeds 10%. Note that these bonuses are some what arbitrary and evolved over time by accident as much as because they are principled bonuses. FIXME: It would be nice to base the bonus values on something more scientific. A target may has no bonus on vector instructions.
Definition at line 206 of file TargetTransformInfo.cpp.
| unsigned TargetTransformInfo::getInliningThresholdMultiplier | ( | ) | const |
TODO: This is a rather blunt instrument. Perhaps altering the costs of individual classes of instructions would be better.
Definition at line 197 of file TargetTransformInfo.cpp.
|
inline |
Query the cost of a specified instruction.
Clients should use this interface to query the cost of an existing instruction. The instruction must have a valid parent (basic block).
Note, this method does not cache the cost calculation and it can be expensive in some cases.
Definition at line 225 of file TargetTransformInfo.h.
References getUserCost(), I, TCK_CodeSize, TCK_Latency, TCK_RecipThroughput, and TCK_SizeAndLatency.
Referenced by canSplitCallSite(), llvm::OutlinableRegion::getBenefit(), and getOutliningBenefit().
| InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost | ( | unsigned | Opcode, |
| Type * | VecTy, | ||
| unsigned | Factor, | ||
| ArrayRef< unsigned > | Indices, | ||
| Align | Alignment, | ||
| unsigned | AddressSpace, | ||
| TTI::TargetCostKind | CostKind = TTI::TCK_RecipThroughput, |
||
| bool | UseMaskForCond = false, |
||
| bool | UseMaskForGaps = false |
||
| ) | const |
Opcode is the memory operation code VecTy is the vector type of the interleaved access. Factor is the interleave factor Indices is the indices for interleaved load members (as interleaved load allows gaps) Alignment is the alignment of the memory operation AddressSpace is address space of the pointer. UseMaskForCond indicates if the memory access is predicated. UseMaskForGaps indicates if gaps should be masked. Definition at line 848 of file TargetTransformInfo.cpp.
| int TargetTransformInfo::getIntImmCodeSizeCost | ( | unsigned | Opc, |
| unsigned | Idx, | ||
| const APInt & | Imm, | ||
| Type * | Ty | ||
| ) | const |
Return the expected cost for the given integer when optimising for size.
This is different than the other integer immediate cost functions in that it is subtarget agnostic. This is useful when you e.g. target one ISA such as Aarch32 but smaller encodings could be possible with another such as Thumb. This return value is used as a penalty when the total costs for a constant is calculated (the bigger the cost, the more beneficial constant hoisting is).
Definition at line 540 of file TargetTransformInfo.cpp.
References assert().
| int TargetTransformInfo::getIntImmCost | ( | const APInt & | Imm, |
| Type * | Ty, | ||
| TTI::TargetCostKind | CostKind | ||
| ) | const |
Return the expected cost of materializing for the given integer immediate of the specified type.
Definition at line 548 of file TargetTransformInfo.cpp.
References assert(), and CostKind.
Referenced by isSafeAndProfitableToSpeculateAroundPHI(), and tryUnmergingGEPsAcrossIndirectBr().
| int TargetTransformInfo::getIntImmCostInst | ( | unsigned | Opc, |
| unsigned | Idx, | ||
| const APInt & | Imm, | ||
| Type * | Ty, | ||
| TTI::TargetCostKind | CostKind, | ||
| Instruction * | Inst = nullptr |
||
| ) | const |
Return the expected cost of materialization for the given integer immediate of the specified type for a given instruction.
The cost can be zero if the immediate can be folded into the specified instruction.
Definition at line 555 of file TargetTransformInfo.cpp.
References assert(), and CostKind.
Referenced by isSafeAndProfitableToSpeculateAroundPHI().
| int TargetTransformInfo::getIntImmCostIntrin | ( | Intrinsic::ID | IID, |
| unsigned | Idx, | ||
| const APInt & | Imm, | ||
| Type * | Ty, | ||
| TTI::TargetCostKind | CostKind | ||
| ) | const |
Definition at line 565 of file TargetTransformInfo.cpp.
References assert(), and CostKind.
Referenced by isSafeAndProfitableToSpeculateAroundPHI().
| InstructionCost TargetTransformInfo::getIntrinsicInstrCost | ( | const IntrinsicCostAttributes & | ICA, |
| TTI::TargetCostKind | CostKind | ||
| ) | const |
Definition at line 860 of file TargetTransformInfo.cpp.
References assert(), and CostKind.
Referenced by getVectorCallCosts(), and llvm::LoopVectorizationCostModel::getVectorIntrinsicCost().
| unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth | ( | unsigned | AddrSpace | ) | const |
Definition at line 975 of file TargetTransformInfo.cpp.
| unsigned TargetTransformInfo::getLoadVectorFactor | ( | unsigned | VF, |
| unsigned | LoadSize, | ||
| unsigned | ChainSizeInBytes, | ||
| VectorType * | VecTy | ||
| ) | const |
SizeInBytes loads or has a better vector factor. Definition at line 1004 of file TargetTransformInfo.cpp.
| InstructionCost TargetTransformInfo::getMaskedMemoryOpCost | ( | unsigned | Opcode, |
| Type * | Src, | ||
| Align | Alignment, | ||
| unsigned | AddressSpace, | ||
| TTI::TargetCostKind | CostKind = TTI::TCK_RecipThroughput |
||
| ) | const |
Definition at line 830 of file TargetTransformInfo.cpp.
| unsigned TargetTransformInfo::getMaximumVF | ( | unsigned | ElemWidth, |
| unsigned | Opcode | ||
| ) | const |
Definition at line 608 of file TargetTransformInfo.cpp.
Referenced by llvm::slpvectorizer::BoUpSLP::getMaximumVF().
| unsigned TargetTransformInfo::getMaxInterleaveFactor | ( | unsigned | VF | ) | const |
Definition at line 652 of file TargetTransformInfo.cpp.
Referenced by llvm::LoopVectorizePass::runImpl(), and llvm::LoopVectorizationCostModel::selectInterleaveCount().
| unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead | ( | ) | const |
Definition at line 644 of file TargetTransformInfo.cpp.
| Optional< unsigned > TargetTransformInfo::getMaxVScale | ( | ) | const |
Definition at line 595 of file TargetTransformInfo.cpp.
| int TargetTransformInfo::getMemcpyCost | ( | const Instruction * | I | ) | const |
Definition at line 888 of file TargetTransformInfo.cpp.
| Type * TargetTransformInfo::getMemcpyLoopLoweringType | ( | LLVMContext & | Context, |
| Value * | Length, | ||
| unsigned | SrcAddrSpace, | ||
| unsigned | DestAddrSpace, | ||
| unsigned | SrcAlign, | ||
| unsigned | DestAlign | ||
| ) | const |
Definition at line 938 of file TargetTransformInfo.cpp.
References Context.
Referenced by llvm::createMemCpyLoopKnownSize(), and llvm::createMemCpyLoopUnknownSize().
| void TargetTransformInfo::getMemcpyLoopResidualLoweringType | ( | SmallVectorImpl< Type * > & | OpsOut, |
| LLVMContext & | Context, | ||
| unsigned | RemainingBytes, | ||
| unsigned | SrcAddrSpace, | ||
| unsigned | DestAddrSpace, | ||
| unsigned | SrcAlign, | ||
| unsigned | DestAlign | ||
| ) | const |
| [out] | OpsOut | The operand types to copy RemainingBytes of memory. |
| RemainingBytes | The number of bytes to copy. |
Calculates the operand types to use when copying RemainingBytes of memory, where source and destination alignments are SrcAlign and DestAlign respectively.
Definition at line 945 of file TargetTransformInfo.cpp.
References Context.
Referenced by llvm::createMemCpyLoopKnownSize().
| InstructionCost TargetTransformInfo::getMemoryOpCost | ( | unsigned | Opcode, |
| Type * | Src, | ||
| Align | Alignment, | ||
| unsigned | AddressSpace, | ||
| TTI::TargetCostKind | CostKind = TTI::TCK_RecipThroughput, |
||
| const Instruction * | I = nullptr |
||
| ) | const |
Definition at line 819 of file TargetTransformInfo.cpp.
References assert(), CostKind, and I.
Referenced by findCostForOutputBlocks().
| ElementCount TargetTransformInfo::getMinimumVF | ( | unsigned | ElemWidth, |
| bool | IsScalable | ||
| ) | const |
Definition at line 603 of file TargetTransformInfo.cpp.
| InstructionCost TargetTransformInfo::getMinMaxReductionCost | ( | VectorType * | Ty, |
| VectorType * | CondTy, | ||
| bool | IsPairwiseForm, | ||
| bool | IsUnsigned, | ||
| TTI::TargetCostKind | CostKind = TTI::TCK_RecipThroughput |
||
| ) | const |
Definition at line 903 of file TargetTransformInfo.cpp.
| unsigned TargetTransformInfo::getMinPrefetchStride | ( | unsigned | NumMemAccesses, |
| unsigned | NumStridedMemAccesses, | ||
| unsigned | NumPrefetches, | ||
| bool | HasCall | ||
| ) | const |
Some HW prefetchers can handle accesses up to a certain constant stride.
Sometimes prefetching is beneficial even below the HW prefetcher limit, and the arguments provided are meant to serve as a basis for deciding this for a particular loop.
| NumMemAccesses | Number of memory accesses in the loop. |
| NumStridedMemAccesses | Number of the memory accesses that ScalarEvolution could find a known stride for. |
| NumPrefetches | Number of software prefetches that will be emitted as determined by the addresses involved and the cache line size. |
| HasCall | True if the loop contains a call. |
Definition at line 637 of file TargetTransformInfo.cpp.
| unsigned TargetTransformInfo::getMinVectorRegisterBitWidth | ( | ) | const |
Definition at line 591 of file TargetTransformInfo.cpp.
Referenced by llvm::slpvectorizer::BoUpSLP::BoUpSLP().
| unsigned TargetTransformInfo::getNumberOfParts | ( | Type * | Tp | ) | const |
Definition at line 876 of file TargetTransformInfo.cpp.
Referenced by computeExtractCost().
| unsigned TargetTransformInfo::getNumberOfRegisters | ( | unsigned | ClassID | ) | const |
Definition at line 573 of file TargetTransformInfo.cpp.
Referenced by llvm::SLPVectorizerPass::runImpl(), llvm::LoopVectorizePass::runImpl(), and llvm::LoopVectorizationCostModel::selectInterleaveCount().
|
static |
Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
Definition at line 657 of file TargetTransformInfo.cpp.
References E, llvm::getSplatValue(), I, OK_AnyValue, OK_NonUniformConstantValue, OK_UniformConstantValue, OK_UniformValue, OP_None, and OP_PowerOf2.
Referenced by llvm::BasicTTIImplBase< AMDGPUTTIImpl >::getIntrinsicInstrCost(), and llvm::TargetTransformInfoImplCRTPBase< AMDGPUTTIImpl >::getUserCost().
| unsigned TargetTransformInfo::getOperandsScalarizationOverhead | ( | ArrayRef< const Value * > | Args, |
| ArrayRef< Type * > | Tys | ||
| ) | const |
Estimate the overhead of scalarizing an instructions unique non-constant operands.
The (potentially vector) types to use for each of argument are passes via Tys.
Definition at line 481 of file TargetTransformInfo.cpp.
References llvm::AMDGPU::HSAMD::Kernel::Key::Args.
| Value * TargetTransformInfo::getOrCreateResultFromMemIntrinsic | ( | IntrinsicInst * | Inst, |
| Type * | ExpectedType | ||
| ) | const |
Definition at line 933 of file TargetTransformInfo.cpp.
| void TargetTransformInfo::getPeelingPreferences | ( | Loop * | L, |
| ScalarEvolution & | SE, | ||
| PeelingPreferences & | PP | ||
| ) | const |
Get target-customized preferences for the generic loop peeling transformation.
The caller will initialize PP with the current target-independent defaults with information from L and SE.
Definition at line 324 of file TargetTransformInfo.cpp.
Referenced by llvm::gatherPeelingPreferences().
| TargetTransformInfo::PopcntSupportKind TargetTransformInfo::getPopcntSupport | ( | unsigned | IntTyWidthInBit | ) | const |
Return hardware support for population count.
Definition at line 522 of file TargetTransformInfo.cpp.
| BranchProbability TargetTransformInfo::getPredictableBranchThreshold | ( | ) | const |
If a branch or a select condition is skewed in one direction by more than this factor, it is very likely to be predicted correctly.
Definition at line 232 of file TargetTransformInfo.cpp.
Referenced by isFormingBranchFromSelectProfitable(), and shouldFoldCondBranchesToCommonDestination().
| TTI::AddressingModeKind TargetTransformInfo::getPreferredAddressingMode | ( | const Loop * | L, |
| ScalarEvolution * | SE | ||
| ) | const |
Return the preferred addressing mode LSR should make efforts to generate.
Definition at line 370 of file TargetTransformInfo.cpp.
| unsigned TargetTransformInfo::getPrefetchDistance | ( | ) | const |
Definition at line 633 of file TargetTransformInfo.cpp.
| TypeSize TargetTransformInfo::getRegisterBitWidth | ( | TargetTransformInfo::RegisterKind | K | ) | const |
Definition at line 586 of file TargetTransformInfo.cpp.
Referenced by llvm::slpvectorizer::BoUpSLP::BoUpSLP(), and llvm::LoopVectorizationPlanner::planInVPlanNativePath().
| unsigned TargetTransformInfo::getRegisterClassForType | ( | bool | Vector, |
| Type * | Ty = nullptr |
||
| ) | const |
Definition at line 577 of file TargetTransformInfo.cpp.
References Vector.
Referenced by llvm::LoopVectorizationCostModel::calculateRegisterUsage(), llvm::SLPVectorizerPass::runImpl(), and llvm::LoopVectorizePass::runImpl().
| const char * TargetTransformInfo::getRegisterClassName | ( | unsigned | ClassID | ) | const |
Definition at line 582 of file TargetTransformInfo.cpp.
Referenced by llvm::LoopVectorizationCostModel::calculateRegisterUsage(), and llvm::LoopVectorizationCostModel::selectInterleaveCount().
| unsigned TargetTransformInfo::getRegUsageForType | ( | Type * | Ty | ) | const |
Returns the estimated number of registers required to represent Ty.
Definition at line 453 of file TargetTransformInfo.cpp.
| unsigned TargetTransformInfo::getScalarizationOverhead | ( | VectorType * | Ty, |
| const APInt & | DemandedElts, | ||
| bool | Insert, | ||
| bool | Extract | ||
| ) | const |
Estimate the overhead of scalarizing an instruction.
Insert and Extract are set if the demanded result elements need to be inserted and/or extracted from vectors.
Definition at line 475 of file TargetTransformInfo.cpp.
References Insert.
| int TargetTransformInfo::getScalingFactorCost | ( | Type * | Ty, |
| GlobalValue * | BaseGV, | ||
| int64_t | BaseOffset, | ||
| bool | HasBaseReg, | ||
| int64_t | Scale, | ||
| unsigned | AddrSpace = 0 |
||
| ) | const |
Return the cost of the scaling factor used in the addressing mode represented by AM for this target, for a load/store of the specified type.
If the AM is supported, the return value must be >= 0. If the AM is not supported, it returns a negative value. TODO: Handle pre/postinc as well.
Definition at line 425 of file TargetTransformInfo.cpp.
References assert().
Referenced by getScalingFactorCost().
| InstructionCost TargetTransformInfo::getShuffleCost | ( | ShuffleKind | Kind, |
| VectorType * | Tp, | ||
| ArrayRef< int > | Mask = None, |
||
| int | Index = 0, |
||
| VectorType * | SubTp = nullptr |
||
| ) | const |
Definition at line 718 of file TargetTransformInfo.cpp.
References assert(), Index, and llvm::BitmaskEnumDetail::Mask().
Referenced by computeExtractCost().
| unsigned TargetTransformInfo::getStoreVectorFactor | ( | unsigned | VF, |
| unsigned | StoreSize, | ||
| unsigned | ChainSizeInBytes, | ||
| VectorType * | VecTy | ||
| ) | const |
SizeInBytes stores or has a better vector factor. Definition at line 1011 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::getTgtMemIntrinsic | ( | IntrinsicInst * | Inst, |
| MemIntrinsicInfo & | Info | ||
| ) | const |
Definition at line 924 of file TargetTransformInfo.cpp.
References Info.
Referenced by getAccessType(), and isAddressUse().
| void TargetTransformInfo::getUnrollingPreferences | ( | Loop * | L, |
| ScalarEvolution & | SE, | ||
| UnrollingPreferences & | UP | ||
| ) | const |
Get target-customized preferences for the generic loop unrolling transformation.
The caller will initialize UP with the current target-independent defaults.
Definition at line 319 of file TargetTransformInfo.cpp.
Referenced by llvm::gatherUnrollingPreferences().
| InstructionCost TargetTransformInfo::getUserCost | ( | const User * | U, |
| ArrayRef< const Value * > | Operands, | ||
| TargetCostKind | CostKind | ||
| ) | const |
Estimate the cost of a given IR user when lowered.
This can estimate the cost of either a ConstantExpr or Instruction when lowered.
Operands is a list of operands which can be a result of transformations of the current operands. The number of the operands on the list must equal to the number of the current operands the IR user has. Their order on the list must be the same as the order of the current operands the IR user has.
The returned cost is defined in terms of TargetCostConstants, see its comments for a detailed explanation of the cost values.
Definition at line 223 of file TargetTransformInfo.cpp.
References assert(), CostKind, Operands, and TCK_RecipThroughput.
Referenced by llvm::CodeMetrics::analyzeBasicBlock(), analyzeLoopUnrollCost(), checkOuterLoopInsts(), llvm::ComputeSpeculationCost(), computeSpeculationCost(), findProfitablePHIs(), getInstructionCost(), getUserCost(), isFreeInLoop(), mergeConditionalStoreToAddress(), sinkSelectOperand(), and unswitchBestCondition().
|
inline |
This is a helper function which calls the two-argument getUserCost with Operands which are the current operands U has.
Definition at line 325 of file TargetTransformInfo.h.
References CostKind, getUserCost(), llvm::User::operand_values(), and Operands.
| InstructionCost TargetTransformInfo::getVectorInstrCost | ( | unsigned | Opcode, |
| Type * | Val, | ||
| unsigned | Index = -1 |
||
| ) | const |
Definition at line 811 of file TargetTransformInfo.cpp.
References assert(), and Index.
Referenced by llvm::slpvectorizer::BoUpSLP::getTreeCost().
| bool llvm::TargetTransformInfo::hasActiveVectorLength | ( | ) | const |
| bool TargetTransformInfo::hasBranchDivergence | ( | ) | const |
Return true if branch divergence exists.
Branch divergence has a significantly negative impact on GPU performance when threads in the same wavefront take different paths due to conditional branches.
Definition at line 236 of file TargetTransformInfo.cpp.
Referenced by llvm::LoopVectorizationCostModel::computeMaxVF(), llvm::JumpThreadingPass::run(), llvm::SpeculativeExecutionPass::runImpl(), llvm::LegacyDivergenceAnalysis::runOnFunction(), and unswitchLoop().
| bool TargetTransformInfo::hasDivRemOp | ( | Type * | DataType, |
| bool | IsSigned | ||
| ) | const |
Return true if the target has a unified operation to calculate division and remainder.
If so, the additional implicit multiplication and subtraction required to calculate a remainder from division are free. This can enable more aggressive transformations for division and remainder than would typically be allowed using throughput or size cost models.
Definition at line 412 of file TargetTransformInfo.cpp.
Referenced by optimizeDivRem().
| bool TargetTransformInfo::hasVolatileVariant | ( | Instruction * | I, |
| unsigned | AddrSpace | ||
| ) | const |
Return true if the given instruction (assumed to be a memory access instruction) has a volatile variant.
If that's the case then we can avoid addrspacecast to generic AS for volatile loads/stores. Default implementation returns false, which prevents address space inference for volatile loads/stores.
Definition at line 416 of file TargetTransformInfo.cpp.
References I.
Referenced by isSimplePointerUseValidToReplace().
| bool TargetTransformInfo::haveFastSqrt | ( | Type * | Ty | ) | const |
Return true if the hardware has a fast square-root instruction.
Definition at line 526 of file TargetTransformInfo.cpp.
Referenced by runPartiallyInlineLibCalls().
| Optional< Instruction * > TargetTransformInfo::instCombineIntrinsic | ( | InstCombiner & | IC, |
| IntrinsicInst & | II | ||
| ) | const |
Targets can implement their own combinations for target-specific intrinsics.
This function will be called from the InstCombine pass every time a target-specific intrinsic is encountered.
Definition at line 297 of file TargetTransformInfo.cpp.
Referenced by llvm::InstCombiner::targetInstCombineIntrinsic().
|
inline |
Handle the invalidation of this information.
When used as a result of TargetIRAnalysis this method will be called when the function this was computed for changes. When it returns false, the information is preserved across those changes.
Definition at line 197 of file TargetTransformInfo.h.
Definition at line 248 of file TargetTransformInfo.cpp.
Referenced by llvm::DivergenceInfo::DivergenceInfo().
| bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero | ( | Type * | Ty | ) | const |
Return true if it is faster to check if a floating-point value is NaN (or not-NaN) versus a comparison against a constant FP zero value.
Targets should override this if materializing a 0.0 for comparison is generally as cheap as checking for ordered/unordered.
Definition at line 530 of file TargetTransformInfo.cpp.
Referenced by optimizeSQRT().
| bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe | ( | ) | const |
Indicate that it is potentially unsafe to automatically vectorize floating-point operations because the semantics of vector and scalar floating-point semantics may differ.
For example, ARM NEON v7 SIMD math does not support IEEE-754 denormal numbers, while depending on the platform, scalar floating-point math does. This applies to floating-point math operations and calls, not memory operations, shuffles, or casts.
Definition at line 508 of file TargetTransformInfo.cpp.
Referenced by llvm::LoopVectorizePass::processLoop().
| bool TargetTransformInfo::isHardwareLoopProfitable | ( | Loop * | L, |
| ScalarEvolution & | SE, | ||
| AssumptionCache & | AC, | ||
| TargetLibraryInfo * | LibInfo, | ||
| HardwareLoopInfo & | HWLoopInfo | ||
| ) | const |
Query the target whether it would be profitable to convert the given loop into a hardware loop.
Definition at line 279 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::isIndexedLoadLegal | ( | enum MemIndexedMode | Mode, |
| Type * | Ty | ||
| ) | const |
Definition at line 965 of file TargetTransformInfo.cpp.
References Mode.
Referenced by mayUsePostIncMode().
| bool TargetTransformInfo::isIndexedStoreLegal | ( | enum MemIndexedMode | Mode, |
| Type * | Ty | ||
| ) | const |
Definition at line 970 of file TargetTransformInfo.cpp.
References Mode.
Referenced by mayUsePostIncMode().
| bool TargetTransformInfo::isLegalAddImmediate | ( | int64_t | Imm | ) | const |
Return true if the specified immediate is legal add immediate, that is the target has add instructions which can add a register with the immediate without having to materialize the immediate into a register.
Definition at line 329 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::isLegalAddressingMode | ( | Type * | Ty, |
| GlobalValue * | BaseGV, | ||
| int64_t | BaseOffset, | ||
| bool | HasBaseReg, | ||
| int64_t | Scale, | ||
| unsigned | AddrSpace = 0, |
||
| Instruction * | I = nullptr |
||
| ) | const |
Return true if the addressing mode represented by AM is legal for this target, for a load/store of the specified type.
The type may be VoidTy, in which case only return true if the addressing mode is legal for a load/store of any legal type. If target returns true in LSRWithInstrQueries(), I may be valid. TODO: Handle pre/postinc as well.
Definition at line 337 of file TargetTransformInfo.cpp.
References I.
Referenced by isAddFoldable(), and isAMCompletelyFolded().
| bool TargetTransformInfo::isLegalICmpImmediate | ( | int64_t | Imm | ) | const |
Return true if the specified immediate is legal icmp immediate, that is the target has icmp instructions which can compare a register against the immediate without having to materialize the immediate into a register.
Definition at line 333 of file TargetTransformInfo.cpp.
Referenced by isAMCompletelyFolded().
| bool TargetTransformInfo::isLegalMaskedCompressStore | ( | Type * | DataType | ) | const |
Return true if the target supports masked compress store.
Definition at line 404 of file TargetTransformInfo.cpp.
Referenced by optimizeCallInst().
| bool TargetTransformInfo::isLegalMaskedExpandLoad | ( | Type * | DataType | ) | const |
Return true if the target supports masked expand load.
Definition at line 408 of file TargetTransformInfo.cpp.
Referenced by optimizeCallInst().
Return true if the target supports masked gather.
Definition at line 394 of file TargetTransformInfo.cpp.
Referenced by llvm::LoopVectorizationCostModel::isLegalMaskedGather(), and optimizeCallInst().
Return true if the target supports masked load.
Definition at line 380 of file TargetTransformInfo.cpp.
Referenced by llvm::LoopVectorizationCostModel::interleavedAccessCanBeWidened(), llvm::LoopVectorizationCostModel::isLegalMaskedLoad(), and optimizeCallInst().
Return true if the target supports masked scatter.
Definition at line 399 of file TargetTransformInfo.cpp.
Referenced by llvm::LoopVectorizationCostModel::isLegalMaskedScatter(), and optimizeCallInst().
Return true if the target supports masked store.
Definition at line 375 of file TargetTransformInfo.cpp.
Referenced by llvm::LoopVectorizationCostModel::interleavedAccessCanBeWidened(), llvm::LoopVectorizationCostModel::isLegalMaskedStore(), and optimizeCallInst().
Return true if the target supports nontemporal load.
Definition at line 390 of file TargetTransformInfo.cpp.
Return true if the target supports nontemporal store.
Definition at line 385 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::isLegalToVectorizeLoad | ( | LoadInst * | LI | ) | const |
Definition at line 979 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::isLegalToVectorizeLoadChain | ( | unsigned | ChainSizeInBytes, |
| Align | Alignment, | ||
| unsigned | AddrSpace | ||
| ) | const |
Definition at line 987 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::isLegalToVectorizeReduction | ( | RecurrenceDescriptor | RdxDesc, |
| ElementCount | VF | ||
| ) | const |
Definition at line 999 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::isLegalToVectorizeStore | ( | StoreInst * | SI | ) | const |
Definition at line 983 of file TargetTransformInfo.cpp.
References SI.
| bool TargetTransformInfo::isLegalToVectorizeStoreChain | ( | unsigned | ChainSizeInBytes, |
| Align | Alignment, | ||
| unsigned | AddrSpace | ||
| ) | const |
Definition at line 993 of file TargetTransformInfo.cpp.
Test whether calls to a function lower to actual program function calls.
The idea is to test whether the program is likely to require a 'call' instruction or equivalent in order to call the given function.
FIXME: It's not clear that this is a good or useful query API. Client's should probably move to simpler cost metrics using the above. Alternatively, we could split the cost interface into distinct code-size and execution-speed costs. This would allow modelling the core of this query more accurately as a call is a single small instruction, but incurs significant execution cost.
Definition at line 275 of file TargetTransformInfo.cpp.
References F.
Referenced by llvm::CodeMetrics::analyzeBasicBlock(), analyzeLoopUnrollCost(), and runCGProfilePass().
| bool TargetTransformInfo::isLSRCostLess | ( | TargetTransformInfo::LSRCost & | C1, |
| TargetTransformInfo::LSRCost & | C2 | ||
| ) | const |
Return true if LSR cost of C1 is lower than C1.
Definition at line 346 of file TargetTransformInfo.cpp.
References C1.
| bool TargetTransformInfo::isNoopAddrSpaceCast | ( | unsigned | FromAS, |
| unsigned | ToAS | ||
| ) | const |
Definition at line 261 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::isNumRegsMajorCostOfLSR | ( | ) | const |
Return true if LSR major cost is number of registers.
Targets which implement their own isLSRCostLess and unset number of registers as major cost should return false, otherwise return true.
Definition at line 350 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::isProfitableLSRChainElement | ( | Instruction * | I | ) | const |
I. Definition at line 354 of file TargetTransformInfo.cpp.
References I.
Referenced by isProfitableChain().
| bool TargetTransformInfo::isProfitableToHoist | ( | Instruction * | I | ) | const |
Return true if it is profitable to hoist instruction in the then/else to before if.
Definition at line 443 of file TargetTransformInfo.cpp.
References I.
Returns whether V is a source of divergence.
This function provides the target-dependent information for the target-independent LegacyDivergenceAnalysis. LegacyDivergenceAnalysis first builds the dependency graph, and then runs the reachability algorithm starting with the sources of divergence.
Definition at line 244 of file TargetTransformInfo.cpp.
Referenced by llvm::DivergenceInfo::DivergenceInfo().
Return true if it's free to truncate a value of type Ty1 to type Ty2.
e.g. On x86 it's free to truncate a i32 value in register EAX to i16 by referencing its sub-register AX.
Definition at line 439 of file TargetTransformInfo.cpp.
Referenced by llvm::LoopVectorizationCostModel::isOptimizableIVTruncate(), and llvm::SCEVExpander::replaceCongruentIVs().
| bool TargetTransformInfo::isTypeLegal | ( | Type * | Ty | ) | const |
Return true if this type is legal.
Definition at line 449 of file TargetTransformInfo.cpp.
Referenced by llvm::computeMinimumValueSizes(), isLoadCombineCandidateImpl(), and ShouldBuildLookupTable().
| bool TargetTransformInfo::LSRWithInstrQueries | ( | ) | const |
Return true if the loop strength reduce pass should make Instruction* based TTI queries to isLegalAddressingMode().
This is needed on SystemZ, where e.g. a memcpy can only have a 12 bit unsigned immediate offset and no index register.
Definition at line 435 of file TargetTransformInfo.cpp.
Referenced by isAMCompletelyFolded().
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static |
Definition at line 1174 of file TargetTransformInfo.cpp.
References EnableReduxCost, llvm::User::getOperand(), getReductionData(), llvm::ConstantInt::getZExtValue(), llvm::isPowerOf2_32(), llvm::TargetTransformInfo::ReductionData::Kind, llvm::Log2_32(), matchPairwiseReductionAtLevel(), llvm::TargetTransformInfo::ReductionData::Opcode, and RK_None.
Referenced by matchVectorReduction().
|
static |
Definition at line 1319 of file TargetTransformInfo.cpp.
References matchPairwiseReduction(), and matchVectorSplittingReduction().
Referenced by llvm::TargetTransformInfoImplCRTPBase< AMDGPUTTIImpl >::getUserCost().
|
static |
Definition at line 1238 of file TargetTransformInfo.cpp.
References EnableReduxCost, llvm::User::getOperand(), getReductionData(), getShuffleAndOtherOprd(), llvm::ShuffleVectorInst::getShuffleMask(), llvm::Value::getType(), llvm::ConstantInt::getZExtValue(), llvm::TargetTransformInfo::ReductionData::hasSameData(), llvm::isPowerOf2_32(), j(), llvm::TargetTransformInfo::ReductionData::Kind, llvm::TargetTransformInfo::ReductionData::LHS, llvm::BitmaskEnumDetail::Mask(), llvm::TargetTransformInfo::ReductionData::Opcode, llvm::TargetTransformInfo::ReductionData::RHS, and RK_None.
Referenced by matchVectorReduction().
| TargetTransformInfo & TargetTransformInfo::operator= | ( | TargetTransformInfo && | RHS | ) |
Definition at line 192 of file TargetTransformInfo.cpp.
References move.
| bool TargetTransformInfo::preferInLoopReduction | ( | unsigned | Opcode, |
| Type * | Ty, | ||
| ReductionFlags | Flags | ||
| ) | const |
Definition at line 1018 of file TargetTransformInfo.cpp.
Referenced by llvm::LoopVectorizationCostModel::collectInLoopReductions(), and llvm::LoopVectorizationCostModel::getSmallestAndWidestTypes().
| bool TargetTransformInfo::preferPredicatedReductionSelect | ( | unsigned | Opcode, |
| Type * | Ty, | ||
| ReductionFlags | Flags | ||
| ) | const |
As opposed to the normal scheme of p = phi (0, a) which allows the select to be pulled out of the loop. If the select(.., add, ..) can be predicated by the target, this can lead to cleaner code generation.
Definition at line 1023 of file TargetTransformInfo.cpp.
Referenced by llvm::InnerLoopVectorizer::fixReduction().
| bool TargetTransformInfo::preferPredicateOverEpilogue | ( | Loop * | L, |
| LoopInfo * | LI, | ||
| ScalarEvolution & | SE, | ||
| AssumptionCache & | AC, | ||
| TargetLibraryInfo * | TLI, | ||
| DominatorTree * | DT, | ||
| const LoopAccessInfo * | LAI | ||
| ) | const |
Query the target whether it would be prefered to create a predicated vector loop, which can avoid the need to emit a scalar epilogue loop.
Definition at line 285 of file TargetTransformInfo.cpp.
Referenced by getScalarEpilogueLowering().
| bool TargetTransformInfo::prefersVectorizedAddressing | ( | ) | const |
Return true if target doesn't mind addresses in vectors.
Definition at line 421 of file TargetTransformInfo.cpp.
Referenced by llvm::LoopVectorizationCostModel::setCostBasedWideningDecision().
| Value * TargetTransformInfo::rewriteIntrinsicWithAddressSpace | ( | IntrinsicInst * | II, |
| Value * | OldV, | ||
| Value * | NewV | ||
| ) | const |
Rewrite intrinsic call II such that OldV will be replaced with NewV, which has a different address space.
This should happen for every operand index that collectFlatAddressOperands returned for the intrinsic.
II with modified operands). Definition at line 270 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::shouldBuildLookupTables | ( | ) | const |
Return true if switches should be turned into lookup tables for the target.
Definition at line 457 of file TargetTransformInfo.cpp.
Referenced by SwitchToLookupTable().
| bool TargetTransformInfo::shouldBuildLookupTablesForConstant | ( | Constant * | C | ) | const |
Return true if switches should be turned into lookup tables containing this constant value for the target.
Definition at line 461 of file TargetTransformInfo.cpp.
Referenced by ValidLookupTableConstant().
| bool TargetTransformInfo::shouldBuildRelLookupTables | ( | ) | const |
Return true if lookup tables should be turned into relative lookup tables.
Definition at line 466 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::shouldConsiderAddressTypePromotion | ( | const Instruction & | I, |
| bool & | AllowPromotionWithoutCommonHeader | ||
| ) | const |
AllowPromotionWithoutCommonHeader Set true if promoting I is profitable without finding other extensions fed by the same input. Definition at line 613 of file TargetTransformInfo.cpp.
References I.
| bool TargetTransformInfo::shouldExpandReduction | ( | const IntrinsicInst * | II | ) | const |
Definition at line 1028 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::shouldMaximizeVectorBandwidth | ( | ) | const |
Definition at line 599 of file TargetTransformInfo.cpp.
| Optional< Value * > TargetTransformInfo::simplifyDemandedUseBitsIntrinsic | ( | InstCombiner & | IC, |
| IntrinsicInst & | II, | ||
| APInt | DemandedMask, | ||
| KnownBits & | Known, | ||
| bool & | KnownBitsComputed | ||
| ) | const |
Can be used to implement target-specific instruction combining.
Definition at line 302 of file TargetTransformInfo.cpp.
Referenced by llvm::InstCombiner::targetSimplifyDemandedUseBitsIntrinsic().
| Optional< Value * > TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic | ( | InstCombiner & | IC, |
| IntrinsicInst & | II, | ||
| APInt | DemandedElts, | ||
| APInt & | UndefElts, | ||
| APInt & | UndefElts2, | ||
| APInt & | UndefElts3, | ||
| std::function< void(Instruction *, unsigned, APInt, APInt &)> | SimplifyAndSetOp | ||
| ) | const |
Can be used to implement target-specific instruction combining.
Definition at line 309 of file TargetTransformInfo.cpp.
Referenced by llvm::InstCombiner::targetSimplifyDemandedVectorEltsIntrinsic().
| bool TargetTransformInfo::supportsEfficientVectorElementLoadStore | ( | ) | const |
If target has efficient vector element load/store instructions, it can return true here so that insertion/extraction costs are not added to the scalarization cost of a load/store.
Definition at line 486 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::supportsScalableVectors | ( | ) | const |
Definition at line 1036 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::useAA | ( | ) | const |
Definition at line 447 of file TargetTransformInfo.cpp.
| bool TargetTransformInfo::useColdCCForColdCall | ( | Function & | F | ) | const |
Return true if the input function which is cold at all call sites, should use coldcc calling convention.
Definition at line 470 of file TargetTransformInfo.cpp.
References F.
Referenced by OptimizeFunctions().
| bool TargetTransformInfo::useGPUDivergenceAnalysis | ( | ) | const |
Return true if the target prefers to use GPU divergence analysis to replace the legacy version.
Definition at line 240 of file TargetTransformInfo.cpp.
1.8.17