llvm::GCNMaxOccupancySchedStrategy Class Reference

The goal of this scheduling strategy is to maximize kernel occupancy (i.e. More...

#include "Target/AMDGPU/GCNSchedStrategy.h"

Inheritance diagram for llvm::GCNMaxOccupancySchedStrategy:

Public Member Functions
	GCNMaxOccupancySchedStrategy (const MachineSchedContext *C)
Public Member Functions inherited from llvm::GCNSchedStrategy
	GCNSchedStrategy (const MachineSchedContext *C)
SUnit *	pickNode (bool &IsTopNode) override
	Pick the best node to balance the schedule. Implements MachineSchedStrategy.
void	initialize (ScheduleDAGMI *DAG) override
	Initialize the strategy after building the DAG for a new region.
unsigned	getTargetOccupancy ()
void	setTargetOccupancy (unsigned Occ)
GCNSchedStageID	getCurrentStage ()
bool	advanceStage ()
bool	hasNextStage () const
GCNSchedStageID	getNextStage () const
Public Member Functions inherited from llvm::GenericScheduler
	GenericScheduler (const MachineSchedContext *C)
void	initPolicy (MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned NumRegionInstrs) override
	Initialize the per-region scheduling policy.
void	dumpPolicy () const override
bool	shouldTrackPressure () const override
	Check if pressure tracking is needed before building the DAG and initializing this strategy.
bool	shouldTrackLaneMasks () const override
	Returns true if lanemasks should be tracked.
void	initialize (ScheduleDAGMI *dag) override
	Initialize the strategy after building the DAG for a new region.
SUnit *	pickNode (bool &IsTopNode) override
	Pick the best node to balance the schedule. Implements MachineSchedStrategy.
void	schedNode (SUnit *SU, bool IsTopNode) override
	Update the scheduler's state after scheduling a node.
void	releaseTopNode (SUnit *SU) override
	When all predecessor dependencies have been resolved, free this node for top-down scheduling.
void	releaseBottomNode (SUnit *SU) override
	When all successor dependencies have been resolved, free this node for bottom-up scheduling.
void	registerRoots () override
	Notify this strategy that all roots have been released (including those that depend on EntrySU or ExitSU).
Public Member Functions inherited from llvm::MachineSchedStrategy
virtual	~MachineSchedStrategy ()=default
virtual void	initPolicy (MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned NumRegionInstrs)
	Optionally override the per-region scheduling policy.
virtual void	dumpPolicy () const
virtual bool	shouldTrackPressure () const
	Check if pressure tracking is needed before building the DAG and initializing this strategy.
virtual bool	shouldTrackLaneMasks () const
	Returns true if lanemasks should be tracked.
virtual bool	doMBBSchedRegionsTopDown () const
virtual void	initialize (ScheduleDAGMI *DAG)=0
	Initialize the strategy after building the DAG for a new region.
virtual void	enterMBB (MachineBasicBlock *MBB)
	Tell the strategy that MBB is about to be processed.
virtual void	leaveMBB ()
	Tell the strategy that current MBB is done.
virtual void	registerRoots ()
	Notify this strategy that all roots have been released (including those that depend on EntrySU or ExitSU).
virtual SUnit *	pickNode (bool &IsTopNode)=0
	Pick the next node to schedule, or return NULL.
virtual void	scheduleTree (unsigned SubtreeID)
	Scheduler callback to notify that a new subtree is scheduled.
virtual void	schedNode (SUnit *SU, bool IsTopNode)=0
	Notify MachineSchedStrategy that ScheduleDAGMI has scheduled an instruction and updated scheduled/remaining flags in the DAG nodes.
virtual void	releaseTopNode (SUnit *SU)=0
	When all predecessor dependencies have been resolved, free this node for top-down scheduling.
virtual void	releaseBottomNode (SUnit *SU)=0
	When all successor dependencies have been resolved, free this node for bottom-up scheduling.

Additional Inherited Members
Public Types inherited from llvm::GenericSchedulerBase
enum	CandReason : uint8_t {   NoCand , Only1 , PhysReg , RegExcess ,   RegCritical , Stall , Cluster , Weak ,   RegMax , ResourceReduce , ResourceDemand , BotHeightReduce ,   BotPathReduce , TopDepthReduce , TopPathReduce , NextDefUse ,   NodeOrder }
	Represent the type of SchedCandidate found within a single queue. More...
Static Public Member Functions inherited from llvm::GenericSchedulerBase
static const char *	getReasonStr (GenericSchedulerBase::CandReason Reason)
Public Attributes inherited from llvm::GCNSchedStrategy
bool	HasHighPressure
bool	KnownExcessRP = false
unsigned	ErrorMargin = 3
const unsigned	HighRPSGPRBias = 7
const unsigned	HighRPVGPRBias = 7
unsigned	SGPRCriticalLimit
unsigned	VGPRCriticalLimit
unsigned	SGPRLimitBias = 0
unsigned	VGPRLimitBias = 0
Protected Member Functions inherited from llvm::GCNSchedStrategy
SUnit *	pickNodeBidirectional (bool &IsTopNode)
void	pickNodeFromQueue (SchedBoundary &Zone, const CandPolicy &ZonePolicy, const RegPressureTracker &RPTracker, SchedCandidate &Cand)
void	initCandidate (SchedCandidate &Cand, SUnit *SU, bool AtTop, const RegPressureTracker &RPTracker, const SIRegisterInfo *SRI, unsigned SGPRPressure, unsigned VGPRPressure)
Protected Member Functions inherited from llvm::GenericScheduler
void	checkAcyclicLatency ()
	Set IsAcyclicLatencyLimited if the acyclic path is longer than the cyclic critical path by more cycles than it takes to drain the instruction buffer.
void	initCandidate (SchedCandidate &Cand, SUnit *SU, bool AtTop, const RegPressureTracker &RPTracker, RegPressureTracker &TempTracker)
virtual bool	tryCandidate (SchedCandidate &Cand, SchedCandidate &TryCand, SchedBoundary *Zone) const
	Apply a set of heuristics to a new candidate.
SUnit *	pickNodeBidirectional (bool &IsTopNode)
	Pick the best candidate node from either the top or bottom queue.
void	pickNodeFromQueue (SchedBoundary &Zone, const CandPolicy &ZonePolicy, const RegPressureTracker &RPTracker, SchedCandidate &Candidate)
	Pick the best candidate from the queue.
void	reschedulePhysReg (SUnit *SU, bool isTop)
Protected Member Functions inherited from llvm::GenericSchedulerBase
	GenericSchedulerBase (const MachineSchedContext *C)
void	setPolicy (CandPolicy &Policy, bool IsPostRA, SchedBoundary &CurrZone, SchedBoundary *OtherZone)
	Set the CandPolicy given a scheduling zone given the current resources and latencies inside and outside the zone.
void	traceCandidate (const SchedCandidate &Cand)
Protected Attributes inherited from llvm::GCNSchedStrategy
std::vector< unsigned >	Pressure
std::vector< unsigned >	MaxPressure
unsigned	SGPRExcessLimit
unsigned	VGPRExcessLimit
unsigned	TargetOccupancy
MachineFunction *	MF
SmallVector< GCNSchedStageID, 4 >	SchedStages
SmallVectorImpl< GCNSchedStageID >::iterator	CurrentStage = nullptr
Protected Attributes inherited from llvm::GenericScheduler
ScheduleDAGMILive *	DAG = nullptr
MachineSchedPolicy	RegionPolicy
SchedBoundary	Top
SchedBoundary	Bot
SchedCandidate	TopCand
	Candidate last picked from Top boundary.
SchedCandidate	BotCand
	Candidate last picked from Bot boundary.
Protected Attributes inherited from llvm::GenericSchedulerBase
const MachineSchedContext *	Context
const TargetSchedModel *	SchedModel = nullptr
const TargetRegisterInfo *	TRI = nullptr
SchedRemainder	Rem

Detailed Description

The goal of this scheduling strategy is to maximize kernel occupancy (i.e.

maximum number of waves per simd).

Definition at line 123 of file GCNSchedStrategy.h.

Constructor & Destructor Documentation

GCNMaxOccupancySchedStrategy()

GCNMaxOccupancySchedStrategy::GCNMaxOccupancySchedStrategy

(

const MachineSchedContext *

C

)

Definition at line 385 of file GCNSchedStrategy.cpp.

References llvm::ClusteredLowOccupancyReschedule, llvm::OccInitialSchedule, llvm::PreRARematerialize, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::GCNSchedStrategy::SchedStages, and llvm::UnclusteredHighRPReschedule.

---

The documentation for this class was generated from the following files:

• lib/Target/AMDGPU/GCNSchedStrategy.h
• lib/Target/AMDGPU/GCNSchedStrategy.cpp