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13 #ifndef LLVM_LIB_TARGET_AMDGPU_GCNSCHEDSTRATEGY_H
14 #define LLVM_LIB_TARGET_AMDGPU_GCNSCHEDSTRATEGY_H
22 class SIMachineFunctionInfo;
33 SUnit *pickNodeBidirectional(
bool &IsTopNode);
42 unsigned SGPRPressure,
unsigned VGPRPressure);
44 std::vector<unsigned> Pressure;
45 std::vector<unsigned> MaxPressure;
47 unsigned SGPRExcessLimit;
48 unsigned VGPRExcessLimit;
49 unsigned SGPRCriticalLimit;
50 unsigned VGPRCriticalLimit;
52 unsigned TargetOccupancy;
56 bool HasClusteredNodes;
60 bool HasExcessPressure;
79 UnclusteredReschedule,
80 ClusteredLowOccupancyReschedule,
82 LastStage = PreRARematerialize
90 unsigned StartingOccupancy;
93 unsigned MinOccupancy;
129 RematerializableInsts;
143 void collectRematerializableInstructions();
160 void updateRegionBoundaries(
164 bool Removing =
false);
168 std::unique_ptr<MachineSchedStrategy>
S);
177 #endif // LLVM_LIB_TARGET_AMDGPU_GCNSCHEDSTRATEGY_H
This is an optimization pass for GlobalISel generic memory operations.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Track the current register pressure at some position in the instruction stream, and remember the high...
This class implements a map that also provides access to all stored values in a deterministic order.
void finalizeSchedule() override
Allow targets to perform final scheduling actions at the level of the whole MachineFunction.
TargetInstrInfo - Interface to description of machine instruction set.
This is a minimal scheduler strategy.
(vector float) vec_cmpeq(*A, *B) C
Policy for scheduling the next instruction in the candidate's zone.
void setTargetOccupancy(unsigned Occ)
Store the state used by GenericScheduler heuristics, required for the lifetime of one invocation of p...
Representation of each machine instruction.
MachineSchedContext provides enough context from the MachineScheduler pass for the target to instanti...
ScheduleDAGMI is an implementation of ScheduleDAGInstrs that simply schedules machine instructions ac...
MachineInstrBundleIterator< MachineInstr > iterator
void schedule() override
Implement ScheduleDAGInstrs interface for scheduling a sequence of reorderable instructions.
SUnit * pickNode(bool &IsTopNode) override
Pick the best node to balance the schedule. Implements MachineSchedStrategy.
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GCNMaxOccupancySchedStrategy(const MachineSchedContext *C)
void initialize(ScheduleDAGMI *DAG) override
Initialize the strategy after building the DAG for a new region.
const TargetInstrInfo * TII
Target instruction information.
Each Scheduling boundary is associated with ready queues.
This class keeps track of the SPI_SP_INPUT_ADDR config register, which tells the hardware which inter...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Scheduling unit. This is a node in the scheduling DAG.
ScheduleDAGMILive is an implementation of ScheduleDAGInstrs that schedules machine instructions while...
GenericScheduler shrinks the unscheduled zone using heuristics to balance the schedule.
GCNScheduleDAGMILive(MachineSchedContext *C, std::unique_ptr< MachineSchedStrategy > S)