LLVM
15.0.0git
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#include "Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h"
Additional Inherited Members | |
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MCCodeEmitter () | |
Definition at line 30 of file MipsMCCodeEmitter.h.
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inline |
Definition at line 39 of file MipsMCCodeEmitter.h.
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delete |
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overridedefault |
void MipsMCCodeEmitter::EmitByte | ( | unsigned char | C, |
raw_ostream & | OS | ||
) | const |
Definition at line 126 of file MipsMCCodeEmitter.cpp.
Referenced by emitInstruction().
void MipsMCCodeEmitter::emitInstruction | ( | uint64_t | Val, |
unsigned | Size, | ||
const MCSubtargetInfo & | STI, | ||
raw_ostream & | OS | ||
) | const |
Definition at line 130 of file MipsMCCodeEmitter.cpp.
References EmitByte(), i, and Shift.
Referenced by encodeInstruction().
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overridevirtual |
encodeInstruction - Emit the instruction.
Size the instruction with Desc.getSize().
Implements llvm::MCCodeEmitter.
Definition at line 151 of file MipsMCCodeEmitter.cpp.
References emitInstruction(), llvm::MCInstrInfo::get(), getBinaryCodeForInstr(), getMovePRegPairOpValue(), llvm::MCInst::getOpcode(), llvm::MCInstrDesc::getSize(), llvm_unreachable, LowerLargeShift(), MI, N, and llvm::MCInst::setOpcode().
uint64_t llvm::MipsMCCodeEmitter::getBinaryCodeForInstr | ( | const MCInst & | MI, |
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Referenced by encodeInstruction().
unsigned MipsMCCodeEmitter::getBranchTarget21OpValue | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
getBranchTarget21OpValue - Return binary encoding of the branch target operand.
If the machine operand requires relocation, record the relocation and return zero.
Definition at line 388 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_MIPS_PC21_S2, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getBranchTarget21OpValueMM | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
getBranchTarget21OpValueMM - Return binary encoding of the branch target operand for microMIPS.
If the machine operand requires relocation, record the relocation and return zero.
Definition at line 410 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_MICROMIPS_PC21_S1, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getBranchTarget26OpValue | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
getBranchTarget26OpValue - Return binary encoding of the branch target operand.
If the machine operand requires relocation, record the relocation and return zero.
Definition at line 432 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_MIPS_PC26_S2, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getBranchTarget26OpValueMM | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
getBranchTarget26OpValueMM - Return binary encoding of the branch target operand.
If the machine operand requires relocation, record the relocation and return zero.
Definition at line 453 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_MICROMIPS_PC26_S1, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getBranchTarget7OpValueMM | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
getBranchTarget7OpValueMM - Return binary encoding of the microMIPS branch target operand.
If the machine operand requires relocation, record the relocation and return zero.
Definition at line 324 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_PC7_S1, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getBranchTargetOpValue | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
getBranchTargetOpValue - Return binary encoding of the branch target operand.
If the machine operand requires relocation, record the relocation and return zero.
Definition at line 234 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_Mips_PC16, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getBranchTargetOpValue1SImm16 | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
getBranchTargetOpValue1SImm16 - Return binary encoding of the branch target operand.
If the machine operand requires relocation, record the relocation and return zero.
Definition at line 256 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_Mips_PC16, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getBranchTargetOpValueLsl2MMR6 | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
getBranchTargetOpValueLsl2MMR6 - Return binary encoding of the branch target operand.
If the machine operand requires relocation, record the relocation and return zero.
Definition at line 301 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_Mips_PC16, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getBranchTargetOpValueMM | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
getBranchTargetOpValue - Return binary encoding of the microMIPS branch target operand.
If the machine operand requires relocation, record the relocation and return zero.
Definition at line 366 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_PC16_S1, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getBranchTargetOpValueMMPC10 | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
getBranchTargetOpValueMMPC10 - Return binary encoding of the microMIPS 10-bit branch target operand.
If the machine operand requires relocation, record the relocation and return zero.
Definition at line 345 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_PC10_S1, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getBranchTargetOpValueMMR6 | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
getBranchTargetOpValueMMR6 - Return binary encoding of the branch target operand.
If the machine operand requires relocation, record the relocation and return zero.
Definition at line 278 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_Mips_PC16, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getExprOpValue | ( | const MCExpr * | Expr, |
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 588 of file MipsMCCodeEmitter.cpp.
References llvm::MCExpr::Binary, llvm::MCExpr::Constant, llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_CALL16, llvm::Mips::fixup_MICROMIPS_GOT16, llvm::Mips::fixup_MICROMIPS_GOT_DISP, llvm::Mips::fixup_MICROMIPS_GOT_OFST, llvm::Mips::fixup_MICROMIPS_GOT_PAGE, llvm::Mips::fixup_MICROMIPS_GOTTPREL, llvm::Mips::fixup_MICROMIPS_GPOFF_HI, llvm::Mips::fixup_MICROMIPS_GPOFF_LO, llvm::Mips::fixup_MICROMIPS_HI16, llvm::Mips::fixup_MICROMIPS_HIGHER, llvm::Mips::fixup_MICROMIPS_HIGHEST, llvm::Mips::fixup_MICROMIPS_LO16, llvm::Mips::fixup_MICROMIPS_SUB, llvm::Mips::fixup_MICROMIPS_TLS_DTPREL_HI16, llvm::Mips::fixup_MICROMIPS_TLS_DTPREL_LO16, llvm::Mips::fixup_MICROMIPS_TLS_GD, llvm::Mips::fixup_MICROMIPS_TLS_LDM, llvm::Mips::fixup_MICROMIPS_TLS_TPREL_HI16, llvm::Mips::fixup_MICROMIPS_TLS_TPREL_LO16, llvm::Mips::fixup_Mips_CALL16, llvm::Mips::fixup_Mips_CALL_HI16, llvm::Mips::fixup_Mips_CALL_LO16, llvm::Mips::fixup_Mips_DTPREL_HI, llvm::Mips::fixup_Mips_DTPREL_LO, llvm::Mips::fixup_Mips_GOT, llvm::Mips::fixup_Mips_GOT_DISP, llvm::Mips::fixup_Mips_GOT_HI16, llvm::Mips::fixup_Mips_GOT_LO16, llvm::Mips::fixup_Mips_GOT_OFST, llvm::Mips::fixup_Mips_GOT_PAGE, llvm::Mips::fixup_Mips_GOTTPREL, llvm::Mips::fixup_Mips_GPOFF_HI, llvm::Mips::fixup_Mips_GPOFF_LO, llvm::Mips::fixup_Mips_GPREL16, llvm::Mips::fixup_Mips_HI16, llvm::Mips::fixup_Mips_HIGHER, llvm::Mips::fixup_Mips_HIGHEST, llvm::Mips::fixup_Mips_LO16, llvm::Mips::fixup_MIPS_PCHI16, llvm::Mips::fixup_MIPS_PCLO16, llvm::Mips::fixup_Mips_SUB, llvm::Mips::fixup_Mips_TLSGD, llvm::Mips::fixup_Mips_TLSLDM, llvm::Mips::fixup_Mips_TPREL_HI, llvm::Mips::fixup_Mips_TPREL_LO, llvm::FixupKind(), llvm::MipsMCExpr::getKind(), llvm::MCExpr::getKind(), llvm::MCExpr::getLoc(), llvm::MipsMCExpr::getSubExpr(), llvm::MipsMCExpr::isGpOff(), llvm_unreachable, llvm::MipsMCExpr::MEK_CALL_HI16, llvm::MipsMCExpr::MEK_CALL_LO16, llvm::MipsMCExpr::MEK_DTPREL, llvm::MipsMCExpr::MEK_DTPREL_HI, llvm::MipsMCExpr::MEK_DTPREL_LO, llvm::MipsMCExpr::MEK_GOT, llvm::MipsMCExpr::MEK_GOT_CALL, llvm::MipsMCExpr::MEK_GOT_DISP, llvm::MipsMCExpr::MEK_GOT_HI16, llvm::MipsMCExpr::MEK_GOT_LO16, llvm::MipsMCExpr::MEK_GOT_OFST, llvm::MipsMCExpr::MEK_GOT_PAGE, llvm::MipsMCExpr::MEK_GOTTPREL, llvm::MipsMCExpr::MEK_GPREL, llvm::MipsMCExpr::MEK_HI, llvm::MipsMCExpr::MEK_HIGHER, llvm::MipsMCExpr::MEK_HIGHEST, llvm::MipsMCExpr::MEK_LO, llvm::MipsMCExpr::MEK_NEG, llvm::MipsMCExpr::MEK_None, llvm::MipsMCExpr::MEK_PCREL_HI16, llvm::MipsMCExpr::MEK_PCREL_LO16, llvm::MipsMCExpr::MEK_Special, llvm::MipsMCExpr::MEK_TLSGD, llvm::MipsMCExpr::MEK_TLSLDM, llvm::MipsMCExpr::MEK_TPREL_HI, llvm::MipsMCExpr::MEK_TPREL_LO, llvm::MCContext::reportError(), llvm::MCExpr::SymbolRef, and llvm::MCExpr::Target.
Referenced by getMachineOpValue().
unsigned MipsMCCodeEmitter::getJumpOffset16OpValue | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
getJumpOffset16OpValue - Return binary encoding of the jump target operand.
If the machine operand requires relocation, record the relocation and return zero.
Definition at line 476 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_LO16, llvm::Mips::fixup_Mips_LO16, llvm::FixupKind(), llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getJumpTargetOpValue | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
getJumpTargetOpValue - Return binary encoding of the jump target operand.
If the machine operand requires relocation, record the relocation and return zero.
Definition at line 497 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_Mips_26, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getJumpTargetOpValueMM | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 514 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_26_S1, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getMachineOpValue | ( | const MCInst & | MI, |
const MCOperand & | MO, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
getMachineOpValue - Return binary encoding of operand.
If the machine operand requires relocation, record the relocation and return zero.
Definition at line 732 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCOperand::getDFPImm(), llvm::MCRegisterInfo::getEncodingValue(), llvm::MCOperand::getExpr(), getExprOpValue(), llvm::MCOperand::getImm(), llvm::MCOperand::getReg(), llvm::MCContext::getRegisterInfo(), llvm::MCOperand::isDFPImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and llvm::MCOperand::isReg().
Referenced by getMemEncoding(), getMemEncodingMMGPImm7Lsl2(), getMemEncodingMMImm11(), getMemEncodingMMImm12(), getMemEncodingMMImm16(), getMemEncodingMMImm4(), getMemEncodingMMImm4Lsl1(), getMemEncodingMMImm4Lsl2(), getMemEncodingMMImm4sp(), getMemEncodingMMImm9(), getMemEncodingMMSPImm5Lsl2(), getSimm18Lsl3Encoding(), getSimm19Lsl2Encoding(), getSizeInsEncoding(), getUImm5Lsl2Encoding(), and getUImmWithOffsetEncoding().
unsigned MipsMCCodeEmitter::getMemEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Return binary encoding of memory related operand.
If the offset operand requires relocation, record the relocation.
Definition at line 752 of file MipsMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), and MI.
unsigned MipsMCCodeEmitter::getMemEncodingMMGPImm7Lsl2 | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 825 of file MipsMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), and MI.
unsigned MipsMCCodeEmitter::getMemEncodingMMImm11 | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 854 of file MipsMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), and MI.
unsigned MipsMCCodeEmitter::getMemEncodingMMImm12 | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 867 of file MipsMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), and MI.
unsigned MipsMCCodeEmitter::getMemEncodingMMImm16 | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 891 of file MipsMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), and MI.
unsigned MipsMCCodeEmitter::getMemEncodingMMImm4 | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 768 of file MipsMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), and MI.
unsigned MipsMCCodeEmitter::getMemEncodingMMImm4Lsl1 | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 782 of file MipsMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), and MI.
unsigned MipsMCCodeEmitter::getMemEncodingMMImm4Lsl2 | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 796 of file MipsMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), and MI.
unsigned MipsMCCodeEmitter::getMemEncodingMMImm4sp | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 904 of file MipsMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), and MI.
unsigned MipsMCCodeEmitter::getMemEncodingMMImm9 | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 840 of file MipsMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), and MI.
unsigned MipsMCCodeEmitter::getMemEncodingMMSPImm5Lsl2 | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 810 of file MipsMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), and MI.
unsigned MipsMCCodeEmitter::getMovePRegPairOpValue | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 1063 of file MipsMCCodeEmitter.cpp.
References MI.
Referenced by encodeInstruction().
unsigned MipsMCCodeEmitter::getMovePRegSingleOpValue | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 1097 of file MipsMCCodeEmitter.cpp.
References assert(), llvm_unreachable, and MI.
unsigned llvm::MipsMCCodeEmitter::getMSAMemEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
unsigned MipsMCCodeEmitter::getRegisterListOpValue | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 1036 of file MipsMCCodeEmitter.cpp.
References E, llvm::MCRegisterInfo::getEncodingValue(), llvm::MCContext::getRegisterInfo(), I, and MI.
unsigned MipsMCCodeEmitter::getRegisterListOpValue16 | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 1056 of file MipsMCCodeEmitter.cpp.
References MI.
unsigned MipsMCCodeEmitter::getSimm18Lsl3Encoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 977 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_PC18_S3, llvm::Mips::fixup_MIPS_PC18_S3, llvm::FixupKind(), llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getSimm19Lsl2Encoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 955 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_PC19_S2, llvm::Mips::fixup_MIPS_PC19_S2, llvm::FixupKind(), llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getSimm23Lsl2Encoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 1120 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCOperand::getImm(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getSImm3Lsa2Value | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 549 of file MipsMCCodeEmitter.cpp.
References llvm::MCOperand::getImm(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getSImm9AddiuspValue | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 575 of file MipsMCCodeEmitter.cpp.
References llvm::MCOperand::getImm(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getSizeInsEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 932 of file MipsMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), and MI.
unsigned MipsMCCodeEmitter::getUImm3Mod8Encoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 999 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCOperand::getImm(), and MI.
unsigned MipsMCCodeEmitter::getUImm4AndValue | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 1008 of file MipsMCCodeEmitter.cpp.
References assert(), llvm::MCOperand::getImm(), llvm_unreachable, and MI.
unsigned MipsMCCodeEmitter::getUImm5Lsl2Encoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 531 of file MipsMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getUImm6Lsl2Encoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 562 of file MipsMCCodeEmitter.cpp.
References llvm::MCOperand::getImm(), llvm::MCOperand::isImm(), and MI.
unsigned MipsMCCodeEmitter::getUImmWithOffsetEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Subtract Offset then encode as a N-bit unsigned integer.
Definition at line 945 of file MipsMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), and MI.
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delete |