llvm::MipsMCCodeEmitter Class Reference

#include "Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h"

Inheritance diagram for llvm::MipsMCCodeEmitter:

Collaboration diagram for llvm::MipsMCCodeEmitter:

Public Member Functions
	MipsMCCodeEmitter (const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle)
	MipsMCCodeEmitter (const MipsMCCodeEmitter &)=delete
MipsMCCodeEmitter &	operator= (const MipsMCCodeEmitter &)=delete
	~MipsMCCodeEmitter () override=default
void	EmitByte (unsigned char C, raw_ostream &OS) const
void	emitInstruction (uint64_t Val, unsigned Size, const MCSubtargetInfo &STI, raw_ostream &OS) const
void	encodeInstruction (const MCInst &MI, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const override
	encodeInstruction - Emit the instruction. More...
uint64_t	getBinaryCodeForInstr (const MCInst &MI, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getJumpTargetOpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getJumpTargetOpValue - Return binary encoding of the jump target operand. More...
unsigned	getJumpTargetOpValueMM (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getUImm5Lsl2Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getSImm3Lsa2Value (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getUImm6Lsl2Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getSImm9AddiuspValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getBranchTargetOpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTargetOpValue - Return binary encoding of the branch target operand. More...
unsigned	getBranchTargetOpValue1SImm16 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTargetOpValue1SImm16 - Return binary encoding of the branch target operand. More...
unsigned	getBranchTargetOpValueMMR6 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTargetOpValueMMR6 - Return binary encoding of the branch target operand. More...
unsigned	getBranchTargetOpValueLsl2MMR6 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTargetOpValueLsl2MMR6 - Return binary encoding of the branch target operand. More...
unsigned	getBranchTarget7OpValueMM (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTarget7OpValueMM - Return binary encoding of the microMIPS branch target operand. More...
unsigned	getBranchTargetOpValueMMPC10 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTargetOpValueMMPC10 - Return binary encoding of the microMIPS 10-bit branch target operand. More...
unsigned	getBranchTargetOpValueMM (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTargetOpValue - Return binary encoding of the microMIPS branch target operand. More...
unsigned	getBranchTarget21OpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTarget21OpValue - Return binary encoding of the branch target operand. More...
unsigned	getBranchTarget21OpValueMM (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTarget21OpValueMM - Return binary encoding of the branch target operand for microMIPS. More...
unsigned	getBranchTarget26OpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTarget26OpValue - Return binary encoding of the branch target operand. More...
unsigned	getBranchTarget26OpValueMM (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTarget26OpValueMM - Return binary encoding of the branch target operand. More...
unsigned	getJumpOffset16OpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getJumpOffset16OpValue - Return binary encoding of the jump target operand. More...
unsigned	getMachineOpValue (const MCInst &MI, const MCOperand &MO, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getMachineOpValue - Return binary encoding of operand. More...
unsigned	getMSAMemEncoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
template<unsigned ShiftAmount = 0>
unsigned	getMemEncoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	Return binary encoding of memory related operand. More...
unsigned	getMemEncodingMMImm4 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMImm4Lsl1 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMImm4Lsl2 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMSPImm5Lsl2 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMGPImm7Lsl2 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMImm9 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMImm11 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMImm12 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMImm16 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMImm4sp (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getSizeInsEncoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
template<unsigned Bits, int Offset>
unsigned	getUImmWithOffsetEncoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	Subtract Offset then encode as a N-bit unsigned integer. More...
unsigned	getSimm19Lsl2Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getSimm18Lsl3Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getUImm3Mod8Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getUImm4AndValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMovePRegPairOpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMovePRegSingleOpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getSimm23Lsl2Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getExprOpValue (const MCExpr *Expr, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getRegisterListOpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getRegisterListOpValue16 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Public Member Functions inherited from llvm::MCCodeEmitter
	MCCodeEmitter (const MCCodeEmitter &)=delete
MCCodeEmitter &	operator= (const MCCodeEmitter &)=delete
virtual	~MCCodeEmitter ()
virtual void	reset ()
	Lifetime management. More...
virtual void	emitPrefix (const MCInst &Inst, raw_ostream &OS, const MCSubtargetInfo &STI) const
	Emit the prefixes of given instruction on the output stream. More...

Additional Inherited Members
Protected Member Functions inherited from llvm::MCCodeEmitter
	MCCodeEmitter ()

Detailed Description

Definition at line 30 of file MipsMCCodeEmitter.h.

Constructor & Destructor Documentation

MipsMCCodeEmitter() [1/2]

llvm::MipsMCCodeEmitter::MipsMCCodeEmitter ( const MCInstrInfo &  mcii, MCContext &  Ctx_, bool  IsLittle  )

inline

Definition at line 39 of file MipsMCCodeEmitter.h.

MipsMCCodeEmitter() [2/2]

llvm::MipsMCCodeEmitter::MipsMCCodeEmitter ( const MipsMCCodeEmitter &  )

delete

~MipsMCCodeEmitter()

llvm::MipsMCCodeEmitter::~MipsMCCodeEmitter ( )

overridedefault

Member Function Documentation

EmitByte()

void MipsMCCodeEmitter::EmitByte	(	unsigned char	C,
		raw_ostream &	OS
	)		const

Definition at line 126 of file MipsMCCodeEmitter.cpp.

Referenced by emitInstruction().

emitInstruction()

void MipsMCCodeEmitter::emitInstruction	(	uint64_t	Val,
		unsigned	Size,
		const MCSubtargetInfo &	STI,
		raw_ostream &	OS
	)		const

Definition at line 130 of file MipsMCCodeEmitter.cpp.

References EmitByte(), i, and Shift.

Referenced by encodeInstruction().

encodeInstruction()

void MipsMCCodeEmitter::encodeInstruction ( const MCInst &  MI, raw_ostream &  OS, SmallVectorImpl< MCFixup > &  Fixups, const MCSubtargetInfo &  STI  ) const

overridevirtual

encodeInstruction - Emit the instruction.

Size the instruction with Desc.getSize().

Implements llvm::MCCodeEmitter.

Definition at line 151 of file MipsMCCodeEmitter.cpp.

References emitInstruction(), llvm::MCInstrInfo::get(), getBinaryCodeForInstr(), getMovePRegPairOpValue(), llvm::MCInst::getOpcode(), llvm::MCInstrDesc::getSize(), llvm_unreachable, LowerLargeShift(), MI, N, and llvm::MCInst::setOpcode().

getBinaryCodeForInstr()

uint64_t llvm::MipsMCCodeEmitter::getBinaryCodeForInstr	(	const MCInst &	MI,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Referenced by encodeInstruction().

getBranchTarget21OpValue()

unsigned MipsMCCodeEmitter::getBranchTarget21OpValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTarget21OpValue - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 388 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_MIPS_PC21_S2, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getBranchTarget21OpValueMM()

unsigned MipsMCCodeEmitter::getBranchTarget21OpValueMM	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTarget21OpValueMM - Return binary encoding of the branch target operand for microMIPS.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 410 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_MICROMIPS_PC21_S1, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getBranchTarget26OpValue()

unsigned MipsMCCodeEmitter::getBranchTarget26OpValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTarget26OpValue - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 432 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_MIPS_PC26_S2, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getBranchTarget26OpValueMM()

unsigned MipsMCCodeEmitter::getBranchTarget26OpValueMM	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTarget26OpValueMM - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 453 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_MICROMIPS_PC26_S1, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getBranchTarget7OpValueMM()

unsigned MipsMCCodeEmitter::getBranchTarget7OpValueMM	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTarget7OpValueMM - Return binary encoding of the microMIPS branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 324 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_PC7_S1, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getBranchTargetOpValue()

unsigned MipsMCCodeEmitter::getBranchTargetOpValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTargetOpValue - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 234 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_Mips_PC16, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getBranchTargetOpValue1SImm16()

unsigned MipsMCCodeEmitter::getBranchTargetOpValue1SImm16	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTargetOpValue1SImm16 - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 256 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_Mips_PC16, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getBranchTargetOpValueLsl2MMR6()

unsigned MipsMCCodeEmitter::getBranchTargetOpValueLsl2MMR6	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTargetOpValueLsl2MMR6 - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 301 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_Mips_PC16, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getBranchTargetOpValueMM()

unsigned MipsMCCodeEmitter::getBranchTargetOpValueMM	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTargetOpValue - Return binary encoding of the microMIPS branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 366 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_PC16_S1, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getBranchTargetOpValueMMPC10()

unsigned MipsMCCodeEmitter::getBranchTargetOpValueMMPC10	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTargetOpValueMMPC10 - Return binary encoding of the microMIPS 10-bit branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 345 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_PC10_S1, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getBranchTargetOpValueMMR6()

unsigned MipsMCCodeEmitter::getBranchTargetOpValueMMR6	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTargetOpValueMMR6 - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 278 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_Mips_PC16, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getExprOpValue()

unsigned MipsMCCodeEmitter::getExprOpValue	(	const MCExpr *	Expr,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 588 of file MipsMCCodeEmitter.cpp.

References llvm::MCExpr::Binary, llvm::MCExpr::Constant, llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_CALL16, llvm::Mips::fixup_MICROMIPS_GOT16, llvm::Mips::fixup_MICROMIPS_GOT_DISP, llvm::Mips::fixup_MICROMIPS_GOT_OFST, llvm::Mips::fixup_MICROMIPS_GOT_PAGE, llvm::Mips::fixup_MICROMIPS_GOTTPREL, llvm::Mips::fixup_MICROMIPS_GPOFF_HI, llvm::Mips::fixup_MICROMIPS_GPOFF_LO, llvm::Mips::fixup_MICROMIPS_HI16, llvm::Mips::fixup_MICROMIPS_HIGHER, llvm::Mips::fixup_MICROMIPS_HIGHEST, llvm::Mips::fixup_MICROMIPS_LO16, llvm::Mips::fixup_MICROMIPS_SUB, llvm::Mips::fixup_MICROMIPS_TLS_DTPREL_HI16, llvm::Mips::fixup_MICROMIPS_TLS_DTPREL_LO16, llvm::Mips::fixup_MICROMIPS_TLS_GD, llvm::Mips::fixup_MICROMIPS_TLS_LDM, llvm::Mips::fixup_MICROMIPS_TLS_TPREL_HI16, llvm::Mips::fixup_MICROMIPS_TLS_TPREL_LO16, llvm::Mips::fixup_Mips_CALL16, llvm::Mips::fixup_Mips_CALL_HI16, llvm::Mips::fixup_Mips_CALL_LO16, llvm::Mips::fixup_Mips_DTPREL_HI, llvm::Mips::fixup_Mips_DTPREL_LO, llvm::Mips::fixup_Mips_GOT, llvm::Mips::fixup_Mips_GOT_DISP, llvm::Mips::fixup_Mips_GOT_HI16, llvm::Mips::fixup_Mips_GOT_LO16, llvm::Mips::fixup_Mips_GOT_OFST, llvm::Mips::fixup_Mips_GOT_PAGE, llvm::Mips::fixup_Mips_GOTTPREL, llvm::Mips::fixup_Mips_GPOFF_HI, llvm::Mips::fixup_Mips_GPOFF_LO, llvm::Mips::fixup_Mips_GPREL16, llvm::Mips::fixup_Mips_HI16, llvm::Mips::fixup_Mips_HIGHER, llvm::Mips::fixup_Mips_HIGHEST, llvm::Mips::fixup_Mips_LO16, llvm::Mips::fixup_MIPS_PCHI16, llvm::Mips::fixup_MIPS_PCLO16, llvm::Mips::fixup_Mips_SUB, llvm::Mips::fixup_Mips_TLSGD, llvm::Mips::fixup_Mips_TLSLDM, llvm::Mips::fixup_Mips_TPREL_HI, llvm::Mips::fixup_Mips_TPREL_LO, llvm::FixupKind(), llvm::MipsMCExpr::getKind(), llvm::MCExpr::getKind(), llvm::MCExpr::getLoc(), llvm::MipsMCExpr::getSubExpr(), llvm::MipsMCExpr::isGpOff(), llvm_unreachable, llvm::MipsMCExpr::MEK_CALL_HI16, llvm::MipsMCExpr::MEK_CALL_LO16, llvm::MipsMCExpr::MEK_DTPREL, llvm::MipsMCExpr::MEK_DTPREL_HI, llvm::MipsMCExpr::MEK_DTPREL_LO, llvm::MipsMCExpr::MEK_GOT, llvm::MipsMCExpr::MEK_GOT_CALL, llvm::MipsMCExpr::MEK_GOT_DISP, llvm::MipsMCExpr::MEK_GOT_HI16, llvm::MipsMCExpr::MEK_GOT_LO16, llvm::MipsMCExpr::MEK_GOT_OFST, llvm::MipsMCExpr::MEK_GOT_PAGE, llvm::MipsMCExpr::MEK_GOTTPREL, llvm::MipsMCExpr::MEK_GPREL, llvm::MipsMCExpr::MEK_HI, llvm::MipsMCExpr::MEK_HIGHER, llvm::MipsMCExpr::MEK_HIGHEST, llvm::MipsMCExpr::MEK_LO, llvm::MipsMCExpr::MEK_NEG, llvm::MipsMCExpr::MEK_None, llvm::MipsMCExpr::MEK_PCREL_HI16, llvm::MipsMCExpr::MEK_PCREL_LO16, llvm::MipsMCExpr::MEK_Special, llvm::MipsMCExpr::MEK_TLSGD, llvm::MipsMCExpr::MEK_TLSLDM, llvm::MipsMCExpr::MEK_TPREL_HI, llvm::MipsMCExpr::MEK_TPREL_LO, llvm::MCContext::reportError(), llvm::MCExpr::SymbolRef, and llvm::MCExpr::Target.

Referenced by getMachineOpValue().

getJumpOffset16OpValue()

unsigned MipsMCCodeEmitter::getJumpOffset16OpValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getJumpOffset16OpValue - Return binary encoding of the jump target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 476 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_LO16, llvm::Mips::fixup_Mips_LO16, llvm::FixupKind(), llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getJumpTargetOpValue()

unsigned MipsMCCodeEmitter::getJumpTargetOpValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getJumpTargetOpValue - Return binary encoding of the jump target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 497 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_Mips_26, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getJumpTargetOpValueMM()

unsigned MipsMCCodeEmitter::getJumpTargetOpValueMM	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 514 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_26_S1, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getMachineOpValue()

unsigned MipsMCCodeEmitter::getMachineOpValue	(	const MCInst &	MI,
		const MCOperand &	MO,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getMachineOpValue - Return binary encoding of operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 732 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCOperand::getDFPImm(), llvm::MCRegisterInfo::getEncodingValue(), llvm::MCOperand::getExpr(), getExprOpValue(), llvm::MCOperand::getImm(), llvm::MCOperand::getReg(), llvm::MCContext::getRegisterInfo(), llvm::MCOperand::isDFPImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and llvm::MCOperand::isReg().

Referenced by getMemEncoding(), getMemEncodingMMGPImm7Lsl2(), getMemEncodingMMImm11(), getMemEncodingMMImm12(), getMemEncodingMMImm16(), getMemEncodingMMImm4(), getMemEncodingMMImm4Lsl1(), getMemEncodingMMImm4Lsl2(), getMemEncodingMMImm4sp(), getMemEncodingMMImm9(), getMemEncodingMMSPImm5Lsl2(), getSimm18Lsl3Encoding(), getSimm19Lsl2Encoding(), getSizeInsEncoding(), getUImm5Lsl2Encoding(), and getUImmWithOffsetEncoding().

getMemEncoding()

template<unsigned ShiftAmount>

unsigned MipsMCCodeEmitter::getMemEncoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Return binary encoding of memory related operand.

If the offset operand requires relocation, record the relocation.

Definition at line 752 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), and MI.

getMemEncodingMMGPImm7Lsl2()

unsigned MipsMCCodeEmitter::getMemEncodingMMGPImm7Lsl2	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 825 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), and MI.

getMemEncodingMMImm11()

unsigned MipsMCCodeEmitter::getMemEncodingMMImm11	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 854 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), and MI.

getMemEncodingMMImm12()

unsigned MipsMCCodeEmitter::getMemEncodingMMImm12	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 867 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), and MI.

getMemEncodingMMImm16()

unsigned MipsMCCodeEmitter::getMemEncodingMMImm16	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 891 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), and MI.

getMemEncodingMMImm4()

unsigned MipsMCCodeEmitter::getMemEncodingMMImm4	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 768 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), and MI.

getMemEncodingMMImm4Lsl1()

unsigned MipsMCCodeEmitter::getMemEncodingMMImm4Lsl1	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 782 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), and MI.

getMemEncodingMMImm4Lsl2()

unsigned MipsMCCodeEmitter::getMemEncodingMMImm4Lsl2	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 796 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), and MI.

getMemEncodingMMImm4sp()

unsigned MipsMCCodeEmitter::getMemEncodingMMImm4sp	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 904 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), and MI.

getMemEncodingMMImm9()

unsigned MipsMCCodeEmitter::getMemEncodingMMImm9	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 840 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), and MI.

getMemEncodingMMSPImm5Lsl2()

unsigned MipsMCCodeEmitter::getMemEncodingMMSPImm5Lsl2	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 810 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), and MI.

getMovePRegPairOpValue()

unsigned MipsMCCodeEmitter::getMovePRegPairOpValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 1063 of file MipsMCCodeEmitter.cpp.

References MI.

Referenced by encodeInstruction().

getMovePRegSingleOpValue()

unsigned MipsMCCodeEmitter::getMovePRegSingleOpValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 1097 of file MipsMCCodeEmitter.cpp.

References assert(), llvm_unreachable, and MI.

getMSAMemEncoding()

unsigned llvm::MipsMCCodeEmitter::getMSAMemEncoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getRegisterListOpValue()

unsigned MipsMCCodeEmitter::getRegisterListOpValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 1036 of file MipsMCCodeEmitter.cpp.

References E, llvm::MCRegisterInfo::getEncodingValue(), llvm::MCContext::getRegisterInfo(), I, and MI.

getRegisterListOpValue16()

unsigned MipsMCCodeEmitter::getRegisterListOpValue16	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 1056 of file MipsMCCodeEmitter.cpp.

References MI.

getSimm18Lsl3Encoding()

unsigned MipsMCCodeEmitter::getSimm18Lsl3Encoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 977 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_PC18_S3, llvm::Mips::fixup_MIPS_PC18_S3, llvm::FixupKind(), llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getSimm19Lsl2Encoding()

unsigned MipsMCCodeEmitter::getSimm19Lsl2Encoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 955 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_PC19_S2, llvm::Mips::fixup_MIPS_PC19_S2, llvm::FixupKind(), llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getSimm23Lsl2Encoding()

unsigned MipsMCCodeEmitter::getSimm23Lsl2Encoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 1120 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCOperand::getImm(), llvm::MCOperand::isImm(), and MI.

getSImm3Lsa2Value()

unsigned MipsMCCodeEmitter::getSImm3Lsa2Value	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 549 of file MipsMCCodeEmitter.cpp.

References llvm::MCOperand::getImm(), llvm::MCOperand::isImm(), and MI.

getSImm9AddiuspValue()

unsigned MipsMCCodeEmitter::getSImm9AddiuspValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 575 of file MipsMCCodeEmitter.cpp.

References llvm::MCOperand::getImm(), llvm::MCOperand::isImm(), and MI.

getSizeInsEncoding()

unsigned MipsMCCodeEmitter::getSizeInsEncoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 932 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), and MI.

getUImm3Mod8Encoding()

unsigned MipsMCCodeEmitter::getUImm3Mod8Encoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 999 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCOperand::getImm(), and MI.

getUImm4AndValue()

unsigned MipsMCCodeEmitter::getUImm4AndValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 1008 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCOperand::getImm(), llvm_unreachable, and MI.

getUImm5Lsl2Encoding()

unsigned MipsMCCodeEmitter::getUImm5Lsl2Encoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 531 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getUImm6Lsl2Encoding()

unsigned MipsMCCodeEmitter::getUImm6Lsl2Encoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 562 of file MipsMCCodeEmitter.cpp.

References llvm::MCOperand::getImm(), llvm::MCOperand::isImm(), and MI.

getUImmWithOffsetEncoding()

template<unsigned Bits, int Offset>

unsigned MipsMCCodeEmitter::getUImmWithOffsetEncoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Subtract Offset then encode as a N-bit unsigned integer.

Definition at line 945 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), and MI.

operator=()

MipsMCCodeEmitter& llvm::MipsMCCodeEmitter::operator= ( const MipsMCCodeEmitter &  )

delete

---

The documentation for this class was generated from the following files:

• lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
• lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp