LLVM  14.0.0git
MCRegisterInfo.h
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1 //===- MC/MCRegisterInfo.h - Target Register Description --------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file describes an abstract interface used to get information about a
10 // target machines register file. This information is used for a variety of
11 // purposed, especially register allocation.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_MC_MCREGISTERINFO_H
16 #define LLVM_MC_MCREGISTERINFO_H
17 
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/ADT/iterator.h"
21 #include "llvm/MC/LaneBitmask.h"
22 #include "llvm/MC/MCRegister.h"
23 #include <cassert>
24 #include <cstdint>
25 #include <iterator>
26 #include <utility>
27 
28 namespace llvm {
29 
30 /// MCRegisterClass - Base class of TargetRegisterClass.
32 public:
33  using iterator = const MCPhysReg*;
34  using const_iterator = const MCPhysReg*;
35 
37  const uint8_t *const RegSet;
41  const uint16_t ID;
43  const int8_t CopyCost;
44  const bool Allocatable;
45 
46  /// getID() - Return the register class ID number.
47  ///
48  unsigned getID() const { return ID; }
49 
50  /// begin/end - Return all of the registers in this class.
51  ///
52  iterator begin() const { return RegsBegin; }
53  iterator end() const { return RegsBegin + RegsSize; }
54 
55  /// getNumRegs - Return the number of registers in this class.
56  ///
57  unsigned getNumRegs() const { return RegsSize; }
58 
59  /// getRegister - Return the specified register in the class.
60  ///
61  unsigned getRegister(unsigned i) const {
62  assert(i < getNumRegs() && "Register number out of range!");
63  return RegsBegin[i];
64  }
65 
66  /// contains - Return true if the specified register is included in this
67  /// register class. This does not include virtual registers.
68  bool contains(MCRegister Reg) const {
69  unsigned RegNo = unsigned(Reg);
70  unsigned InByte = RegNo % 8;
71  unsigned Byte = RegNo / 8;
72  if (Byte >= RegSetSize)
73  return false;
74  return (RegSet[Byte] & (1 << InByte)) != 0;
75  }
76 
77  /// contains - Return true if both registers are in this class.
78  bool contains(MCRegister Reg1, MCRegister Reg2) const {
79  return contains(Reg1) && contains(Reg2);
80  }
81 
82  /// Return the size of the physical register in bits if we are able to
83  /// determine it. This always returns zero for registers of targets that use
84  /// HW modes, as we need more information to determine the size of registers
85  /// in such cases. Use TargetRegisterInfo to cover them.
86  unsigned getSizeInBits() const { return RegSizeInBits; }
87 
88  /// getCopyCost - Return the cost of copying a value between two registers in
89  /// this class. A negative number means the register class is very expensive
90  /// to copy e.g. status flag register classes.
91  int getCopyCost() const { return CopyCost; }
92 
93  /// isAllocatable - Return true if this register class may be used to create
94  /// virtual registers.
95  bool isAllocatable() const { return Allocatable; }
96 };
97 
98 /// MCRegisterDesc - This record contains information about a particular
99 /// register. The SubRegs field is a zero terminated array of registers that
100 /// are sub-registers of the specific register, e.g. AL, AH are sub-registers
101 /// of AX. The SuperRegs field is a zero terminated array of registers that are
102 /// super-registers of the specific register, e.g. RAX, EAX, are
103 /// super-registers of AX.
104 ///
106  uint32_t Name; // Printable name for the reg (for debugging)
107  uint32_t SubRegs; // Sub-register set, described above
108  uint32_t SuperRegs; // Super-register set, described above
109 
110  // Offset into MCRI::SubRegIndices of a list of sub-register indices for each
111  // sub-register in SubRegs.
113 
114  // RegUnits - Points to the list of register units. The low 4 bits holds the
115  // Scale, the high bits hold an offset into DiffLists. See MCRegUnitIterator.
117 
118  /// Index into list with lane mask sequences. The sequence contains a lanemask
119  /// for every register unit.
121 };
122 
123 /// MCRegisterInfo base class - We assume that the target defines a static
124 /// array of MCRegisterDesc objects that represent all of the machine
125 /// registers that the target has. As such, we simply have to track a pointer
126 /// to this array so that we can turn register number into a register
127 /// descriptor.
128 ///
129 /// Note this class is designed to be a base class of TargetRegisterInfo, which
130 /// is the interface used by codegen. However, specific targets *should never*
131 /// specialize this class. MCRegisterInfo should only contain getters to access
132 /// TableGen generated physical register data. It must not be extended with
133 /// virtual methods.
134 ///
136 public:
138 
139  /// DwarfLLVMRegPair - Emitted by tablegen so Dwarf<->LLVM reg mappings can be
140  /// performed with a binary search.
142  unsigned FromReg;
143  unsigned ToReg;
144 
145  bool operator<(DwarfLLVMRegPair RHS) const { return FromReg < RHS.FromReg; }
146  };
147 
148  /// SubRegCoveredBits - Emitted by tablegen: bit range covered by a subreg
149  /// index, -1 in any being invalid.
153  };
154 
155 private:
156  const MCRegisterDesc *Desc; // Pointer to the descriptor array
157  unsigned NumRegs; // Number of entries in the array
158  MCRegister RAReg; // Return address register
159  MCRegister PCReg; // Program counter register
160  const MCRegisterClass *Classes; // Pointer to the regclass array
161  unsigned NumClasses; // Number of entries in the array
162  unsigned NumRegUnits; // Number of regunits.
163  const MCPhysReg (*RegUnitRoots)[2]; // Pointer to regunit root table.
164  const MCPhysReg *DiffLists; // Pointer to the difflists array
165  const LaneBitmask *RegUnitMaskSequences; // Pointer to lane mask sequences
166  // for register units.
167  const char *RegStrings; // Pointer to the string table.
168  const char *RegClassStrings; // Pointer to the class strings.
169  const uint16_t *SubRegIndices; // Pointer to the subreg lookup
170  // array.
171  const SubRegCoveredBits *SubRegIdxRanges; // Pointer to the subreg covered
172  // bit ranges array.
173  unsigned NumSubRegIndices; // Number of subreg indices.
174  const uint16_t *RegEncodingTable; // Pointer to array of register
175  // encodings.
176 
177  unsigned L2DwarfRegsSize;
178  unsigned EHL2DwarfRegsSize;
179  unsigned Dwarf2LRegsSize;
180  unsigned EHDwarf2LRegsSize;
181  const DwarfLLVMRegPair *L2DwarfRegs; // LLVM to Dwarf regs mapping
182  const DwarfLLVMRegPair *EHL2DwarfRegs; // LLVM to Dwarf regs mapping EH
183  const DwarfLLVMRegPair *Dwarf2LRegs; // Dwarf to LLVM regs mapping
184  const DwarfLLVMRegPair *EHDwarf2LRegs; // Dwarf to LLVM regs mapping EH
185  DenseMap<MCRegister, int> L2SEHRegs; // LLVM to SEH regs mapping
186  DenseMap<MCRegister, int> L2CVRegs; // LLVM to CV regs mapping
187 
188 public:
189  // Forward declaration to become a friend class of DiffListIterator.
190  template <class SubT> class mc_difflist_iterator;
191 
192  /// DiffListIterator - Base iterator class that can traverse the
193  /// differentially encoded register and regunit lists in DiffLists.
194  /// Don't use this class directly, use one of the specialized sub-classes
195  /// defined below.
197  uint16_t Val = 0;
198  const MCPhysReg *List = nullptr;
199 
200  protected:
201  /// Create an invalid iterator. Call init() to point to something useful.
202  DiffListIterator() = default;
203 
204  /// init - Point the iterator to InitVal, decoding subsequent values from
205  /// DiffList. The iterator will initially point to InitVal, sub-classes are
206  /// responsible for skipping the seed value if it is not part of the list.
207  void init(MCPhysReg InitVal, const MCPhysReg *DiffList) {
208  Val = InitVal;
209  List = DiffList;
210  }
211 
212  /// advance - Move to the next list position, return the applied
213  /// differential. This function does not detect the end of the list, that
214  /// is the caller's responsibility (by checking for a 0 return value).
216  assert(isValid() && "Cannot move off the end of the list.");
217  MCPhysReg D = *List++;
218  Val += D;
219  return D;
220  }
221 
222  public:
223  /// isValid - returns true if this iterator is not yet at the end.
224  bool isValid() const { return List; }
225 
226  /// Dereference the iterator to get the value at the current position.
227  MCRegister operator*() const { return Val; }
228 
229  /// Pre-increment to move to the next position.
230  void operator++() {
231  // The end of the list is encoded as a 0 differential.
232  if (!advance())
233  List = nullptr;
234  }
235 
236  template <class SubT> friend class MCRegisterInfo::mc_difflist_iterator;
237  };
238 
239  /// Forward iterator using DiffListIterator.
240  template <class SubT>
242  : public iterator_facade_base<mc_difflist_iterator<SubT>,
243  std::forward_iterator_tag, MCPhysReg> {
245  /// Current value as MCPhysReg, so we can return a reference to it.
246  MCPhysReg Val;
247 
248  protected:
250 
251  // Allow conversion between instantiations where valid.
253  Iter.init(Reg, DiffList);
254  Val = *Iter;
255  }
256 
257  public:
258  // Allow default construction to build variables, but this doesn't build
259  // a useful iterator.
260  mc_difflist_iterator() = default;
261 
262  /// Return an iterator past the last element.
263  static SubT end() {
264  SubT End;
265  End.Iter.List = nullptr;
266  return End;
267  }
268 
269  bool operator==(const mc_difflist_iterator &Arg) const {
270  return Iter.List == Arg.Iter.List;
271  }
272 
273  const MCPhysReg &operator*() const { return Val; }
274 
275  using mc_difflist_iterator::iterator_facade_base::operator++;
276  void operator++() {
277  assert(Iter.List && "Cannot increment the end iterator!");
278  ++Iter;
279  Val = *Iter;
280  }
281  };
282 
283  /// Forward iterator over all sub-registers.
284  /// TODO: Replace remaining uses of MCSubRegIterator.
285  class mc_subreg_iterator : public mc_difflist_iterator<mc_subreg_iterator> {
286  public:
288  : mc_difflist_iterator(Iter) {}
289  mc_subreg_iterator() = default;
291  : mc_difflist_iterator(Reg, MCRI->DiffLists + MCRI->get(Reg).SubRegs) {}
292  };
293 
294  /// Forward iterator over all super-registers.
295  /// TODO: Replace remaining uses of MCSuperRegIterator.
297  : public mc_difflist_iterator<mc_superreg_iterator> {
298  public:
300  : mc_difflist_iterator(Iter) {}
301  mc_superreg_iterator() = default;
304  MCRI->DiffLists + MCRI->get(Reg).SuperRegs) {}
305  };
306 
307  /// Return an iterator range over all sub-registers of \p Reg, excluding \p
308  /// Reg.
310  return make_range(std::next(mc_subreg_iterator(Reg, this)),
312  }
313 
314  /// Return an iterator range over all sub-registers of \p Reg, including \p
315  /// Reg.
317  return make_range({Reg, this}, mc_subreg_iterator::end());
318  }
319 
320  /// Return an iterator range over all super-registers of \p Reg, excluding \p
321  /// Reg.
323  return make_range(std::next(mc_superreg_iterator(Reg, this)),
325  }
326 
327  /// Return an iterator range over all super-registers of \p Reg, including \p
328  /// Reg.
331  return make_range({Reg, this}, mc_superreg_iterator::end());
332  }
333 
334  /// Return an iterator range over all sub- and super-registers of \p Reg,
335  /// including \p Reg.
339  return concat<const MCPhysReg>(subregs_inclusive(Reg), superregs(Reg));
340  }
341 
342  // These iterators are allowed to sub-class DiffListIterator and access
343  // internal list pointers.
344  friend class MCSubRegIterator;
345  friend class MCSubRegIndexIterator;
346  friend class MCSuperRegIterator;
347  friend class MCRegUnitIterator;
348  friend class MCRegUnitMaskIterator;
349  friend class MCRegUnitRootIterator;
350 
351  /// Initialize MCRegisterInfo, called by TableGen
352  /// auto-generated routines. *DO NOT USE*.
353  void InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR, unsigned RA,
354  unsigned PC,
355  const MCRegisterClass *C, unsigned NC,
356  const MCPhysReg (*RURoots)[2],
357  unsigned NRU,
358  const MCPhysReg *DL,
359  const LaneBitmask *RUMS,
360  const char *Strings,
361  const char *ClassStrings,
362  const uint16_t *SubIndices,
363  unsigned NumIndices,
364  const SubRegCoveredBits *SubIdxRanges,
365  const uint16_t *RET) {
366  Desc = D;
367  NumRegs = NR;
368  RAReg = RA;
369  PCReg = PC;
370  Classes = C;
371  DiffLists = DL;
372  RegUnitMaskSequences = RUMS;
373  RegStrings = Strings;
374  RegClassStrings = ClassStrings;
375  NumClasses = NC;
376  RegUnitRoots = RURoots;
377  NumRegUnits = NRU;
378  SubRegIndices = SubIndices;
379  NumSubRegIndices = NumIndices;
380  SubRegIdxRanges = SubIdxRanges;
381  RegEncodingTable = RET;
382 
383  // Initialize DWARF register mapping variables
384  EHL2DwarfRegs = nullptr;
385  EHL2DwarfRegsSize = 0;
386  L2DwarfRegs = nullptr;
387  L2DwarfRegsSize = 0;
388  EHDwarf2LRegs = nullptr;
389  EHDwarf2LRegsSize = 0;
390  Dwarf2LRegs = nullptr;
391  Dwarf2LRegsSize = 0;
392  }
393 
394  /// Used to initialize LLVM register to Dwarf
395  /// register number mapping. Called by TableGen auto-generated routines.
396  /// *DO NOT USE*.
397  void mapLLVMRegsToDwarfRegs(const DwarfLLVMRegPair *Map, unsigned Size,
398  bool isEH) {
399  if (isEH) {
400  EHL2DwarfRegs = Map;
401  EHL2DwarfRegsSize = Size;
402  } else {
403  L2DwarfRegs = Map;
404  L2DwarfRegsSize = Size;
405  }
406  }
407 
408  /// Used to initialize Dwarf register to LLVM
409  /// register number mapping. Called by TableGen auto-generated routines.
410  /// *DO NOT USE*.
411  void mapDwarfRegsToLLVMRegs(const DwarfLLVMRegPair *Map, unsigned Size,
412  bool isEH) {
413  if (isEH) {
414  EHDwarf2LRegs = Map;
415  EHDwarf2LRegsSize = Size;
416  } else {
417  Dwarf2LRegs = Map;
418  Dwarf2LRegsSize = Size;
419  }
420  }
421 
422  /// mapLLVMRegToSEHReg - Used to initialize LLVM register to SEH register
423  /// number mapping. By default the SEH register number is just the same
424  /// as the LLVM register number.
425  /// FIXME: TableGen these numbers. Currently this requires target specific
426  /// initialization code.
427  void mapLLVMRegToSEHReg(MCRegister LLVMReg, int SEHReg) {
428  L2SEHRegs[LLVMReg] = SEHReg;
429  }
430 
431  void mapLLVMRegToCVReg(MCRegister LLVMReg, int CVReg) {
432  L2CVRegs[LLVMReg] = CVReg;
433  }
434 
435  /// This method should return the register where the return
436  /// address can be found.
438  return RAReg;
439  }
440 
441  /// Return the register which is the program counter.
443  return PCReg;
444  }
445 
446  const MCRegisterDesc &operator[](MCRegister RegNo) const {
447  assert(RegNo < NumRegs &&
448  "Attempting to access record for invalid register number!");
449  return Desc[RegNo];
450  }
451 
452  /// Provide a get method, equivalent to [], but more useful with a
453  /// pointer to this object.
454  const MCRegisterDesc &get(MCRegister RegNo) const {
455  return operator[](RegNo);
456  }
457 
458  /// Returns the physical register number of sub-register "Index"
459  /// for physical register RegNo. Return zero if the sub-register does not
460  /// exist.
461  MCRegister getSubReg(MCRegister Reg, unsigned Idx) const;
462 
463  /// Return a super-register of the specified register
464  /// Reg so its sub-register of index SubIdx is Reg.
465  MCRegister getMatchingSuperReg(MCRegister Reg, unsigned SubIdx,
466  const MCRegisterClass *RC) const;
467 
468  /// For a given register pair, return the sub-register index
469  /// if the second register is a sub-register of the first. Return zero
470  /// otherwise.
471  unsigned getSubRegIndex(MCRegister RegNo, MCRegister SubRegNo) const;
472 
473  /// Get the size of the bit range covered by a sub-register index.
474  /// If the index isn't continuous, return the sum of the sizes of its parts.
475  /// If the index is used to access subregisters of different sizes, return -1.
476  unsigned getSubRegIdxSize(unsigned Idx) const;
477 
478  /// Get the offset of the bit range covered by a sub-register index.
479  /// If an Offset doesn't make sense (the index isn't continuous, or is used to
480  /// access sub-registers at different offsets), return -1.
481  unsigned getSubRegIdxOffset(unsigned Idx) const;
482 
483  /// Return the human-readable symbolic target-specific name for the
484  /// specified physical register.
485  const char *getName(MCRegister RegNo) const {
486  return RegStrings + get(RegNo).Name;
487  }
488 
489  /// Return the number of registers this target has (useful for
490  /// sizing arrays holding per register information)
491  unsigned getNumRegs() const {
492  return NumRegs;
493  }
494 
495  /// Return the number of sub-register indices
496  /// understood by the target. Index 0 is reserved for the no-op sub-register,
497  /// while 1 to getNumSubRegIndices() - 1 represent real sub-registers.
498  unsigned getNumSubRegIndices() const {
499  return NumSubRegIndices;
500  }
501 
502  /// Return the number of (native) register units in the
503  /// target. Register units are numbered from 0 to getNumRegUnits() - 1. They
504  /// can be accessed through MCRegUnitIterator defined below.
505  unsigned getNumRegUnits() const {
506  return NumRegUnits;
507  }
508 
509  /// Map a target register to an equivalent dwarf register
510  /// number. Returns -1 if there is no equivalent value. The second
511  /// parameter allows targets to use different numberings for EH info and
512  /// debugging info.
513  int getDwarfRegNum(MCRegister RegNum, bool isEH) const;
514 
515  /// Map a dwarf register back to a target register. Returns None is there is
516  /// no mapping.
517  Optional<unsigned> getLLVMRegNum(unsigned RegNum, bool isEH) const;
518 
519  /// Map a target EH register number to an equivalent DWARF register
520  /// number.
521  int getDwarfRegNumFromDwarfEHRegNum(unsigned RegNum) const;
522 
523  /// Map a target register to an equivalent SEH register
524  /// number. Returns LLVM register number if there is no equivalent value.
525  int getSEHRegNum(MCRegister RegNum) const;
526 
527  /// Map a target register to an equivalent CodeView register
528  /// number.
529  int getCodeViewRegNum(MCRegister RegNum) const;
530 
531  regclass_iterator regclass_begin() const { return Classes; }
532  regclass_iterator regclass_end() const { return Classes+NumClasses; }
535  }
536 
537  unsigned getNumRegClasses() const {
538  return (unsigned)(regclass_end()-regclass_begin());
539  }
540 
541  /// Returns the register class associated with the enumeration
542  /// value. See class MCOperandInfo.
543  const MCRegisterClass& getRegClass(unsigned i) const {
544  assert(i < getNumRegClasses() && "Register Class ID out of range");
545  return Classes[i];
546  }
547 
548  const char *getRegClassName(const MCRegisterClass *Class) const {
549  return RegClassStrings + Class->NameIdx;
550  }
551 
552  /// Returns the encoding for RegNo
554  assert(RegNo < NumRegs &&
555  "Attempting to get encoding for invalid register number!");
556  return RegEncodingTable[RegNo];
557  }
558 
559  /// Returns true if RegB is a sub-register of RegA.
560  bool isSubRegister(MCRegister RegA, MCRegister RegB) const {
561  return isSuperRegister(RegB, RegA);
562  }
563 
564  /// Returns true if RegB is a super-register of RegA.
565  bool isSuperRegister(MCRegister RegA, MCRegister RegB) const;
566 
567  /// Returns true if RegB is a sub-register of RegA or if RegB == RegA.
568  bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const {
569  return isSuperRegisterEq(RegB, RegA);
570  }
571 
572  /// Returns true if RegB is a super-register of RegA or if
573  /// RegB == RegA.
574  bool isSuperRegisterEq(MCRegister RegA, MCRegister RegB) const {
575  return RegA == RegB || isSuperRegister(RegA, RegB);
576  }
577 
578  /// Returns true if RegB is a super-register or sub-register of RegA
579  /// or if RegB == RegA.
581  return isSubRegisterEq(RegA, RegB) || isSuperRegister(RegA, RegB);
582  }
583 };
584 
585 //===----------------------------------------------------------------------===//
586 // Register List Iterators
587 //===----------------------------------------------------------------------===//
588 
589 // MCRegisterInfo provides lists of super-registers, sub-registers, and
590 // aliasing registers. Use these iterator classes to traverse the lists.
591 
592 /// MCSubRegIterator enumerates all sub-registers of Reg.
593 /// If IncludeSelf is set, Reg itself is included in the list.
595 public:
597  bool IncludeSelf = false) {
598  init(Reg, MCRI->DiffLists + MCRI->get(Reg).SubRegs);
599  // Initially, the iterator points to Reg itself.
600  if (!IncludeSelf)
601  ++*this;
602  }
603 };
604 
605 /// Iterator that enumerates the sub-registers of a Reg and the associated
606 /// sub-register indices.
608  MCSubRegIterator SRIter;
609  const uint16_t *SRIndex;
610 
611 public:
612  /// Constructs an iterator that traverses subregisters and their
613  /// associated subregister indices.
615  : SRIter(Reg, MCRI) {
616  SRIndex = MCRI->SubRegIndices + MCRI->get(Reg).SubRegIndices;
617  }
618 
619  /// Returns current sub-register.
621  return *SRIter;
622  }
623 
624  /// Returns sub-register index of the current sub-register.
625  unsigned getSubRegIndex() const {
626  return *SRIndex;
627  }
628 
629  /// Returns true if this iterator is not yet at the end.
630  bool isValid() const { return SRIter.isValid(); }
631 
632  /// Moves to the next position.
633  void operator++() {
634  ++SRIter;
635  ++SRIndex;
636  }
637 };
638 
639 /// MCSuperRegIterator enumerates all super-registers of Reg.
640 /// If IncludeSelf is set, Reg itself is included in the list.
642 public:
643  MCSuperRegIterator() = default;
644 
646  bool IncludeSelf = false) {
647  init(Reg, MCRI->DiffLists + MCRI->get(Reg).SuperRegs);
648  // Initially, the iterator points to Reg itself.
649  if (!IncludeSelf)
650  ++*this;
651  }
652 };
653 
654 // Definition for isSuperRegister. Put it down here since it needs the
655 // iterator defined above in addition to the MCRegisterInfo class itself.
657  for (MCSuperRegIterator I(RegA, this); I.isValid(); ++I)
658  if (*I == RegB)
659  return true;
660  return false;
661 }
662 
663 //===----------------------------------------------------------------------===//
664 // Register Units
665 //===----------------------------------------------------------------------===//
666 
667 // Register units are used to compute register aliasing. Every register has at
668 // least one register unit, but it can have more. Two registers overlap if and
669 // only if they have a common register unit.
670 //
671 // A target with a complicated sub-register structure will typically have many
672 // fewer register units than actual registers. MCRI::getNumRegUnits() returns
673 // the number of register units in the target.
674 
675 // MCRegUnitIterator enumerates a list of register units for Reg. The list is
676 // in ascending numerical order.
678 public:
679  /// MCRegUnitIterator - Create an iterator that traverses the register units
680  /// in Reg.
681  MCRegUnitIterator() = default;
682 
684  assert(Reg && "Null register has no regunits");
686  // Decode the RegUnits MCRegisterDesc field.
687  unsigned RU = MCRI->get(Reg).RegUnits;
688  unsigned Scale = RU & 15;
689  unsigned Offset = RU >> 4;
690 
691  // Initialize the iterator to Reg * Scale, and the List pointer to
692  // DiffLists + Offset.
693  init(Reg * Scale, MCRI->DiffLists + Offset);
694 
695  // That may not be a valid unit, we need to advance by one to get the real
696  // unit number. The first differential can be 0 which would normally
697  // terminate the list, but since we know every register has at least one
698  // unit, we can allow a 0 differential here.
699  advance();
700  }
701 };
702 
703 /// MCRegUnitMaskIterator enumerates a list of register units and their
704 /// associated lane masks for Reg. The register units are in ascending
705 /// numerical order.
707  MCRegUnitIterator RUIter;
708  const LaneBitmask *MaskListIter;
709 
710 public:
711  MCRegUnitMaskIterator() = default;
712 
713  /// Constructs an iterator that traverses the register units and their
714  /// associated LaneMasks in Reg.
716  : RUIter(Reg, MCRI) {
717  uint16_t Idx = MCRI->get(Reg).RegUnitLaneMasks;
718  MaskListIter = &MCRI->RegUnitMaskSequences[Idx];
719  }
720 
721  /// Returns a (RegUnit, LaneMask) pair.
722  std::pair<unsigned,LaneBitmask> operator*() const {
723  return std::make_pair(*RUIter, *MaskListIter);
724  }
725 
726  /// Returns true if this iterator is not yet at the end.
727  bool isValid() const { return RUIter.isValid(); }
728 
729  /// Moves to the next position.
730  void operator++() {
731  ++MaskListIter;
732  ++RUIter;
733  }
734 };
735 
736 // Each register unit has one or two root registers. The complete set of
737 // registers containing a register unit is the union of the roots and their
738 // super-registers. All registers aliasing Unit can be visited like this:
739 //
740 // for (MCRegUnitRootIterator RI(Unit, MCRI); RI.isValid(); ++RI) {
741 // for (MCSuperRegIterator SI(*RI, MCRI, true); SI.isValid(); ++SI)
742 // visit(*SI);
743 // }
744 
745 /// MCRegUnitRootIterator enumerates the root registers of a register unit.
747  uint16_t Reg0 = 0;
748  uint16_t Reg1 = 0;
749 
750 public:
751  MCRegUnitRootIterator() = default;
752 
753  MCRegUnitRootIterator(unsigned RegUnit, const MCRegisterInfo *MCRI) {
754  assert(RegUnit < MCRI->getNumRegUnits() && "Invalid register unit");
755  Reg0 = MCRI->RegUnitRoots[RegUnit][0];
756  Reg1 = MCRI->RegUnitRoots[RegUnit][1];
757  }
758 
759  /// Dereference to get the current root register.
760  unsigned operator*() const {
761  return Reg0;
762  }
763 
764  /// Check if the iterator is at the end of the list.
765  bool isValid() const {
766  return Reg0;
767  }
768 
769  /// Preincrement to move to the next root register.
770  void operator++() {
771  assert(isValid() && "Cannot move off the end of the list.");
772  Reg0 = Reg1;
773  Reg1 = 0;
774  }
775 };
776 
777 /// MCRegAliasIterator enumerates all registers aliasing Reg. If IncludeSelf is
778 /// set, Reg itself is included in the list. This iterator does not guarantee
779 /// any ordering or that entries are unique.
781 private:
782  MCRegister Reg;
783  const MCRegisterInfo *MCRI;
784  bool IncludeSelf;
785 
789 
790 public:
792  bool IncludeSelf)
793  : Reg(Reg), MCRI(MCRI), IncludeSelf(IncludeSelf) {
794  // Initialize the iterators.
795  for (RI = MCRegUnitIterator(Reg, MCRI); RI.isValid(); ++RI) {
796  for (RRI = MCRegUnitRootIterator(*RI, MCRI); RRI.isValid(); ++RRI) {
797  for (SI = MCSuperRegIterator(*RRI, MCRI, true); SI.isValid(); ++SI) {
798  if (!(!IncludeSelf && Reg == *SI))
799  return;
800  }
801  }
802  }
803  }
804 
805  bool isValid() const { return RI.isValid(); }
806 
808  assert(SI.isValid() && "Cannot dereference an invalid iterator.");
809  return *SI;
810  }
811 
812  void advance() {
813  // Assuming SI is valid.
814  ++SI;
815  if (SI.isValid()) return;
816 
817  ++RRI;
818  if (RRI.isValid()) {
819  SI = MCSuperRegIterator(*RRI, MCRI, true);
820  return;
821  }
822 
823  ++RI;
824  if (RI.isValid()) {
825  RRI = MCRegUnitRootIterator(*RI, MCRI);
826  SI = MCSuperRegIterator(*RRI, MCRI, true);
827  }
828  }
829 
830  void operator++() {
831  assert(isValid() && "Cannot move off the end of the list.");
832  do advance();
833  while (!IncludeSelf && isValid() && *SI == Reg);
834  }
835 };
836 
837 } // end namespace llvm
838 
839 #endif // LLVM_MC_MCREGISTERINFO_H
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
llvm::LaneBitmask
Definition: LaneBitmask.h:40
i
i
Definition: README.txt:29
llvm::MCRegisterInfo::getDwarfRegNumFromDwarfEHRegNum
int getDwarfRegNumFromDwarfEHRegNum(unsigned RegNum) const
Map a target EH register number to an equivalent DWARF register number.
Definition: MCRegisterInfo.cpp:95
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::MCRegisterInfo::getName
const char * getName(MCRegister RegNo) const
Return the human-readable symbolic target-specific name for the specified physical register.
Definition: MCRegisterInfo.h:485
llvm::MCSubRegIndexIterator
Iterator that enumerates the sub-registers of a Reg and the associated sub-register indices.
Definition: MCRegisterInfo.h:607
llvm::make_range
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
Definition: iterator_range.h:53
llvm::MCRegisterInfo::mc_superreg_iterator::mc_superreg_iterator
mc_superreg_iterator()=default
llvm::MCRegisterInfo::regclass_end
regclass_iterator regclass_end() const
Definition: MCRegisterInfo.h:532
llvm::MCRegisterDesc
MCRegisterDesc - This record contains information about a particular register.
Definition: MCRegisterInfo.h:105
llvm::MCRegisterInfo::regclass_begin
regclass_iterator regclass_begin() const
Definition: MCRegisterInfo.h:531
llvm::MCRegUnitMaskIterator::isValid
bool isValid() const
Returns true if this iterator is not yet at the end.
Definition: MCRegisterInfo.h:727
llvm::MCRegisterClass::end
iterator end() const
Definition: MCRegisterInfo.h:53
llvm::MCRegisterClass::getNumRegs
unsigned getNumRegs() const
getNumRegs - Return the number of registers in this class.
Definition: MCRegisterInfo.h:57
llvm::MCRegisterInfo::InitMCRegisterInfo
void InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR, unsigned RA, unsigned PC, const MCRegisterClass *C, unsigned NC, const MCPhysReg(*RURoots)[2], unsigned NRU, const MCPhysReg *DL, const LaneBitmask *RUMS, const char *Strings, const char *ClassStrings, const uint16_t *SubIndices, unsigned NumIndices, const SubRegCoveredBits *SubIdxRanges, const uint16_t *RET)
Initialize MCRegisterInfo, called by TableGen auto-generated routines.
Definition: MCRegisterInfo.h:353
llvm::MCRegisterInfo::getMatchingSuperReg
MCRegister getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, const MCRegisterClass *RC) const
Return a super-register of the specified register Reg so its sub-register of index SubIdx is Reg.
Definition: MCRegisterInfo.cpp:24
llvm::MCRegisterClass::getSizeInBits
unsigned getSizeInBits() const
Return the size of the physical register in bits if we are able to determine it.
Definition: MCRegisterInfo.h:86
llvm::MCSuperRegIterator::MCSuperRegIterator
MCSuperRegIterator()=default
llvm::MCRegisterInfo::DiffListIterator::init
void init(MCPhysReg InitVal, const MCPhysReg *DiffList)
init - Point the iterator to InitVal, decoding subsequent values from DiffList.
Definition: MCRegisterInfo.h:207
llvm::MCRegisterInfo::getDwarfRegNum
int getDwarfRegNum(MCRegister RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
Definition: MCRegisterInfo.cpp:68
llvm::MCRegisterInfo::getNumRegs
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
Definition: MCRegisterInfo.h:491
llvm::MCRegUnitMaskIterator::MCRegUnitMaskIterator
MCRegUnitMaskIterator()=default
llvm::MCRegisterInfo::mc_difflist_iterator
Forward iterator using DiffListIterator.
Definition: MCRegisterInfo.h:190
llvm::MCSubRegIndexIterator::getSubRegIndex
unsigned getSubRegIndex() const
Returns sub-register index of the current sub-register.
Definition: MCRegisterInfo.h:625
llvm::MCRegisterInfo::getEncodingValue
uint16_t getEncodingValue(MCRegister RegNo) const
Returns the encoding for RegNo.
Definition: MCRegisterInfo.h:553
DenseMap.h
llvm::MCRegUnitRootIterator::operator++
void operator++()
Preincrement to move to the next root register.
Definition: MCRegisterInfo.h:770
llvm::MCRegisterInfo::sub_and_superregs_inclusive
detail::concat_range< const MCPhysReg, iterator_range< mc_subreg_iterator >, iterator_range< mc_superreg_iterator > > sub_and_superregs_inclusive(MCRegister Reg) const
Return an iterator range over all sub- and super-registers of Reg, including Reg.
Definition: MCRegisterInfo.h:338
llvm::MCRegisterInfo::operator[]
const MCRegisterDesc & operator[](MCRegister RegNo) const
Definition: MCRegisterInfo.h:446
llvm::MCRegisterInfo::mc_subreg_iterator
Forward iterator over all sub-registers.
Definition: MCRegisterInfo.h:285
llvm::Optional< unsigned >
llvm::MCRegisterClass::contains
bool contains(MCRegister Reg) const
contains - Return true if the specified register is included in this register class.
Definition: MCRegisterInfo.h:68
Offset
uint64_t Offset
Definition: ELFObjHandler.cpp:81
llvm::MCRegisterClass::contains
bool contains(MCRegister Reg1, MCRegister Reg2) const
contains - Return true if both registers are in this class.
Definition: MCRegisterInfo.h:78
llvm::MCRegAliasIterator::operator*
MCRegister operator*() const
Definition: MCRegisterInfo.h:807
llvm::MCRegUnitRootIterator::MCRegUnitRootIterator
MCRegUnitRootIterator(unsigned RegUnit, const MCRegisterInfo *MCRI)
Definition: MCRegisterInfo.h:753
llvm::MCRegUnitMaskIterator::operator++
void operator++()
Moves to the next position.
Definition: MCRegisterInfo.h:730
llvm::MCRegisterDesc::RegUnits
uint32_t RegUnits
Definition: MCRegisterInfo.h:116
llvm::MCRegisterInfo::getNumRegUnits
unsigned getNumRegUnits() const
Return the number of (native) register units in the target.
Definition: MCRegisterInfo.h:505
llvm::MCRegisterInfo::getSubReg
MCRegister getSubReg(MCRegister Reg, unsigned Idx) const
Returns the physical register number of sub-register "Index" for physical register RegNo.
Definition: MCRegisterInfo.cpp:32
llvm::MCRegisterClass::Allocatable
const bool Allocatable
Definition: MCRegisterInfo.h:44
llvm::MCRegisterInfo::getNumSubRegIndices
unsigned getNumSubRegIndices() const
Return the number of sub-register indices understood by the target.
Definition: MCRegisterInfo.h:498
llvm::MCRegisterInfo::mc_superreg_iterator::mc_superreg_iterator
mc_superreg_iterator(MCRegister Reg, const MCRegisterInfo *MCRI)
Definition: MCRegisterInfo.h:302
llvm::MCRegisterClass::getCopyCost
int getCopyCost() const
getCopyCost - Return the cost of copying a value between two registers in this class.
Definition: MCRegisterInfo.h:91
llvm::MCRegisterInfo::mapLLVMRegToSEHReg
void mapLLVMRegToSEHReg(MCRegister LLVMReg, int SEHReg)
mapLLVMRegToSEHReg - Used to initialize LLVM register to SEH register number mapping.
Definition: MCRegisterInfo.h:427
llvm::MCRegisterClass
MCRegisterClass - Base class of TargetRegisterClass.
Definition: MCRegisterInfo.h:31
llvm::MCRegisterInfo::subregs
iterator_range< mc_subreg_iterator > subregs(MCRegister Reg) const
Return an iterator range over all sub-registers of Reg, excluding Reg.
Definition: MCRegisterInfo.h:309
llvm::MCRegUnitMaskIterator::MCRegUnitMaskIterator
MCRegUnitMaskIterator(MCRegister Reg, const MCRegisterInfo *MCRI)
Constructs an iterator that traverses the register units and their associated LaneMasks in Reg.
Definition: MCRegisterInfo.h:715
Arg
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
Definition: AMDGPULibCalls.cpp:206
llvm::MCRegisterInfo::getRegClass
const MCRegisterClass & getRegClass(unsigned i) const
Returns the register class associated with the enumeration value.
Definition: MCRegisterInfo.h:543
llvm::MCRegisterClass::RegsBegin
const iterator RegsBegin
Definition: MCRegisterInfo.h:36
llvm::MCRegisterInfo::getSEHRegNum
int getSEHRegNum(MCRegister RegNum) const
Map a target register to an equivalent SEH register number.
Definition: MCRegisterInfo.cpp:109
llvm::MCRegisterInfo::subregs_inclusive
iterator_range< mc_subreg_iterator > subregs_inclusive(MCRegister Reg) const
Return an iterator range over all sub-registers of Reg, including Reg.
Definition: MCRegisterInfo.h:316
llvm::MCRegisterInfo::DwarfLLVMRegPair::FromReg
unsigned FromReg
Definition: MCRegisterInfo.h:142
C
(vector float) vec_cmpeq(*A, *B) C
Definition: README_ALTIVEC.txt:86
llvm::MCSubRegIndexIterator::isValid
bool isValid() const
Returns true if this iterator is not yet at the end.
Definition: MCRegisterInfo.h:630
llvm::MCSuperRegIterator::MCSuperRegIterator
MCSuperRegIterator(MCRegister Reg, const MCRegisterInfo *MCRI, bool IncludeSelf=false)
Definition: MCRegisterInfo.h:645
llvm::MCRegisterInfo::getSubRegIndex
unsigned getSubRegIndex(MCRegister RegNo, MCRegister SubRegNo) const
For a given register pair, return the sub-register index if the second register is a sub-register of ...
Definition: MCRegisterInfo.cpp:44
llvm::MCRegisterInfo::SubRegCoveredBits::Size
uint16_t Size
Definition: MCRegisterInfo.h:152
llvm::MCRegisterInfo::mc_subreg_iterator::mc_subreg_iterator
mc_subreg_iterator(MCRegisterInfo::DiffListIterator Iter)
Definition: MCRegisterInfo.h:287
llvm::MCRegisterClass::getRegister
unsigned getRegister(unsigned i) const
getRegister - Return the specified register in the class.
Definition: MCRegisterInfo.h:61
llvm::MCRegisterInfo::isSubRegisterEq
bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a sub-register of RegA or if RegB == RegA.
Definition: MCRegisterInfo.h:568
llvm::MCRegisterInfo::SubRegCoveredBits
SubRegCoveredBits - Emitted by tablegen: bit range covered by a subreg index, -1 in any being invalid...
Definition: MCRegisterInfo.h:150
llvm::MCRegisterInfo::getNumRegClasses
unsigned getNumRegClasses() const
Definition: MCRegisterInfo.h:537
llvm::MCRegUnitRootIterator::MCRegUnitRootIterator
MCRegUnitRootIterator()=default
MCRegister.h
llvm::MCRegUnitRootIterator::isValid
bool isValid() const
Check if the iterator is at the end of the list.
Definition: MCRegisterInfo.h:765
llvm::MCRegisterInfo::mc_difflist_iterator::mc_difflist_iterator
mc_difflist_iterator(MCRegisterInfo::DiffListIterator Iter)
Definition: MCRegisterInfo.h:249
llvm::MCRegisterClass::RegSetSize
const uint16_t RegSetSize
Definition: MCRegisterInfo.h:40
llvm::MCRegisterInfo::mc_subreg_iterator::mc_subreg_iterator
mc_subreg_iterator(MCRegister Reg, const MCRegisterInfo *MCRI)
Definition: MCRegisterInfo.h:290
llvm::MCRegisterClass::begin
iterator begin() const
begin/end - Return all of the registers in this class.
Definition: MCRegisterInfo.h:52
llvm::MCRegisterInfo::DwarfLLVMRegPair
DwarfLLVMRegPair - Emitted by tablegen so Dwarf<->LLVM reg mappings can be performed with a binary se...
Definition: MCRegisterInfo.h:141
llvm::MCRegisterInfo::mapLLVMRegToCVReg
void mapLLVMRegToCVReg(MCRegister LLVMReg, int CVReg)
Definition: MCRegisterInfo.h:431
llvm::MCRegisterInfo::getLLVMRegNum
Optional< unsigned > getLLVMRegNum(unsigned RegNum, bool isEH) const
Map a dwarf register back to a target register.
Definition: MCRegisterInfo.cpp:81
llvm::MCRegUnitIterator::MCRegUnitIterator
MCRegUnitIterator()=default
MCRegUnitIterator - Create an iterator that traverses the register units in Reg.
llvm::MCSubRegIterator::MCSubRegIterator
MCSubRegIterator(MCRegister Reg, const MCRegisterInfo *MCRI, bool IncludeSelf=false)
Definition: MCRegisterInfo.h:596
llvm::MCRegister::isPhysicalRegister
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
Definition: MCRegister.h:57
D
static GCRegistry::Add< StatepointGC > D("statepoint-example", "an example strategy for statepoint")
llvm::MCRegisterInfo::mc_difflist_iterator::end
static SubT end()
Return an iterator past the last element.
Definition: MCRegisterInfo.h:263
llvm::MCRegUnitMaskIterator
MCRegUnitMaskIterator enumerates a list of register units and their associated lane masks for Reg.
Definition: MCRegisterInfo.h:706
llvm::MCRegisterInfo::mc_difflist_iterator::operator*
const MCPhysReg & operator*() const
Definition: MCRegisterInfo.h:273
llvm::DenseMap
Definition: DenseMap.h:714
iterator.h
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::MCPhysReg
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
Definition: MCRegister.h:20
llvm::iterator_facade_base
CRTP base class which implements the entire standard iterator facade in terms of a minimal subset of ...
Definition: iterator.h:66
llvm::MCRegisterClass::RegSet
const uint8_t *const RegSet
Definition: MCRegisterInfo.h:37
llvm::MCRegisterInfo::DwarfLLVMRegPair::ToReg
unsigned ToReg
Definition: MCRegisterInfo.h:143
llvm::MCSubRegIndexIterator::MCSubRegIndexIterator
MCSubRegIndexIterator(MCRegister Reg, const MCRegisterInfo *MCRI)
Constructs an iterator that traverses subregisters and their associated subregister indices.
Definition: MCRegisterInfo.h:614
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
SI
StandardInstrumentations SI(Debug, VerifyEach)
llvm::MCRegisterInfo::mc_difflist_iterator::mc_difflist_iterator
mc_difflist_iterator(MCRegister Reg, const MCPhysReg *DiffList)
Definition: MCRegisterInfo.h:252
llvm::MCSuperRegIterator
MCSuperRegIterator enumerates all super-registers of Reg.
Definition: MCRegisterInfo.h:641
iterator_range.h
llvm::MCRegisterClass::RegSizeInBits
const uint16_t RegSizeInBits
Definition: MCRegisterInfo.h:42
RA
SI optimize exec mask operations pre RA
Definition: SIOptimizeExecMaskingPreRA.cpp:71
llvm::MCRegUnitMaskIterator::operator*
std::pair< unsigned, LaneBitmask > operator*() const
Returns a (RegUnit, LaneMask) pair.
Definition: MCRegisterInfo.h:722
llvm::MCRegisterInfo::mc_difflist_iterator::mc_difflist_iterator
mc_difflist_iterator()=default
llvm::MCRegisterInfo::mapLLVMRegsToDwarfRegs
void mapLLVMRegsToDwarfRegs(const DwarfLLVMRegPair *Map, unsigned Size, bool isEH)
Used to initialize LLVM register to Dwarf register number mapping.
Definition: MCRegisterInfo.h:397
llvm::MCRegisterInfo::getRARegister
MCRegister getRARegister() const
This method should return the register where the return address can be found.
Definition: MCRegisterInfo.h:437
llvm::MCRegisterClass::NameIdx
const uint32_t NameIdx
Definition: MCRegisterInfo.h:38
llvm::MCRegAliasIterator::MCRegAliasIterator
MCRegAliasIterator(MCRegister Reg, const MCRegisterInfo *MCRI, bool IncludeSelf)
Definition: MCRegisterInfo.h:791
llvm::MCRegisterClass::getID
unsigned getID() const
getID() - Return the register class ID number.
Definition: MCRegisterInfo.h:48
uint32_t
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::MCRegAliasIterator::advance
void advance()
Definition: MCRegisterInfo.h:812
llvm::MCRegisterInfo::get
const MCRegisterDesc & get(MCRegister RegNo) const
Provide a get method, equivalent to [], but more useful with a pointer to this object.
Definition: MCRegisterInfo.h:454
llvm::MCRegisterDesc::RegUnitLaneMasks
uint16_t RegUnitLaneMasks
Index into list with lane mask sequences.
Definition: MCRegisterInfo.h:120
llvm::MCRegisterClass::RegsSize
const uint16_t RegsSize
Definition: MCRegisterInfo.h:39
llvm::MCRegisterInfo
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Definition: MCRegisterInfo.h:135
llvm::MCSubRegIndexIterator::getSubReg
MCRegister getSubReg() const
Returns current sub-register.
Definition: MCRegisterInfo.h:620
llvm::MCRegisterInfo::getRegClassName
const char * getRegClassName(const MCRegisterClass *Class) const
Definition: MCRegisterInfo.h:548
llvm::MCRegisterInfo::DiffListIterator::advance
MCRegister advance()
advance - Move to the next list position, return the applied differential.
Definition: MCRegisterInfo.h:215
llvm::MCRegisterInfo::mc_difflist_iterator::operator++
void operator++()
Definition: MCRegisterInfo.h:276
llvm::MCRegisterInfo::isSuperRegisterEq
bool isSuperRegisterEq(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a super-register of RegA or if RegB == RegA.
Definition: MCRegisterInfo.h:574
llvm::MCRegAliasIterator::operator++
void operator++()
Definition: MCRegisterInfo.h:830
uint16_t
NC
#define NC
Definition: regutils.h:42
llvm::detail::concat_range
Helper to store a sequence of ranges being concatenated and access them.
Definition: STLExtras.h:993
llvm::MCRegisterInfo::DwarfLLVMRegPair::operator<
bool operator<(DwarfLLVMRegPair RHS) const
Definition: MCRegisterInfo.h:145
llvm::ARCISD::RET
@ RET
Definition: ARCISelLowering.h:52
llvm::MCRegisterInfo::getProgramCounter
MCRegister getProgramCounter() const
Return the register which is the program counter.
Definition: MCRegisterInfo.h:442
llvm::MCRegisterClass::CopyCost
const int8_t CopyCost
Definition: MCRegisterInfo.h:43
llvm::MCRegisterInfo::DiffListIterator::operator*
MCRegister operator*() const
Dereference the iterator to get the value at the current position.
Definition: MCRegisterInfo.h:227
llvm::MCRegisterInfo::isSubRegister
bool isSubRegister(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a sub-register of RegA.
Definition: MCRegisterInfo.h:560
llvm::MCRegisterInfo::DiffListIterator::operator++
void operator++()
Pre-increment to move to the next position.
Definition: MCRegisterInfo.h:230
llvm::MCRegisterInfo::mapDwarfRegsToLLVMRegs
void mapDwarfRegsToLLVMRegs(const DwarfLLVMRegPair *Map, unsigned Size, bool isEH)
Used to initialize Dwarf register to LLVM register number mapping.
Definition: MCRegisterInfo.h:411
llvm::MCRegisterInfo::superregs_inclusive
iterator_range< mc_superreg_iterator > superregs_inclusive(MCRegister Reg) const
Return an iterator range over all super-registers of Reg, including Reg.
Definition: MCRegisterInfo.h:330
llvm::MCRegisterInfo::mc_superreg_iterator
Forward iterator over all super-registers.
Definition: MCRegisterInfo.h:296
llvm::tgtok::Class
@ Class
Definition: TGLexer.h:50
llvm::MCSubRegIterator
MCSubRegIterator enumerates all sub-registers of Reg.
Definition: MCRegisterInfo.h:594
llvm::MCRegisterInfo::isSuperRegister
bool isSuperRegister(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a super-register of RegA.
Definition: MCRegisterInfo.h:656
llvm::MCRegisterInfo::superregs
iterator_range< mc_superreg_iterator > superregs(MCRegister Reg) const
Return an iterator range over all super-registers of Reg, excluding Reg.
Definition: MCRegisterInfo.h:322
llvm::MCRegUnitIterator
Definition: MCRegisterInfo.h:677
llvm::MCRegUnitRootIterator
MCRegUnitRootIterator enumerates the root registers of a register unit.
Definition: MCRegisterInfo.h:746
llvm::MCRegAliasIterator::isValid
bool isValid() const
Definition: MCRegisterInfo.h:805
llvm::MCRegisterInfo::mc_difflist_iterator::operator==
bool operator==(const mc_difflist_iterator &Arg) const
Definition: MCRegisterInfo.h:269
llvm::MCRegisterInfo::DiffListIterator::DiffListIterator
DiffListIterator()=default
Create an invalid iterator. Call init() to point to something useful.
List
const NodeList & List
Definition: RDFGraph.cpp:201
llvm::MCRegisterClass::ID
const uint16_t ID
Definition: MCRegisterInfo.h:41
llvm::MCRegisterDesc::Name
uint32_t Name
Definition: MCRegisterInfo.h:106
llvm::MCRegisterInfo::DiffListIterator::isValid
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
Definition: MCRegisterInfo.h:224
LaneBitmask.h
llvm::iterator_range
A range adaptor for a pair of iterators.
Definition: iterator_range.h:30
llvm::MCRegisterInfo::mc_superreg_iterator::mc_superreg_iterator
mc_superreg_iterator(MCRegisterInfo::DiffListIterator Iter)
Definition: MCRegisterInfo.h:299
llvm::MCRegisterDesc::SubRegIndices
uint32_t SubRegIndices
Definition: MCRegisterInfo.h:112
llvm::MCRegisterInfo::getSubRegIdxOffset
unsigned getSubRegIdxOffset(unsigned Idx) const
Get the offset of the bit range covered by a sub-register index.
Definition: MCRegisterInfo.cpp:62
llvm::MCRegisterClass::isAllocatable
bool isAllocatable() const
isAllocatable - Return true if this register class may be used to create virtual registers.
Definition: MCRegisterInfo.h:95
llvm::MCRegUnitIterator::MCRegUnitIterator
MCRegUnitIterator(MCRegister Reg, const MCRegisterInfo *MCRI)
Definition: MCRegisterInfo.h:683
llvm::MCRegisterDesc::SubRegs
uint32_t SubRegs
Definition: MCRegisterInfo.h:107
llvm::MCRegisterInfo::mc_subreg_iterator::mc_subreg_iterator
mc_subreg_iterator()=default
llvm::MCRegisterInfo::getCodeViewRegNum
int getCodeViewRegNum(MCRegister RegNum) const
Map a target register to an equivalent CodeView register number.
Definition: MCRegisterInfo.cpp:115
llvm::MCRegisterInfo::isSuperOrSubRegisterEq
bool isSuperOrSubRegisterEq(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a super-register or sub-register of RegA or if RegB == RegA.
Definition: MCRegisterInfo.h:580
llvm::MCSubRegIndexIterator::operator++
void operator++()
Moves to the next position.
Definition: MCRegisterInfo.h:633
llvm::MCRegUnitRootIterator::operator*
unsigned operator*() const
Dereference to get the current root register.
Definition: MCRegisterInfo.h:760
llvm::MCRegisterInfo::DiffListIterator
DiffListIterator - Base iterator class that can traverse the differentially encoded register and regu...
Definition: MCRegisterInfo.h:196
llvm::MCRegisterInfo::SubRegCoveredBits::Offset
uint16_t Offset
Definition: MCRegisterInfo.h:151
llvm::MCRegisterDesc::SuperRegs
uint32_t SuperRegs
Definition: MCRegisterInfo.h:108
llvm::MCRegisterInfo::regclasses
iterator_range< regclass_iterator > regclasses() const
Definition: MCRegisterInfo.h:533
llvm::MCRegAliasIterator
MCRegAliasIterator enumerates all registers aliasing Reg.
Definition: MCRegisterInfo.h:780
llvm::MCRegister
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:23
llvm::MCRegisterInfo::getSubRegIdxSize
unsigned getSubRegIdxSize(unsigned Idx) const
Get the size of the bit range covered by a sub-register index.
Definition: MCRegisterInfo.cpp:56