LLVM  16.0.0git
ARMTargetParser.h
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1 //===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements a target parser to recognise ARM hardware features
10 // such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_SUPPORT_ARMTARGETPARSER_H
15 #define LLVM_SUPPORT_ARMTARGETPARSER_H
16 
17 #include "llvm/ADT/StringRef.h"
20 #include <vector>
21 
22 namespace llvm {
23 
24 class Triple;
25 
26 namespace ARM {
27 
28 // Arch extension modifiers for CPUs.
29 // Note that this is not the same as the AArch64 list
32  AEK_NONE = 1,
33  AEK_CRC = 1 << 1,
34  AEK_CRYPTO = 1 << 2,
35  AEK_FP = 1 << 3,
36  AEK_HWDIVTHUMB = 1 << 4,
37  AEK_HWDIVARM = 1 << 5,
38  AEK_MP = 1 << 6,
39  AEK_SIMD = 1 << 7,
40  AEK_SEC = 1 << 8,
41  AEK_VIRT = 1 << 9,
42  AEK_DSP = 1 << 10,
43  AEK_FP16 = 1 << 11,
44  AEK_RAS = 1 << 12,
45  AEK_DOTPROD = 1 << 13,
46  AEK_SHA2 = 1 << 14,
47  AEK_AES = 1 << 15,
48  AEK_FP16FML = 1 << 16,
49  AEK_SB = 1 << 17,
50  AEK_FP_DP = 1 << 18,
51  AEK_LOB = 1 << 19,
52  AEK_BF16 = 1 << 20,
53  AEK_I8MM = 1 << 21,
54  AEK_CDECP0 = 1 << 22,
55  AEK_CDECP1 = 1 << 23,
56  AEK_CDECP2 = 1 << 24,
57  AEK_CDECP3 = 1 << 25,
58  AEK_CDECP4 = 1 << 26,
59  AEK_CDECP5 = 1 << 27,
60  AEK_CDECP6 = 1 << 28,
61  AEK_CDECP7 = 1 << 29,
62  AEK_PACBTI = 1 << 30,
63  // Unsupported extensions.
64  AEK_OS = 1ULL << 59,
65  AEK_IWMMXT = 1ULL << 60,
66  AEK_IWMMXT2 = 1ULL << 61,
67  AEK_MAVERICK = 1ULL << 62,
68  AEK_XSCALE = 1ULL << 63,
69 };
70 
71 // List of Arch Extension names.
72 struct ExtName {
77 };
78 
79 const ExtName ARCHExtNames[] = {
80 #define ARM_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \
81  {NAME, ID, FEATURE, NEGFEATURE},
82 #include "ARMTargetParser.def"
83 };
84 
85 // List of HWDiv names (use getHWDivSynonym) and which architectural
86 // features they correspond to (use getHWDivFeatures).
87 const struct {
90 } HWDivNames[] = {
91 #define ARM_HW_DIV_NAME(NAME, ID) {NAME, ID},
92 #include "ARMTargetParser.def"
93 };
94 
95 // Arch names.
96 enum class ArchKind {
97 #define ARM_ARCH(NAME, ID, CPU_ATTR, ARCH_FEATURE, ARCH_ATTR, ARCH_FPU, \
98  ARCH_BASE_EXT) \
99  ID,
100 #include "ARMTargetParser.def"
101 };
102 
103 // List of CPU names and their arches.
104 // The same CPU can have multiple arches and can be default on multiple arches.
105 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
106 // When this becomes table-generated, we'd probably need two tables.
107 struct CpuNames {
110  bool Default; // is $Name the default CPU for $ArchID ?
112 };
113 
114 const CpuNames CPUNames[] = {
115 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
116  {NAME, ARM::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT},
117 #include "ARMTargetParser.def"
118 };
119 
120 // FPU names.
121 enum FPUKind {
122 #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND,
123 #include "ARMTargetParser.def"
125 };
126 
127 // FPU Version
128 enum class FPUVersion {
129  NONE,
130  VFPV2,
131  VFPV3,
132  VFPV3_FP16,
133  VFPV4,
134  VFPV5,
136 };
137 
138 // An FPU name restricts the FPU in one of three ways:
139 enum class FPURestriction {
140  None = 0, ///< No restriction
141  D16, ///< Only 16 D registers
142  SP_D16 ///< Only single-precision instructions, with 16 D registers
143 };
144 
145 // An FPU name implies one of three levels of Neon support:
146 enum class NeonSupportLevel {
147  None = 0, ///< No Neon
148  Neon, ///< Neon
149  Crypto ///< Neon with Crypto
150 };
151 
152 // v6/v7/v8 Profile
153 enum class ProfileKind { INVALID = 0, A, R, M };
154 
155 // List of canonical FPU names (use getFPUSynonym) and which architectural
156 // features they correspond to (use getFPUFeatures).
157 // The entries must appear in the order listed in ARM::FPUKind for correct
158 // indexing
159 struct FPUName {
165 };
166 
167 static const FPUName FPUNames[] = {
168 #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) \
169  {NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION},
170 #include "llvm/Support/ARMTargetParser.def"
171 };
172 
173 // List of canonical arch names (use getArchSynonym).
174 // This table also provides the build attribute fields for CPU arch
175 // and Arch ID, according to the Addenda to the ARM ABI, chapters
176 // 2.4 and 2.3.5.2 respectively.
177 // FIXME: SubArch values were simplified to fit into the expectations
178 // of the triples and are not conforming with their official names.
179 // Check to see if the expectation should be changed.
180 struct ArchNames {
182  StringRef CPUAttr; // CPU class in build attributes.
184  unsigned DefaultFPU;
187  ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
188 
189  // Return ArchFeature without the leading "+".
190  StringRef getSubArch() const { return ArchFeature.substr(1); }
191 };
192 
193 static const ArchNames ARMArchNames[] = {
194 #define ARM_ARCH(NAME, ID, CPU_ATTR, ARCH_FEATURE, ARCH_ATTR, ARCH_FPU, \
195  ARCH_BASE_EXT) \
196  {NAME, CPU_ATTR, ARCH_FEATURE, ARCH_FPU, \
197  ARCH_BASE_EXT, ArchKind::ID, ARCH_ATTR},
198 #include "llvm/Support/ARMTargetParser.def"
199 };
200 
201 inline ArchKind &operator--(ArchKind &Kind) {
202  assert((Kind >= ArchKind::ARMV8A && Kind <= ArchKind::ARMV9_3A) &&
203  "We only expect operator-- to be called with ARMV8/V9");
204  if (Kind == ArchKind::INVALID || Kind == ArchKind::ARMV8A ||
205  Kind == ArchKind::ARMV8_1A || Kind == ArchKind::ARMV9A ||
206  Kind == ArchKind::ARMV8R)
207  Kind = ArchKind::INVALID;
208  else {
209  unsigned KindAsInteger = static_cast<unsigned>(Kind);
210  Kind = static_cast<ArchKind>(--KindAsInteger);
211  }
212  return Kind;
213 }
214 
215 // Information by ID
216 StringRef getFPUName(unsigned FPUKind);
220 
221 bool getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features);
222 bool getHWDivFeatures(uint64_t HWDivKind, std::vector<StringRef> &Features);
223 bool getExtensionFeatures(uint64_t Extensions,
224  std::vector<StringRef> &Features);
225 
227 unsigned getArchAttr(ArchKind AK);
233  std::vector<StringRef> &Features,
234  unsigned &ArgFPUKind);
236 
237 // Information by Name
238 unsigned getDefaultFPU(StringRef CPU, ArchKind AK);
243 
244 // Parser
246 unsigned parseFPU(StringRef FPU);
251 unsigned parseArchVersion(StringRef Arch);
252 
255 
256 /// Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting.
257 ///
258 /// \param Arch the architecture name (e.g., "armv7s"). If it is an empty
259 /// string then the triple's arch name is used.
261 
262 } // namespace ARM
263 } // namespace llvm
264 
265 #endif
llvm::ARM::ArchNames::CPUAttr
StringRef CPUAttr
Definition: ARMTargetParser.h:182
llvm::ARM::FPUVersion::VFPV5
@ VFPV5
llvm::ARM::FK_LAST
@ FK_LAST
Definition: ARMTargetParser.h:124
llvm::ARM::AEK_CDECP3
@ AEK_CDECP3
Definition: ARMTargetParser.h:57
llvm::ARM::ProfileKind::A
@ A
llvm::ARM::CpuNames::Name
StringRef Name
Definition: ARMTargetParser.h:108
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::ARM::ID
uint64_t ID
Definition: ARMTargetParser.h:89
llvm::ARM::FPUKind
FPUKind
Definition: ARMTargetParser.h:121
llvm::ARM::getCanonicalArchName
StringRef getCanonicalArchName(StringRef Arch)
MArch is expected to be of the form (arm|thumb)?(eb)?(v.
Definition: ARMTargetParserCommon.cpp:53
llvm::ARM::AEK_VIRT
@ AEK_VIRT
Definition: ARMTargetParser.h:41
llvm::ARM::AEK_CDECP6
@ AEK_CDECP6
Definition: ARMTargetParser.h:60
llvm::ARM::ArchNames::ArchAttr
ARMBuildAttrs::CPUArch ArchAttr
Definition: ARMTargetParser.h:187
llvm::ARM::FPUName
Definition: ARMTargetParser.h:159
llvm::ARM::FPURestriction
FPURestriction
Definition: ARMTargetParser.h:139
llvm::ARM::getArchName
StringRef getArchName(ArchKind AK)
Definition: ARMTargetParser.cpp:323
StringRef.h
llvm::ARM::AEK_FP
@ AEK_FP
Definition: ARMTargetParser.h:35
ARMTargetParserCommon.h
llvm::ARM::ARCHExtNames
const ExtName ARCHExtNames[]
Definition: ARMTargetParser.h:79
llvm::ARM::ArchNames::ArchBaseExtensions
uint64_t ArchBaseExtensions
Definition: ARMTargetParser.h:185
llvm::ARM::AEK_SIMD
@ AEK_SIMD
Definition: ARMTargetParser.h:39
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
llvm::ARM::parseArchProfile
ProfileKind parseArchProfile(StringRef Arch)
Definition: ARMTargetParser.cpp:145
llvm::ARM::FPUVersion::VFPV4
@ VFPV4
llvm::ARM::AEK_CDECP4
@ AEK_CDECP4
Definition: ARMTargetParser.h:58
llvm::ARM::ProfileKind::INVALID
@ INVALID
llvm::ARM::ArchNames::getSubArch
StringRef getSubArch() const
Definition: ARMTargetParser.h:190
llvm::ARM::ArchExtKind
ArchExtKind
Definition: ARMTargetParser.h:30
llvm::ARM::ProfileKind
ProfileKind
Definition: ARMTargetParser.h:153
llvm::ARM::FPURestriction::SP_D16
@ SP_D16
Only single-precision instructions, with 16 D registers.
llvm::ARM::getCPUAttr
StringRef getCPUAttr(ArchKind AK)
Definition: ARMTargetParser.cpp:327
llvm::StringRef::substr
StringRef substr(size_t Start, size_t N=npos) const
Return a reference to the substring from [Start, Start + N).
Definition: StringRef.h:564
llvm::ARM::getFPUFeatures
bool getFPUFeatures(unsigned FPUKind, std::vector< StringRef > &Features)
Definition: ARMTargetParser.cpp:150
llvm::ARM::FPUName::NeonSupport
NeonSupportLevel NeonSupport
Definition: ARMTargetParser.h:163
llvm::ARM::FPUNames
static const FPUName FPUNames[]
Definition: ARMTargetParser.h:167
llvm::ARM::fillValidCPUArchList
void fillValidCPUArchList(SmallVectorImpl< StringRef > &Values)
Definition: ARMTargetParser.cpp:489
llvm::ARM::ArchNames::ID
ArchKind ID
Definition: ARMTargetParser.h:186
llvm::ARM::ExtName::ID
uint64_t ID
Definition: ARMTargetParser.h:74
llvm::WinEH::EncodingType::ARM
@ ARM
Windows AXP64.
llvm::ARM::ExtName::Name
StringRef Name
Definition: ARMTargetParser.h:73
llvm::ARM::AEK_DSP
@ AEK_DSP
Definition: ARMTargetParser.h:42
llvm::ARM::AEK_CDECP0
@ AEK_CDECP0
Definition: ARMTargetParser.h:54
llvm::ARM::getArchAttr
unsigned getArchAttr(ArchKind AK)
Definition: ARMTargetParser.cpp:335
llvm::ARM::AEK_HWDIVTHUMB
@ AEK_HWDIVTHUMB
Definition: ARMTargetParser.h:36
llvm::ARM::AEK_RAS
@ AEK_RAS
Definition: ARMTargetParser.h:44
llvm::ARM::AEK_DOTPROD
@ AEK_DOTPROD
Definition: ARMTargetParser.h:45
llvm::ARM::AEK_I8MM
@ AEK_I8MM
Definition: ARMTargetParser.h:53
llvm::ARM::FPURestriction::None
@ None
No restriction.
llvm::ARM::AEK_LOB
@ AEK_LOB
Definition: ARMTargetParser.h:51
llvm::ARM::CPUNames
const CpuNames CPUNames[]
Definition: ARMTargetParser.h:114
llvm::ARM::AEK_SHA2
@ AEK_SHA2
Definition: ARMTargetParser.h:46
llvm::ARM::AEK_FP16
@ AEK_FP16
Definition: ARMTargetParser.h:43
llvm::ARM::ExtName
Definition: ARMTargetParser.h:72
llvm::ARM::parseCPUArch
ArchKind parseCPUArch(StringRef CPU)
Definition: ARMTargetParser.cpp:481
llvm::ARM::AEK_MP
@ AEK_MP
Definition: ARMTargetParser.h:38
llvm::ARM::AEK_BF16
@ AEK_BF16
Definition: ARMTargetParser.h:52
llvm::ARM::parseArch
ArchKind parseArch(StringRef Arch)
Definition: ARMTargetParser.cpp:29
llvm::ARM::getDefaultExtensions
uint64_t getDefaultExtensions(StringRef CPU, ArchKind AK)
Definition: ARMTargetParser.cpp:275
llvm::ARM::Name
StringRef Name
Definition: ARMTargetParser.h:88
llvm::ARM::operator--
ArchKind & operator--(ArchKind &Kind)
Definition: ARMTargetParser.h:201
llvm::ARM::NeonSupportLevel
NeonSupportLevel
Definition: ARMTargetParser.h:146
llvm::ARM::appendArchExtFeatures
bool appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, StringRef ArchExt, std::vector< StringRef > &Features, unsigned &ArgFPUKind)
Definition: ARMTargetParser.cpp:394
llvm::ARM::AEK_SB
@ AEK_SB
Definition: ARMTargetParser.h:49
llvm::ARM::AEK_INVALID
@ AEK_INVALID
Definition: ARMTargetParser.h:31
llvm::ARM::FPUName::FPUVer
FPUVersion FPUVer
Definition: ARMTargetParser.h:162
llvm::ARM::AEK_AES
@ AEK_AES
Definition: ARMTargetParser.h:47
llvm::ARM::AEK_HWDIVARM
@ AEK_HWDIVARM
Definition: ARMTargetParser.h:37
llvm::ARM::FPUVersion::VFPV5_FULLFP16
@ VFPV5_FULLFP16
llvm::ARM::FPUVersion::VFPV2
@ VFPV2
llvm::ARM::AEK_FP_DP
@ AEK_FP_DP
Definition: ARMTargetParser.h:50
llvm::ARM::NeonSupportLevel::Neon
@ Neon
Neon.
uint64_t
llvm::ARM::parseHWDiv
uint64_t parseHWDiv(StringRef HWDiv)
Definition: ARMTargetParser.cpp:464
llvm::ARM::AEK_SEC
@ AEK_SEC
Definition: ARMTargetParser.h:40
llvm::ARM::getFPUSynonym
StringRef getFPUSynonym(StringRef FPU)
Definition: ARMTargetParser.cpp:229
llvm::ARM::AEK_XSCALE
@ AEK_XSCALE
Definition: ARMTargetParser.h:68
llvm::ARM::CpuNames
Definition: ARMTargetParser.h:107
llvm::ARM::FPURestriction::D16
@ D16
Only 16 D registers.
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::ARM::AEK_NONE
@ AEK_NONE
Definition: ARMTargetParser.h:32
llvm::ARM::FPUVersion::VFPV3
@ VFPV3
llvm::ARM::parseArchVersion
unsigned parseArchVersion(StringRef Arch)
Definition: ARMTargetParser.cpp:40
llvm::ARM::AEK_CRC
@ AEK_CRC
Definition: ARMTargetParser.h:33
llvm::ARM::NeonSupportLevel::Crypto
@ Crypto
Neon with Crypto.
llvm::ARM::getDefaultFPU
unsigned getDefaultFPU(StringRef CPU, ArchKind AK)
Definition: ARMTargetParser.cpp:264
llvm::ARM::AEK_FP16FML
@ AEK_FP16FML
Definition: ARMTargetParser.h:48
llvm::ARM::FPUVersion::NONE
@ NONE
llvm::ARM::AEK_CDECP7
@ AEK_CDECP7
Definition: ARMTargetParser.h:61
llvm::ARM::getSubArch
StringRef getSubArch(ArchKind AK)
Definition: ARMTargetParser.cpp:331
llvm::ARM::AEK_CDECP2
@ AEK_CDECP2
Definition: ARMTargetParser.h:56
llvm::ARM::AEK_CRYPTO
@ AEK_CRYPTO
Definition: ARMTargetParser.h:34
llvm::ARM::CpuNames::DefaultExtensions
uint64_t DefaultExtensions
Definition: ARMTargetParser.h:111
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
llvm::ARM::AEK_CDECP1
@ AEK_CDECP1
Definition: ARMTargetParser.h:55
llvm::ARM::ProfileKind::R
@ R
llvm::ARM::FPUName::Name
StringRef Name
Definition: ARMTargetParser.h:160
llvm::ARM::getHWDivFeatures
bool getHWDivFeatures(uint64_t HWDivKind, std::vector< StringRef > &Features)
Definition: ARMTargetParser.cpp:288
llvm::ARM::convertV9toV8
ArchKind convertV9toV8(ArchKind AK)
Definition: ARMTargetParser.cpp:438
llvm::ARM::ArchNames::Name
StringRef Name
Definition: ARMTargetParser.h:181
llvm::ARM::getFPUNeonSupportLevel
NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind)
Definition: ARMTargetParser.cpp:223
llvm::ARM::AEK_IWMMXT2
@ AEK_IWMMXT2
Definition: ARMTargetParser.h:66
llvm::ARM::getDefaultCPU
StringRef getDefaultCPU(StringRef Arch)
Definition: ARMTargetParser.cpp:449
llvm::ARM::getExtensionFeatures
bool getExtensionFeatures(uint64_t Extensions, std::vector< StringRef > &Features)
Definition: ARMTargetParser.cpp:307
llvm::ARM::ArchKind
ArchKind
Definition: ARMTargetParser.h:96
llvm::ARM::CpuNames::Default
bool Default
Definition: ARMTargetParser.h:110
llvm::ARM::FPUName::ID
FPUKind ID
Definition: ARMTargetParser.h:161
llvm::ARM::NeonSupportLevel::None
@ None
No Neon.
llvm::ARM::parseFPU
unsigned parseFPU(StringRef FPU)
Definition: ARMTargetParser.cpp:214
llvm::ARM::ExtName::NegFeature
StringRef NegFeature
Definition: ARMTargetParser.h:76
llvm::ARM::FPUVersion::VFPV3_FP16
@ VFPV3_FP16
llvm::ARM::getARMCPUForArch
StringRef getARMCPUForArch(const llvm::Triple &Triple, StringRef MArch={})
Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting.
Definition: ARMTargetParser.cpp:532
llvm::ARM::AEK_CDECP5
@ AEK_CDECP5
Definition: ARMTargetParser.h:59
llvm::ARM::getFPURestriction
FPURestriction getFPURestriction(unsigned FPUKind)
Definition: ARMTargetParser.cpp:258
llvm::ARM::HWDivNames
const struct llvm::ARM::@371 HWDivNames[]
llvm::ARM::ArchNames::ArchFeature
StringRef ArchFeature
Definition: ARMTargetParser.h:183
llvm::ARM::AEK_OS
@ AEK_OS
Definition: ARMTargetParser.h:64
ARMBuildAttributes.h
llvm::ARM::ArchNames
Definition: ARMTargetParser.h:180
llvm::ARM::getFPUName
StringRef getFPUName(unsigned FPUKind)
Definition: ARMTargetParser.cpp:246
llvm::ARM::getFPUVersion
FPUVersion getFPUVersion(unsigned FPUKind)
Definition: ARMTargetParser.cpp:252
llvm::ARM::CpuNames::ArchID
ArchKind ArchID
Definition: ARMTargetParser.h:109
llvm::ARM::ProfileKind::M
@ M
llvm::ARM::computeDefaultTargetABI
StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU)
Definition: ARMTargetParser.cpp:496
llvm::ARM::parseArchExt
uint64_t parseArchExt(StringRef ArchExt)
Definition: ARMTargetParser.cpp:473
llvm::ARM::AEK_IWMMXT
@ AEK_IWMMXT
Definition: ARMTargetParser.h:65
llvm::SmallVectorImpl< StringRef >
llvm::ARMBuildAttrs::CPUArch
CPUArch
Definition: ARMBuildAttributes.h:92
llvm::ARM::ARMArchNames
static const ArchNames ARMArchNames[]
Definition: ARMTargetParser.h:193
llvm::ARM::FPUName::Restriction
FPURestriction Restriction
Definition: ARMTargetParser.h:164
llvm::ARM::getArchExtFeature
StringRef getArchExtFeature(StringRef ArchExt)
Definition: ARMTargetParser.cpp:355
llvm::ARM::AEK_MAVERICK
@ AEK_MAVERICK
Definition: ARMTargetParser.h:67
llvm::ARM::AEK_PACBTI
@ AEK_PACBTI
Definition: ARMTargetParser.h:62
llvm::ARM::FPUVersion
FPUVersion
Definition: ARMTargetParser.h:128
llvm::ARM::ExtName::Feature
StringRef Feature
Definition: ARMTargetParser.h:75
llvm::ARM::ArchNames::DefaultFPU
unsigned DefaultFPU
Definition: ARMTargetParser.h:184
llvm::ARM::getArchExtName
StringRef getArchExtName(uint64_t ArchExtKind)
Definition: ARMTargetParser.cpp:339