LLVM  15.0.0git
ARMTargetParser.cpp
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1 //===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements a target parser to recognise ARM hardware features
10 // such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
11 //
12 //===----------------------------------------------------------------------===//
13 
15 #include "llvm/ADT/StringSwitch.h"
16 #include "llvm/ADT/Triple.h"
17 #include <cctype>
18 
19 using namespace llvm;
20 
22  return StringSwitch<StringRef>(HWDiv)
23  .Case("thumb,arm", "arm,thumb")
24  .Default(HWDiv);
25 }
26 
27 // Allows partial match, ex. "v7a" matches "armv7a".
29  Arch = getCanonicalArchName(Arch);
30  StringRef Syn = getArchSynonym(Arch);
31  for (const auto &A : ARCHNames) {
32  if (A.getName().endswith(Syn))
33  return A.ID;
34  }
35  return ArchKind::INVALID;
36 }
37 
38 // Version number (ex. v7 = 7).
40  Arch = getCanonicalArchName(Arch);
41  switch (parseArch(Arch)) {
42  case ArchKind::ARMV2:
43  case ArchKind::ARMV2A:
44  return 2;
45  case ArchKind::ARMV3:
46  case ArchKind::ARMV3M:
47  return 3;
48  case ArchKind::ARMV4:
49  case ArchKind::ARMV4T:
50  return 4;
51  case ArchKind::ARMV5T:
52  case ArchKind::ARMV5TE:
53  case ArchKind::IWMMXT:
54  case ArchKind::IWMMXT2:
55  case ArchKind::XSCALE:
56  case ArchKind::ARMV5TEJ:
57  return 5;
58  case ArchKind::ARMV6:
59  case ArchKind::ARMV6K:
60  case ArchKind::ARMV6T2:
61  case ArchKind::ARMV6KZ:
62  case ArchKind::ARMV6M:
63  return 6;
64  case ArchKind::ARMV7A:
65  case ArchKind::ARMV7VE:
66  case ArchKind::ARMV7R:
67  case ArchKind::ARMV7M:
68  case ArchKind::ARMV7S:
69  case ArchKind::ARMV7EM:
70  case ArchKind::ARMV7K:
71  return 7;
72  case ArchKind::ARMV8A:
73  case ArchKind::ARMV8_1A:
74  case ArchKind::ARMV8_2A:
75  case ArchKind::ARMV8_3A:
76  case ArchKind::ARMV8_4A:
77  case ArchKind::ARMV8_5A:
78  case ArchKind::ARMV8_6A:
79  case ArchKind::ARMV8_7A:
80  case ArchKind::ARMV8_8A:
81  case ArchKind::ARMV8R:
82  case ArchKind::ARMV8MBaseline:
83  case ArchKind::ARMV8MMainline:
84  case ArchKind::ARMV8_1MMainline:
85  return 8;
86  case ArchKind::ARMV9A:
87  case ArchKind::ARMV9_1A:
88  case ArchKind::ARMV9_2A:
89  case ArchKind::ARMV9_3A:
90  return 9;
91  case ArchKind::INVALID:
92  return 0;
93  }
94  llvm_unreachable("Unhandled architecture");
95 }
96 
97 // Profile A/R/M
99  Arch = getCanonicalArchName(Arch);
100  switch (parseArch(Arch)) {
101  case ArchKind::ARMV6M:
102  case ArchKind::ARMV7M:
103  case ArchKind::ARMV7EM:
104  case ArchKind::ARMV8MMainline:
105  case ArchKind::ARMV8MBaseline:
106  case ArchKind::ARMV8_1MMainline:
107  return ProfileKind::M;
108  case ArchKind::ARMV7R:
109  case ArchKind::ARMV8R:
110  return ProfileKind::R;
111  case ArchKind::ARMV7A:
112  case ArchKind::ARMV7VE:
113  case ArchKind::ARMV7K:
114  case ArchKind::ARMV8A:
115  case ArchKind::ARMV8_1A:
116  case ArchKind::ARMV8_2A:
117  case ArchKind::ARMV8_3A:
118  case ArchKind::ARMV8_4A:
119  case ArchKind::ARMV8_5A:
120  case ArchKind::ARMV8_6A:
121  case ArchKind::ARMV8_7A:
122  case ArchKind::ARMV8_8A:
123  case ArchKind::ARMV9A:
124  case ArchKind::ARMV9_1A:
125  case ArchKind::ARMV9_2A:
126  case ArchKind::ARMV9_3A:
127  return ProfileKind::A;
128  case ArchKind::ARMV2:
129  case ArchKind::ARMV2A:
130  case ArchKind::ARMV3:
131  case ArchKind::ARMV3M:
132  case ArchKind::ARMV4:
133  case ArchKind::ARMV4T:
134  case ArchKind::ARMV5T:
135  case ArchKind::ARMV5TE:
136  case ArchKind::ARMV5TEJ:
137  case ArchKind::ARMV6:
138  case ArchKind::ARMV6K:
139  case ArchKind::ARMV6T2:
140  case ArchKind::ARMV6KZ:
141  case ArchKind::ARMV7S:
142  case ArchKind::IWMMXT:
143  case ArchKind::IWMMXT2:
144  case ArchKind::XSCALE:
145  case ArchKind::INVALID:
146  return ProfileKind::INVALID;
147  }
148  llvm_unreachable("Unhandled architecture");
149 }
150 
152  return StringSwitch<StringRef>(Arch)
153  .Case("v5", "v5t")
154  .Case("v5e", "v5te")
155  .Case("v6j", "v6")
156  .Case("v6hl", "v6k")
157  .Cases("v6m", "v6sm", "v6s-m", "v6-m")
158  .Cases("v6z", "v6zk", "v6kz")
159  .Cases("v7", "v7a", "v7hl", "v7l", "v7-a")
160  .Case("v7r", "v7-r")
161  .Case("v7m", "v7-m")
162  .Case("v7em", "v7e-m")
163  .Cases("v8", "v8a", "v8l", "aarch64", "arm64", "v8-a")
164  .Case("v8.1a", "v8.1-a")
165  .Case("v8.2a", "v8.2-a")
166  .Case("v8.3a", "v8.3-a")
167  .Case("v8.4a", "v8.4-a")
168  .Case("v8.5a", "v8.5-a")
169  .Case("v8.6a", "v8.6-a")
170  .Case("v8.7a", "v8.7-a")
171  .Case("v8.8a", "v8.8-a")
172  .Case("v8r", "v8-r")
173  .Cases("v9", "v9a", "v9-a")
174  .Case("v9.1a", "v9.1-a")
175  .Case("v9.2a", "v9.2-a")
176  .Case("v9.3a", "v9.3-a")
177  .Case("v8m.base", "v8-m.base")
178  .Case("v8m.main", "v8-m.main")
179  .Case("v8.1m.main", "v8.1-m.main")
180  .Default(Arch);
181 }
182 
183 bool ARM::getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features) {
184 
185  if (FPUKind >= FK_LAST || FPUKind == FK_INVALID)
186  return false;
187 
188  static const struct FPUFeatureNameInfo {
189  const char *PlusName, *MinusName;
190  FPUVersion MinVersion;
191  FPURestriction MaxRestriction;
192  } FPUFeatureInfoList[] = {
193  // We have to specify the + and - versions of the name in full so
194  // that we can return them as static StringRefs.
195  //
196  // Also, the SubtargetFeatures ending in just "sp" are listed here
197  // under FPURestriction::None, which is the only FPURestriction in
198  // which they would be valid (since FPURestriction::SP doesn't
199  // exist).
200  {"+vfp2", "-vfp2", FPUVersion::VFPV2, FPURestriction::D16},
201  {"+vfp2sp", "-vfp2sp", FPUVersion::VFPV2, FPURestriction::SP_D16},
202  {"+vfp3", "-vfp3", FPUVersion::VFPV3, FPURestriction::None},
203  {"+vfp3d16", "-vfp3d16", FPUVersion::VFPV3, FPURestriction::D16},
204  {"+vfp3d16sp", "-vfp3d16sp", FPUVersion::VFPV3, FPURestriction::SP_D16},
205  {"+vfp3sp", "-vfp3sp", FPUVersion::VFPV3, FPURestriction::None},
206  {"+fp16", "-fp16", FPUVersion::VFPV3_FP16, FPURestriction::SP_D16},
207  {"+vfp4", "-vfp4", FPUVersion::VFPV4, FPURestriction::None},
208  {"+vfp4d16", "-vfp4d16", FPUVersion::VFPV4, FPURestriction::D16},
209  {"+vfp4d16sp", "-vfp4d16sp", FPUVersion::VFPV4, FPURestriction::SP_D16},
210  {"+vfp4sp", "-vfp4sp", FPUVersion::VFPV4, FPURestriction::None},
211  {"+fp-armv8", "-fp-armv8", FPUVersion::VFPV5, FPURestriction::None},
212  {"+fp-armv8d16", "-fp-armv8d16", FPUVersion::VFPV5, FPURestriction::D16},
213  {"+fp-armv8d16sp", "-fp-armv8d16sp", FPUVersion::VFPV5, FPURestriction::SP_D16},
214  {"+fp-armv8sp", "-fp-armv8sp", FPUVersion::VFPV5, FPURestriction::None},
215  {"+fullfp16", "-fullfp16", FPUVersion::VFPV5_FULLFP16, FPURestriction::SP_D16},
216  {"+fp64", "-fp64", FPUVersion::VFPV2, FPURestriction::D16},
217  {"+d32", "-d32", FPUVersion::VFPV3, FPURestriction::None},
218  };
219 
220  for (const auto &Info: FPUFeatureInfoList) {
221  if (FPUNames[FPUKind].FPUVer >= Info.MinVersion &&
222  FPUNames[FPUKind].Restriction <= Info.MaxRestriction)
223  Features.push_back(Info.PlusName);
224  else
225  Features.push_back(Info.MinusName);
226  }
227 
228  static const struct NeonFeatureNameInfo {
229  const char *PlusName, *MinusName;
230  NeonSupportLevel MinSupportLevel;
231  } NeonFeatureInfoList[] = {
232  {"+neon", "-neon", NeonSupportLevel::Neon},
233  {"+sha2", "-sha2", NeonSupportLevel::Crypto},
234  {"+aes", "-aes", NeonSupportLevel::Crypto},
235  };
236 
237  for (const auto &Info: NeonFeatureInfoList) {
238  if (FPUNames[FPUKind].NeonSupport >= Info.MinSupportLevel)
239  Features.push_back(Info.PlusName);
240  else
241  Features.push_back(Info.MinusName);
242  }
243 
244  return true;
245 }
246 
247 // Little/Big endian
249  if (Arch.startswith("armeb") || Arch.startswith("thumbeb") ||
250  Arch.startswith("aarch64_be"))
251  return EndianKind::BIG;
252 
253  if (Arch.startswith("arm") || Arch.startswith("thumb")) {
254  if (Arch.endswith("eb"))
255  return EndianKind::BIG;
256  else
257  return EndianKind::LITTLE;
258  }
259 
260  if (Arch.startswith("aarch64") || Arch.startswith("aarch64_32"))
261  return EndianKind::LITTLE;
262 
263  return EndianKind::INVALID;
264 }
265 
266 // ARM, Thumb, AArch64
268  return StringSwitch<ISAKind>(Arch)
269  .StartsWith("aarch64", ISAKind::AARCH64)
270  .StartsWith("arm64", ISAKind::AARCH64)
271  .StartsWith("thumb", ISAKind::THUMB)
272  .StartsWith("arm", ISAKind::ARM)
273  .Default(ISAKind::INVALID);
274 }
275 
276 unsigned ARM::parseFPU(StringRef FPU) {
277  StringRef Syn = getFPUSynonym(FPU);
278  for (const auto &F : FPUNames) {
279  if (Syn == F.getName())
280  return F.ID;
281  }
282  return FK_INVALID;
283 }
284 
286  if (FPUKind >= FK_LAST)
287  return NeonSupportLevel::None;
288  return FPUNames[FPUKind].NeonSupport;
289 }
290 
291 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but
292 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return
293 // "v.+", if the latter, return unmodified string, minus 'eb'.
294 // If invalid, return empty string.
296  size_t offset = StringRef::npos;
297  StringRef A = Arch;
298  StringRef Error = "";
299 
300  // Begins with "arm" / "thumb", move past it.
301  if (A.startswith("arm64_32"))
302  offset = 8;
303  else if (A.startswith("arm64e"))
304  offset = 6;
305  else if (A.startswith("arm64"))
306  offset = 5;
307  else if (A.startswith("aarch64_32"))
308  offset = 10;
309  else if (A.startswith("arm"))
310  offset = 3;
311  else if (A.startswith("thumb"))
312  offset = 5;
313  else if (A.startswith("aarch64")) {
314  offset = 7;
315  // AArch64 uses "_be", not "eb" suffix.
316  if (A.contains("eb"))
317  return Error;
318  if (A.substr(offset, 3) == "_be")
319  offset += 3;
320  }
321 
322  // Ex. "armebv7", move past the "eb".
323  if (offset != StringRef::npos && A.substr(offset, 2) == "eb")
324  offset += 2;
325  // Or, if it ends with eb ("armv7eb"), chop it off.
326  else if (A.endswith("eb"))
327  A = A.substr(0, A.size() - 2);
328  // Trim the head
329  if (offset != StringRef::npos)
330  A = A.substr(offset);
331 
332  // Empty string means offset reached the end, which means it's valid.
333  if (A.empty())
334  return Arch;
335 
336  // Only match non-marketing names
337  if (offset != StringRef::npos) {
338  // Must start with 'vN'.
339  if (A.size() >= 2 && (A[0] != 'v' || !std::isdigit(A[1])))
340  return Error;
341  // Can't have an extra 'eb'.
342  if (A.contains("eb"))
343  return Error;
344  }
345 
346  // Arch will either be a 'v' name (v7a) or a marketing name (xscale).
347  return A;
348 }
349 
351  return StringSwitch<StringRef>(FPU)
352  .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
353  .Case("vfp2", "vfpv2")
354  .Case("vfp3", "vfpv3")
355  .Case("vfp4", "vfpv4")
356  .Case("vfp3-d16", "vfpv3-d16")
357  .Case("vfp4-d16", "vfpv4-d16")
358  .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16")
359  .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
360  .Case("fp5-sp-d16", "fpv5-sp-d16")
361  .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
362  // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
363  .Case("neon-vfpv3", "neon")
364  .Default(FPU);
365 }
366 
368  if (FPUKind >= FK_LAST)
369  return StringRef();
370  return FPUNames[FPUKind].getName();
371 }
372 
374  if (FPUKind >= FK_LAST)
375  return FPUVersion::NONE;
376  return FPUNames[FPUKind].FPUVer;
377 }
378 
380  if (FPUKind >= FK_LAST)
381  return FPURestriction::None;
382  return FPUNames[FPUKind].Restriction;
383 }
384 
386  if (CPU == "generic")
387  return ARM::ARCHNames[static_cast<unsigned>(AK)].DefaultFPU;
388 
389  return StringSwitch<unsigned>(CPU)
390 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
391  .Case(NAME, DEFAULT_FPU)
392 #include "llvm/Support/ARMTargetParser.def"
394 }
395 
397  if (CPU == "generic")
398  return ARM::ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
399 
400  return StringSwitch<uint64_t>(CPU)
401 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
402  .Case(NAME, \
403  ARCHNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions | \
404  DEFAULT_EXT)
405 #include "llvm/Support/ARMTargetParser.def"
407 }
408 
410  std::vector<StringRef> &Features) {
411 
412  if (HWDivKind == AEK_INVALID)
413  return false;
414 
415  if (HWDivKind & AEK_HWDIVARM)
416  Features.push_back("+hwdiv-arm");
417  else
418  Features.push_back("-hwdiv-arm");
419 
420  if (HWDivKind & AEK_HWDIVTHUMB)
421  Features.push_back("+hwdiv");
422  else
423  Features.push_back("-hwdiv");
424 
425  return true;
426 }
427 
429  std::vector<StringRef> &Features) {
430 
431  if (Extensions == AEK_INVALID)
432  return false;
433 
434  for (const auto &AE : ARCHExtNames) {
435  if ((Extensions & AE.ID) == AE.ID && AE.Feature)
436  Features.push_back(AE.Feature);
437  else if (AE.NegFeature)
438  Features.push_back(AE.NegFeature);
439  }
440 
441  return getHWDivFeatures(Extensions, Features);
442 }
443 
445  return ARCHNames[static_cast<unsigned>(AK)].getName();
446 }
447 
449  return ARCHNames[static_cast<unsigned>(AK)].getCPUAttr();
450 }
451 
453  return ARCHNames[static_cast<unsigned>(AK)].getSubArch();
454 }
455 
457  return ARCHNames[static_cast<unsigned>(AK)].ArchAttr;
458 }
459 
461  for (const auto &AE : ARCHExtNames) {
462  if (ArchExtKind == AE.ID)
463  return AE.getName();
464  }
465  return StringRef();
466 }
467 
469  if (Name.startswith("no")) {
470  Name = Name.substr(2);
471  return true;
472  }
473  return false;
474 }
475 
477  bool Negated = stripNegationPrefix(ArchExt);
478  for (const auto &AE : ARCHExtNames) {
479  if (AE.Feature && ArchExt == AE.getName())
480  return StringRef(Negated ? AE.NegFeature : AE.Feature);
481  }
482 
483  return StringRef();
484 }
485 
486 static unsigned findDoublePrecisionFPU(unsigned InputFPUKind) {
487  const ARM::FPUName &InputFPU = ARM::FPUNames[InputFPUKind];
488 
489  // If the input FPU already supports double-precision, then there
490  // isn't any different FPU we can return here.
491  //
492  // The current available FPURestriction values are None (no
493  // restriction), D16 (only 16 d-regs) and SP_D16 (16 d-regs
494  // and single precision only); there's no value representing
495  // SP restriction without D16. So this test just means 'is it
496  // SP only?'.
498  return ARM::FK_INVALID;
499 
500  // Otherwise, look for an FPU entry with all the same fields, except
501  // that SP_D16 has been replaced with just D16, representing adding
502  // double precision and not changing anything else.
503  for (const ARM::FPUName &CandidateFPU : ARM::FPUNames) {
504  if (CandidateFPU.FPUVer == InputFPU.FPUVer &&
505  CandidateFPU.NeonSupport == InputFPU.NeonSupport &&
506  CandidateFPU.Restriction == ARM::FPURestriction::D16) {
507  return CandidateFPU.ID;
508  }
509  }
510 
511  // nothing found
512  return ARM::FK_INVALID;
513 }
514 
516  StringRef ArchExt,
517  std::vector<StringRef> &Features,
518  unsigned &ArgFPUID) {
519 
520  size_t StartingNumFeatures = Features.size();
521  const bool Negated = stripNegationPrefix(ArchExt);
522  uint64_t ID = parseArchExt(ArchExt);
523 
524  if (ID == AEK_INVALID)
525  return false;
526 
527  for (const auto &AE : ARCHExtNames) {
528  if (Negated) {
529  if ((AE.ID & ID) == ID && AE.NegFeature)
530  Features.push_back(AE.NegFeature);
531  } else {
532  if ((AE.ID & ID) == AE.ID && AE.Feature)
533  Features.push_back(AE.Feature);
534  }
535  }
536 
537  if (CPU == "")
538  CPU = "generic";
539 
540  if (ArchExt == "fp" || ArchExt == "fp.dp") {
541  unsigned FPUKind;
542  if (ArchExt == "fp.dp") {
543  if (Negated) {
544  Features.push_back("-fp64");
545  return true;
546  }
548  } else if (Negated) {
550  } else {
551  FPUKind = getDefaultFPU(CPU, AK);
552  }
553  ArgFPUID = FPUKind;
554  return ARM::getFPUFeatures(FPUKind, Features);
555  }
556  return StartingNumFeatures != Features.size();
557 }
558 
560  ArchKind AK = parseArch(Arch);
561  if (AK == ArchKind::INVALID)
562  return StringRef();
563 
564  // Look for multiple AKs to find the default for pair AK+Name.
565  for (const auto &CPU : CPUNames) {
566  if (CPU.ArchID == AK && CPU.Default)
567  return CPU.getName();
568  }
569 
570  // If we can't find a default then target the architecture instead
571  return "generic";
572 }
573 
575  StringRef Syn = getHWDivSynonym(HWDiv);
576  for (const auto &D : HWDivNames) {
577  if (Syn == D.getName())
578  return D.ID;
579  }
580  return AEK_INVALID;
581 }
582 
584  for (const auto &A : ARCHExtNames) {
585  if (ArchExt == A.getName())
586  return A.ID;
587  }
588  return AEK_INVALID;
589 }
590 
592  for (const auto &C : CPUNames) {
593  if (CPU == C.getName())
594  return C.ArchID;
595  }
596  return ArchKind::INVALID;
597 }
598 
600  for (const CpuNames<ArchKind> &Arch : CPUNames) {
601  if (Arch.ArchID != ArchKind::INVALID)
602  Values.push_back(Arch.getName());
603  }
604 }
605 
607  StringRef ArchName =
608  CPU.empty() ? TT.getArchName() : getArchName(parseCPUArch(CPU));
609 
610  if (TT.isOSBinFormatMachO()) {
611  if (TT.getEnvironment() == Triple::EABI ||
612  TT.getOS() == Triple::UnknownOS ||
613  parseArchProfile(ArchName) == ProfileKind::M)
614  return "aapcs";
615  if (TT.isWatchABI())
616  return "aapcs16";
617  return "apcs-gnu";
618  } else if (TT.isOSWindows())
619  // FIXME: this is invalid for WindowsCE.
620  return "aapcs";
621 
622  // Select the default based on the platform.
623  switch (TT.getEnvironment()) {
624  case Triple::Android:
625  case Triple::GNUEABI:
626  case Triple::GNUEABIHF:
627  case Triple::MuslEABI:
628  case Triple::MuslEABIHF:
629  return "aapcs-linux";
630  case Triple::EABIHF:
631  case Triple::EABI:
632  return "aapcs";
633  default:
634  if (TT.isOSNetBSD())
635  return "apcs-gnu";
636  if (TT.isOSOpenBSD())
637  return "aapcs-linux";
638  return "aapcs";
639  }
640 }
llvm::StringSwitch::Case
StringSwitch & Case(StringLiteral S, T Value)
Definition: StringSwitch.h:69
llvm::ARM::FK_LAST
@ FK_LAST
Definition: ARMTargetParser.h:133
llvm::StringRef::startswith
LLVM_NODISCARD bool startswith(StringRef Prefix) const
Check if this string starts with the given Prefix.
Definition: StringRef.h:290
llvm::StringSwitch::StartsWith
StringSwitch & StartsWith(StringLiteral S, T Value)
Definition: StringSwitch.h:83
getName
static StringRef getName(Value *V)
Definition: ProvenanceAnalysisEvaluator.cpp:42
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::ARM::EndianKind
EndianKind
Definition: ARMTargetParser.h:166
llvm::ARM::FPUKind
FPUKind
Definition: ARMTargetParser.h:130
llvm::ARM::PredBlockMask::TT
@ TT
llvm::ARM::getCanonicalArchName
StringRef getCanonicalArchName(StringRef Arch)
Definition: ARMTargetParser.cpp:295
llvm::ARM::FPUName
Definition: ARMTargetParser.h:176
llvm::ARM::FPURestriction
FPURestriction
Definition: ARMTargetParser.h:148
llvm::ARM::FPUName::getName
StringRef getName() const
Definition: ARMTargetParser.h:184
llvm::ARM::getArchName
StringRef getArchName(ArchKind AK)
Definition: ARMTargetParser.cpp:444
llvm::StringRef::endswith
LLVM_NODISCARD bool endswith(StringRef Suffix) const
Check if this string ends with the given Suffix.
Definition: StringRef.h:301
llvm::StringSwitch::Default
LLVM_NODISCARD R Default(T Value)
Definition: StringSwitch.h:183
llvm::StringRef::npos
static constexpr size_t npos
Definition: StringRef.h:60
llvm::ARM::ARCHExtNames
const ExtName ARCHExtNames[]
Definition: ARMTargetParser.h:82
llvm::Triple::MuslEABIHF
@ MuslEABIHF
Definition: Triple.h:240
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
llvm::ARM::parseArchProfile
ProfileKind parseArchProfile(StringRef Arch)
Definition: ARMTargetParser.cpp:98
llvm::ARM::getArchSynonym
StringRef getArchSynonym(StringRef Arch)
Definition: ARMTargetParser.cpp:151
llvm::AArch64::getCPUAttr
StringRef getCPUAttr(ArchKind AK)
Definition: AArch64TargetParser.cpp:117
llvm::ARM::ArchExtKind
ArchExtKind
Definition: ARMTargetParser.h:29
llvm::ARM::ProfileKind
ProfileKind
Definition: ARMTargetParser.h:169
llvm::ARM::FPURestriction::SP_D16
@ SP_D16
Only single-precision instructions, with 16 D registers.
llvm::ARM::getCPUAttr
StringRef getCPUAttr(ArchKind AK)
Definition: ARMTargetParser.cpp:448
llvm::AArch64::parseArchExt
ArchExtKind parseArchExt(StringRef ArchExt)
Definition: AArch64TargetParser.cpp:191
llvm::ARM::getFPUFeatures
bool getFPUFeatures(unsigned FPUKind, std::vector< StringRef > &Features)
Definition: ARMTargetParser.cpp:183
llvm::ARM::FPUName::NeonSupport
NeonSupportLevel NeonSupport
Definition: ARMTargetParser.h:181
llvm::ARM::FPUNames
static const FPUName FPUNames[]
Definition: ARMTargetParser.h:187
llvm::ARM::fillValidCPUArchList
void fillValidCPUArchList(SmallVectorImpl< StringRef > &Values)
Definition: ARMTargetParser.cpp:599
stripNegationPrefix
static bool stripNegationPrefix(StringRef &Name)
Definition: ARMTargetParser.cpp:468
llvm::Triple::GNUEABI
@ GNUEABI
Definition: Triple.h:230
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::RISCVFenceField::R
@ R
Definition: RISCVBaseInfo.h:240
llvm::ARM::getArchAttr
unsigned getArchAttr(ArchKind AK)
Definition: ARMTargetParser.cpp:456
llvm::ARM::AEK_HWDIVTHUMB
@ AEK_HWDIVTHUMB
Definition: ARMTargetParser.h:35
llvm::AArch64::AEK_INVALID
@ AEK_INVALID
Definition: AArch64TargetParser.h:30
C
(vector float) vec_cmpeq(*A, *B) C
Definition: README_ALTIVEC.txt:86
llvm::ARM::CPUNames
const CpuNames< ArchKind > CPUNames[]
Definition: ARMTargetParser.h:123
llvm::ARM::ARCHNames
static const ArchNames< ArchKind > ARCHNames[]
Definition: ARMTargetParser.h:222
llvm::ARM::parseCPUArch
ArchKind parseCPUArch(StringRef CPU)
Definition: ARMTargetParser.cpp:591
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
llvm::Triple::MuslEABI
@ MuslEABI
Definition: Triple.h:239
llvm::ARM::parseArch
ArchKind parseArch(StringRef Arch)
Definition: ARMTargetParser.cpp:28
llvm::ARM::getDefaultExtensions
uint64_t getDefaultExtensions(StringRef CPU, ArchKind AK)
Definition: ARMTargetParser.cpp:396
llvm::None
const NoneType None
Definition: None.h:24
llvm::ARM::NeonSupportLevel
NeonSupportLevel
Definition: ARMTargetParser.h:155
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::ARM::appendArchExtFeatures
bool appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, StringRef ArchExt, std::vector< StringRef > &Features, unsigned &ArgFPUKind)
Definition: ARMTargetParser.cpp:515
llvm::ARM::parseArchEndian
EndianKind parseArchEndian(StringRef Arch)
Definition: ARMTargetParser.cpp:248
llvm::ARM::AEK_INVALID
@ AEK_INVALID
Definition: ARMTargetParser.h:30
llvm::AArch64::getDefaultFPU
unsigned getDefaultFPU(StringRef CPU, ArchKind AK)
Definition: AArch64TargetParser.cpp:27
llvm::ARM::FPUName::FPUVer
FPUVersion FPUVer
Definition: ARMTargetParser.h:180
llvm::ARM::AEK_HWDIVARM
@ AEK_HWDIVARM
Definition: ARMTargetParser.h:36
parseArch
static Triple::ArchType parseArch(StringRef ArchName)
Definition: Triple.cpp:442
llvm::StringRef::empty
constexpr LLVM_NODISCARD bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:153
uint64_t
llvm::ARM::parseHWDiv
uint64_t parseHWDiv(StringRef HWDiv)
Definition: ARMTargetParser.cpp:574
llvm::Triple::Android
@ Android
Definition: Triple.h:237
D
static GCRegistry::Add< StatepointGC > D("statepoint-example", "an example strategy for statepoint")
findDoublePrecisionFPU
static unsigned findDoublePrecisionFPU(unsigned InputFPUKind)
Definition: ARMTargetParser.cpp:486
llvm::ARM::getFPUSynonym
StringRef getFPUSynonym(StringRef FPU)
Definition: ARMTargetParser.cpp:350
llvm::AArch64::getArchName
StringRef getArchName(ArchKind AK)
Definition: AArch64TargetParser.cpp:113
ARMTargetParser.h
llvm::ARM::CpuNames
Definition: ARMTargetParser.h:113
llvm::ARM::FPURestriction::D16
@ D16
Only 16 D registers.
llvm::AArch64::parseCPUArch
ArchKind parseCPUArch(StringRef CPU)
Definition: AArch64TargetParser.cpp:199
llvm::ARM::parseArchVersion
unsigned parseArchVersion(StringRef Arch)
Definition: ARMTargetParser.cpp:39
llvm::ARM::getDefaultFPU
unsigned getDefaultFPU(StringRef CPU, ArchKind AK)
Definition: ARMTargetParser.cpp:385
llvm::FK_NONE
@ FK_NONE
A no-op fixup.
Definition: MCFixup.h:22
Triple.h
llvm::ARM::getSubArch
StringRef getSubArch(ArchKind AK)
Definition: ARMTargetParser.cpp:452
llvm::ARM::ISAKind
ISAKind
Definition: ARMTargetParser.h:162
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm::CSKYAttrs::NONE
@ NONE
Definition: CSKYAttributes.h:76
llvm::ARM::parseArchISA
ISAKind parseArchISA(StringRef Arch)
Definition: ARMTargetParser.cpp:267
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
A
* A
Definition: README_ALTIVEC.txt:89
llvm::ARM::HWDivNames
const struct llvm::ARM::@360 HWDivNames[]
llvm::StringSwitch::Cases
StringSwitch & Cases(StringLiteral S0, StringLiteral S1, T Value)
Definition: StringSwitch.h:90
llvm::ARM::getHWDivFeatures
bool getHWDivFeatures(uint64_t HWDivKind, std::vector< StringRef > &Features)
Definition: ARMTargetParser.cpp:409
getHWDivSynonym
static StringRef getHWDivSynonym(StringRef HWDiv)
Definition: ARMTargetParser.cpp:21
llvm::ARM::getFPUNeonSupportLevel
NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind)
Definition: ARMTargetParser.cpp:285
llvm::ARM::getDefaultCPU
StringRef getDefaultCPU(StringRef Arch)
Definition: ARMTargetParser.cpp:559
llvm::ARM::getExtensionFeatures
bool getExtensionFeatures(uint64_t Extensions, std::vector< StringRef > &Features)
Definition: ARMTargetParser.cpp:428
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:50
llvm::ARM::ArchKind
ArchKind
Definition: ARMTargetParser.h:103
llvm::ARM::parseFPU
unsigned parseFPU(StringRef FPU)
Definition: ARMTargetParser.cpp:276
llvm::Error
Lightweight error class with error context and mandatory checking.
Definition: Error.h:155
llvm::RISCV::FK_INVALID
@ FK_INVALID
Definition: TargetParser.h:166
llvm::ARM::getFPURestriction
FPURestriction getFPURestriction(unsigned FPUKind)
Definition: ARMTargetParser.cpp:379
llvm::AArch64::getSubArch
StringRef getSubArch(ArchKind AK)
Definition: AArch64TargetParser.cpp:121
StringSwitch.h
llvm::ARM::getFPUName
StringRef getFPUName(unsigned FPUKind)
Definition: ARMTargetParser.cpp:367
llvm::ARM::getFPUVersion
FPUVersion getFPUVersion(unsigned FPUKind)
Definition: ARMTargetParser.cpp:373
llvm::ARM::computeDefaultTargetABI
StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU)
Definition: ARMTargetParser.cpp:606
llvm::ARM::parseArchExt
uint64_t parseArchExt(StringRef ArchExt)
Definition: ARMTargetParser.cpp:583
llvm::SmallVectorImpl< StringRef >
llvm::Triple::EABIHF
@ EABIHF
Definition: Triple.h:236
llvm::StringSwitch
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:44
llvm::Triple::GNUEABIHF
@ GNUEABIHF
Definition: Triple.h:231
llvm::Triple::UnknownOS
@ UnknownOS
Definition: Triple.h:182
llvm::ARM::FPUName::Restriction
FPURestriction Restriction
Definition: ARMTargetParser.h:182
llvm::Triple::EABI
@ EABI
Definition: Triple.h:235
llvm::ARM::getArchExtFeature
StringRef getArchExtFeature(StringRef ArchExt)
Definition: ARMTargetParser.cpp:476
llvm::ARM::FPUVersion
FPUVersion
Definition: ARMTargetParser.h:137
llvm::ARM::getArchExtName
StringRef getArchExtName(uint64_t ArchExtKind)
Definition: ARMTargetParser.cpp:460