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14 #ifndef LLVM_AVR_ASM_BACKEND_H
15 #define LLVM_AVR_ASM_BACKEND_H
26 struct MCFixupKindInfo;
37 std::unique_ptr<MCObjectTargetWriter>
70 #endif // LLVM_AVR_ASM_BACKEND_H
This is an optimization pass for GlobalISel generic memory operations.
A relaxable fragment holds on to its MCInst, since it may need to be relaxed during the assembler lay...
Context object for machine code objects.
Target - Wrapper for Target specific information.
void adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, uint64_t &Value, MCContext *Ctx=nullptr) const
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target) override
Hook to check if a relocation is needed for some target specific reason.
Generic interface to target specific assembler backends.
This class implements an extremely fast bulk output stream that can only output to a stream.
static RegisterPass< DebugifyFunctionPass > DF("debugify-function", "Attach debug info to a function")
Utilities for manipulating generated AVR machine code.
const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const override
Get information on a fixup kind.
std::unique_ptr< MCObjectTargetWriter > createObjectTargetWriter() const override
Target independent information on a fixup kind.
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, const MCRelaxableFragment *DF, const MCAsmLayout &Layout) const override
Simple predicate for targets where !Resolved implies requiring relaxation.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Encapsulates the layout of an assembly file at a particular point in time.
unsigned getNumFixupKinds() const override
Get the number of target specific fixup kinds.
bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const override
Write an (optimal) nop sequence of Count bytes to the given output.
MCFixupKind
Extensible enumeration to represent the type of a fixup.
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef< char > Data, uint64_t Value, bool IsResolved, const MCSubtargetInfo *STI) const override
Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup...
Reimplement select in terms of SEL *We would really like to support but we need to prove that the add doesn t need to overflow between the two bit chunks *Implement pre post increment support(e.g. PR935) *Implement smarter const ant generation for binops with large immediates. A few ARMv6T2 ops should be pattern matched
This represents an "assembler immediate".
AVRAsmBackend(Triple::OSType OSType)
Generic base class for all target subtargets.
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
LLVM Value Representation.