LLVM  14.0.0git
CSKYMCCodeEmitter.h
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1 //===-- CSKYMCCodeEmitter.cpp - CSKY Code Emitter interface ---------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the CSKYMCCodeEmitter class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_CSKY_MCTARGETDESC_CSKYMCCODEEMITTER_H
14 #define LLVM_LIB_TARGET_CSKY_MCTARGETDESC_CSKYMCCODEEMITTER_H
15 
16 #include "CSKYMCExpr.h"
18 #include "llvm/MC/MCCodeEmitter.h"
19 #include "llvm/MC/MCContext.h"
20 
21 namespace llvm {
22 
24  MCContext &Ctx;
25  const MCInstrInfo &MII;
26 
27 public:
29  : Ctx(Ctx), MII(MII) {}
30 
32 
33  void encodeInstruction(const MCInst &Inst, raw_ostream &OS,
35  const MCSubtargetInfo &STI) const override;
36 
37  // Generated by tablegen.
40  const MCSubtargetInfo &STI) const;
41 
42  // Default encoding method used by tablegen.
43  unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
45  const MCSubtargetInfo &STI) const;
46 
47  template <int shift = 0>
48  unsigned getImmOpValue(const MCInst &MI, unsigned Idx,
50  const MCSubtargetInfo &STI) const {
51  const MCOperand &MO = MI.getOperand(Idx);
52  assert(MO.isImm() && "Unexpected MO type.");
53  return (MO.getImm() >> shift);
54  }
55 
56  unsigned getOImmOpValue(const MCInst &MI, unsigned Idx,
58  const MCSubtargetInfo &STI) const;
59 
60  unsigned getImmShiftOpValue(const MCInst &MI, unsigned Idx,
62  const MCSubtargetInfo &STI) const {
63  const MCOperand &MO = MI.getOperand(Idx);
64  assert(MO.isImm() && "Unexpected MO type.");
65  return 1 << MO.getImm();
66  }
67 
68  MCFixupKind getTargetFixup(const MCExpr *Expr) const;
69 
70  template <llvm::CSKY::Fixups FIXUP>
71  unsigned getBranchSymbolOpValue(const MCInst &MI, unsigned Idx,
73  const MCSubtargetInfo &STI) const {
74  const MCOperand &MO = MI.getOperand(Idx);
75 
76  if (MO.isImm())
77  return MO.getImm() >> 1;
78 
79  assert(MO.isExpr() && "Unexpected MO type.");
80 
81  MCFixupKind Kind = MCFixupKind(FIXUP);
82  if (MO.getExpr()->getKind() == MCExpr::Target)
83  Kind = getTargetFixup(MO.getExpr());
84 
85  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
86  return 0;
87  }
88 
89  template <llvm::CSKY::Fixups FIXUP>
90  unsigned getConstpoolSymbolOpValue(const MCInst &MI, unsigned Idx,
92  const MCSubtargetInfo &STI) const {
93  const MCOperand &MO = MI.getOperand(Idx);
94  assert(MO.isExpr() && "Unexpected MO type.");
95 
96  MCFixupKind Kind = MCFixupKind(FIXUP);
97  if (MO.getExpr()->getKind() == MCExpr::Target)
98  Kind = getTargetFixup(MO.getExpr());
99 
100  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
101  return 0;
102  }
103 
104  unsigned getCallSymbolOpValue(const MCInst &MI, unsigned Idx,
106  const MCSubtargetInfo &STI) const {
107  const MCOperand &MO = MI.getOperand(Idx);
108  assert(MO.isExpr() && "Unexpected MO type.");
109 
111  if (MO.getExpr()->getKind() == MCExpr::Target)
112  Kind = getTargetFixup(MO.getExpr());
113 
114  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
115  return 0;
116  }
117 
118  unsigned getBareSymbolOpValue(const MCInst &MI, unsigned Idx,
120  const MCSubtargetInfo &STI) const {
121  const MCOperand &MO = MI.getOperand(Idx);
122  assert(MO.isExpr() && "Unexpected MO type.");
123 
125  if (MO.getExpr()->getKind() == MCExpr::Target)
126  Kind = getTargetFixup(MO.getExpr());
127 
128  Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
129  return 0;
130  }
131 };
132 
133 } // namespace llvm
134 
135 #endif // LLVM_LIB_TARGET_CSKY_MCTARGETDESC_CSKYMCCODEEMITTER_H
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:103
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
llvm::CSKYMCCodeEmitter::getBareSymbolOpValue
unsigned getBareSymbolOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:118
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:72
MCCodeEmitter.h
llvm::MCFixup::create
static MCFixup create(uint32_t Offset, const MCExpr *Value, MCFixupKind Kind, SMLoc Loc=SMLoc())
Definition: MCFixup.h:87
llvm::CSKYMCCodeEmitter::getBranchSymbolOpValue
unsigned getBranchSymbolOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:71
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
llvm::CSKYMCCodeEmitter::getBinaryCodeForInstr
uint64_t getBinaryCodeForInstr(const MCInst &MI, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
llvm::MCExpr::Target
@ Target
Target specific expression.
Definition: MCExpr.h:42
MCContext.h
llvm::MCOperand::getImm
int64_t getImm() const
Definition: MCInst.h:80
llvm::AArch64::Fixups
Fixups
Definition: AArch64FixupKinds.h:17
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:53
llvm::CSKYMCCodeEmitter::~CSKYMCCodeEmitter
~CSKYMCCodeEmitter()
Definition: CSKYMCCodeEmitter.h:31
llvm::CSKYMCCodeEmitter::getOImmOpValue
unsigned getOImmOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:26
llvm::MCExpr::getKind
ExprKind getKind() const
Definition: MCExpr.h:81
llvm::lltok::Kind
Kind
Definition: LLToken.h:18
llvm::CSKY::fixup_csky_pcrel_imm26_scale2
@ fixup_csky_pcrel_imm26_scale2
Definition: CSKYFixupKinds.h:23
llvm::CSKYMCCodeEmitter::getTargetFixup
MCFixupKind getTargetFixup(const MCExpr *Expr) const
Definition: CSKYMCCodeEmitter.cpp:65
llvm::MCOperand::isImm
bool isImm() const
Definition: MCInst.h:62
uint64_t
llvm::CSKYMCCodeEmitter::getImmOpValue
unsigned getImmOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:48
llvm::CSKYMCCodeEmitter::encodeInstruction
void encodeInstruction(const MCInst &Inst, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const override
EncodeInstruction - Encode the given Inst to bytes on the output stream OS.
Definition: CSKYMCCodeEmitter.cpp:34
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::CSKYMCCodeEmitter
Definition: CSKYMCCodeEmitter.h:23
llvm::CSKYMCCodeEmitter::getImmShiftOpValue
unsigned getImmShiftOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:60
llvm::CSKY::fixup_csky_pcrel_imm18_scale2
@ fixup_csky_pcrel_imm18_scale2
Definition: CSKYFixupKinds.h:25
llvm::MCInstrInfo
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:25
llvm::CSKYMCCodeEmitter::getConstpoolSymbolOpValue
unsigned getConstpoolSymbolOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:90
llvm::MCCodeEmitter
MCCodeEmitter - Generic instruction encoding interface.
Definition: MCCodeEmitter.h:21
llvm::CSKYMCCodeEmitter::CSKYMCCodeEmitter
CSKYMCCodeEmitter(MCContext &Ctx, const MCInstrInfo &MII)
Definition: CSKYMCCodeEmitter.h:28
llvm::MCOperand::getExpr
const MCExpr * getExpr() const
Definition: MCInst.h:114
CSKYFixupKinds.h
llvm::CSKYMCCodeEmitter::getCallSymbolOpValue
unsigned getCallSymbolOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.h:104
llvm::MCOperand::isExpr
bool isExpr() const
Definition: MCInst.h:65
CSKYMCExpr.h
llvm::MCFixupKind
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
shift
http eax xorl edx cl sete al setne dl sall eax sall edx But that requires good bit subreg support this might be better It s an extra shift
Definition: README.txt:30
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:43
llvm::MCOperand
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:36
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:75
llvm::CSKYMCCodeEmitter::getMachineOpValue
unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:52
llvm::MCExpr
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35